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1133 Commits

Author SHA1 Message Date
Evan Cheng
8820ad5154 Fixing 2006-05-01-SchedCausingSpills.ll; some clean up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 08:22:24 +00:00
Evan Cheng
ee00a1d12c Revert an un-intended change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 05:53:47 +00:00
Chris Lattner
a2d079a776 Merge identical code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 02:11:14 +00:00
Chris Lattner
b5d9319bc5 Remove dead vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28255 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 18:06:45 +00:00
Chris Lattner
f1343c1b79 remove dead vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28254 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 18:04:28 +00:00
Chris Lattner
5eed34d208 Comment out dead variables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 17:57:54 +00:00
Chris Lattner
e41102bb61 Compile: 
%tmp152 = setgt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %tmp159 = setlt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %bothcond2 = or bool %tmp152, %tmp159           ; <bool> [#uses=1]

To setne, not setune, which causes an assertion fault.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 17:03:46 +00:00
Owen Anderson
07000c6f01 Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 06:33:49 +00:00
Evan Cheng
626da3d9ae Duh. That could take a long time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28235 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 06:05:18 +00:00
Chris Lattner
21a57dc751 Two simplifications for token factor nodes: simplify tf(x,x) -> x. 
simplify tf(x,y,y,z) -> tf(x,y,z).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28233 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 05:01:37 +00:00
Evan Cheng
13d41b9d72 Add capability to scheduler to commute nodes for profit. 
If a two-address code whose first operand has uses below, it should be commuted
when possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 01:58:24 +00:00
Evan Cheng
e165a78551 Refactor scheduler code. Move register-reduction list scheduler to a 
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-11 23:55:42 +00:00
Evan Cheng
90db0358bb Templatify RegReductionPriorityQueue 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28212 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-10 06:16:44 +00:00
Nate Begeman
ec57fd91af Fix PR773 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 18:20:51 +00:00
Evan Cheng
b63b067925 Add pseudo dependency to force a def&use operand to be scheduled last (unless 
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28201 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 07:13:34 +00:00
Evan Cheng
60e8c71c9f Debugging info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28200 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 06:55:15 +00:00
Chris Lattner
4b37e87ab9 Make the case I just checked in stronger. Now we compile this: 
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

to:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srwi r2, r2, 1
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28175 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 21:18:59 +00:00
Chris Lattner
eaeda56649 Implement and_sext.ll:test3, generating: 
_test4:
        srawi r3, r3, 16
        blr

instead of:

_test4:
        srwi r2, r3, 16
        extsh r3, r2
        blr

for:

short test4(unsigned X) {
  return (X >> 16);
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 20:59:41 +00:00
Chris Lattner
a850446a0b Compile this: 
short test4(unsigned X) {
  return (X >> 16);
}

to:

_test4:
        movl 4(%esp), %eax
        sarl $16, %eax
        ret

instead of:

_test4:
        movl $-65536, %eax
        andl 4(%esp), %eax
        sarl $16, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 20:51:54 +00:00
Chris Lattner
2cfd6746ae Fold shifts with undef operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28167 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 17:29:49 +00:00
Chris Lattner
1b7371331f When tracking demanded bits, if any bits from the sext of an SRA are demanded, 
then so is the input sign bit.  This fixes mediabench/g721 on X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28166 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 17:22:53 +00:00
Nate Begeman
17c275ff2c Make emission of jump tables a bit less conservative; they are now required 
to be only 31.25% dense, rather than 75% dense.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28165 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 16:51:36 +00:00
Nate Begeman
5c742681ed Fix PR772 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28161 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 01:35:01 +00:00
Chris Lattner
822db93e57 Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us 
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28155 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 23:48:13 +00:00
Chris Lattner
e60351bb72 Add some more sign propagation cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28154 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 23:40:29 +00:00
Chris Lattner
310b578023 Simplify some code, add a couple minor missed folds 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28152 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 23:06:26 +00:00
Chris Lattner
b9ebacdb4d constant fold sign_extend_inreg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28151 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 23:05:41 +00:00
Chris Lattner
541a24f7af remove cases handled elsewhere 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 22:43:44 +00:00
Chris Lattner
d6f7fe76a6 Add some more simple sign bit propagation cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 22:39:59 +00:00
Chris Lattner
ee4ea92358 Use the new TargetLowering::ComputeNumSignBits method to eliminate 
sign_extend_inreg operations.  Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:

short test(short X, short x) {
  int Y = X+x;
  return (Y >> 1);
}
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

into:

_test:
        add r2, r3, r4
        srawi r3, r2, 1
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test:
        add r2, r3, r4
        srawi r2, r2, 1
        extsh r3, r2
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r2, r2, 1
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:30:03 +00:00
Chris Lattner
5c3e21d687 Add some really really simple code for computing sign-bit propagation. 
This will certainly be enhanced in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:27:13 +00:00
Chris Lattner
f0df8824eb When inserting casts, be careful of where we put them. We cannot insert 
a cast immediately before a PHI node.

This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28143 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:10:37 +00:00
Chris Lattner
c93dfda905 Fold (trunc (srl x, c)) -> (srl (trunc x), c) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28138 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 00:11:52 +00:00
Chris Lattner
b72773bb88 Fold trunc(any_ext). This gives stuff like: 
27,28c27
<       movzwl %di, %edi
<       movl %edi, %ebx
---
>       movw %di, %bx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28137 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:56:26 +00:00
Chris Lattner
06afe07037 Shrink shifts when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:53:17 +00:00
Chris Lattner
fe8babf689 Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:32:12 +00:00
Chris Lattner
e564dbb51c Fold (fpext (load x)) -> (extload x) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28130 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:34:35 +00:00
Chris Lattner
903236468c More aggressively sink GEP offsets into loops. For example, before we 
generated:

        movl 8(%esp), %eax
        movl %eax, %edx
        addl $4316, %edx
        cmpb $1, %cl
        ja LBB1_2       #cond_false
LBB1_1: #cond_true
        movl L_QuantizationTables720$non_lazy_ptr, %ecx
        movl %ecx, (%edx)
        movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx
        movl %edx, 4460(%eax)
        ret
...

Now we generate:

        movl 8(%esp), %eax
        cmpb $1, %cl
        ja LBB1_2       #cond_false
LBB1_1: #cond_true
        movl L_QuantizationTables720$non_lazy_ptr, %ecx
        movl %ecx, 4316(%eax)
        movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx
        movl %ecx, 4460(%eax)
        ret

... which uses one fewer register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28129 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:17:49 +00:00
Chris Lattner
0d8dae749c Fold some common code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28124 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:32:04 +00:00
Chris Lattner
540121f1ec Implement: 
// fold (and (sext x), (sext y)) -> (sext (and x, y))
  // fold (or  (sext x), (sext y)) -> (sext (or  x, y))
  // fold (xor (sext x), (sext y)) -> (sext (xor x, y))
  // fold (and (aext x), (aext y)) -> (aext (and x, y))
  // fold (or  (aext x), (aext y)) -> (aext (or  x, y))
  // fold (xor (aext x), (aext y)) -> (aext (xor x, y))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28123 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:31:05 +00:00
Chris Lattner
a3dc3f692c Pull and through and/or/xor. This compiles some bitfield code to: 
mov EAX, DWORD PTR [ESP + 4]
        mov ECX, DWORD PTR [EAX]
        mov EDX, ECX
        add EDX, EDX
        or EDX, ECX
        and EDX, -2147483648
        and ECX, 2147483647
        or EDX, ECX
        mov DWORD PTR [EAX], EDX
        ret

instead of:

        sub ESP, 4
        mov DWORD PTR [ESP], ESI
        mov EAX, DWORD PTR [ESP + 8]
        mov ECX, DWORD PTR [EAX]
        mov EDX, ECX
        add EDX, EDX
        mov ESI, ECX
        and ESI, -2147483648
        and EDX, -2147483648
        or EDX, ESI
        and ECX, 2147483647
        or EDX, ECX
        mov DWORD PTR [EAX], EDX
        mov ESI, DWORD PTR [ESP]
        add ESP, 4
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28122 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:10:43 +00:00
Chris Lattner
5ffc066912 Implement a variety of simplifications for ANY_EXTEND. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28121 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:58:59 +00:00
Chris Lattner
35e5c14b80 Factor some code, add these transformations: 
// fold (and (trunc x), (trunc y)) -> (trunc (and x, y))
  // fold (or  (trunc x), (trunc y)) -> (trunc (or  x, y))
  // fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28120 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:51:50 +00:00
Jeff Cohen
4b75e73791 Fix VC++ compilation error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 01:47:05 +00:00
Chris Lattner
7e598096ea Sink noop copies into the basic block that uses them. This reduces the number 
of cross-block live ranges, and allows the bb-at-a-time selector to always
coallesce these away, at isel time.

This reduces the load on the coallescer and register allocator.  For example
on a codec on X86, we went from:

   1643 asm-printer           - Number of machine instrs printed
    419 liveintervals         - Number of loads/stores folded into instructions
   1144 liveintervals         - Number of identity moves eliminated after coalescing
   1022 liveintervals         - Number of interval joins performed
    282 liveintervals         - Number of intervals after coalescing
   1304 liveintervals         - Number of original intervals
     86 regalloc              - Number of times we had to backtrack
1.90232 regalloc              - Ratio of intervals processed over total intervals
     40 spiller               - Number of values reused
    182 spiller               - Number of loads added
    121 spiller               - Number of stores added
    132 spiller               - Number of register spills
      6 twoaddressinstruction - Number of instructions commuted to coalesce
    360 twoaddressinstruction - Number of two-address instructions

to:

   1636 asm-printer           - Number of machine instrs printed
    403 liveintervals         - Number of loads/stores folded into instructions
   1155 liveintervals         - Number of identity moves eliminated after coalescing
   1033 liveintervals         - Number of interval joins performed
    279 liveintervals         - Number of intervals after coalescing
   1312 liveintervals         - Number of original intervals
     76 regalloc              - Number of times we had to backtrack
1.88998 regalloc              - Ratio of intervals processed over total intervals
      1 spiller               - Number of copies elided
     41 spiller               - Number of values reused
    191 spiller               - Number of loads added
    114 spiller               - Number of stores added
    128 spiller               - Number of register spills
      4 twoaddressinstruction - Number of instructions commuted to coalesce
    356 twoaddressinstruction - Number of two-address instructions

On this testcase, this change provides a modest reduction in spill code,
regalloc iterations, and total instructions emitted.  It increases the number
of register coallesces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28115 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 01:04:50 +00:00
Evan Cheng
14a6db8bd9 Initial support for register pressure aware scheduling. The register reduction 
scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 19:16:39 +00:00
Chris Lattner
8b915b4ed2 Remove and simplify some more machineinstr/machineoperand stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:16:01 +00:00
Chris Lattner
2d90ac7ca6 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:05:43 +00:00
Chris Lattner
ea50fabfd4 Remove a bunch more SparcV9 specific stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 01:15:02 +00:00
Nate Begeman
f4360a4789 Finish up the initial jump table implementation by allowing jump tables to 
not be 100% dense.  Increase the minimum threshold for the number of cases
in a switch statement from 4 to 6 in order to create a jump table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28079 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 03:48:02 +00:00