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Author SHA1 Message Date
Bob Wilson
02266e29f9 --- Reverse-merging r107947 into '.': 
U    utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U    test/CodeGen/X86/fast-isel.ll
U    test/CodeGen/X86/fast-isel-loads.ll
U    include/llvm/Target/TargetLowering.h
U    include/llvm/Support/PassNameParser.h
U    include/llvm/CodeGen/FunctionLoweringInfo.h
U    include/llvm/CodeGen/CallingConvLower.h
U    include/llvm/CodeGen/FastISel.h
U    include/llvm/CodeGen/SelectionDAGISel.h
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/CallingConvLower.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U    lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.h
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 16:37:18 +00:00
Gabor Greif
9085fcab82 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 16:31:08 +00:00
Gabor Greif
bf2eefdb0d cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107983 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 16:26:41 +00:00
Gabor Greif
8ba992ad52 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107982 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 16:22:36 +00:00
Gabor Greif
e80ba4f884 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107981 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 16:17:52 +00:00
Gabor Greif
03f09a3e32 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107980 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 16:08:33 +00:00
Gabor Greif
c654d1b8c1 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107979 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 16:01:21 +00:00
Gabor Greif
d7cc5215f1 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107978 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 15:53:42 +00:00
Gabor Greif
1f2c0c9ead cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107977 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 15:52:36 +00:00
Gabor Greif
7656018c22 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107976 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 15:40:10 +00:00
Gabor Greif
7556cf541b cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107975 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 15:25:42 +00:00
Gabor Greif
5896935423 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107974 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 15:25:09 +00:00
Gabor Greif
fc36c0f21f cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107972 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 15:01:36 +00:00
Gabor Greif
1d3ae029c4 cache result of operator* (found by inspection) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107971 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 14:48:08 +00:00
Gabor Greif
0814985887 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107969 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 14:36:49 +00:00
Gabor Greif
a29742df5f cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107968 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 14:29:14 +00:00
Gabor Greif
5891ac8be8 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107967 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 14:28:41 +00:00
Gabor Greif
5417a03b55 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107966 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 14:18:23 +00:00
Gabor Greif
9672414017 cache operator*'s result (in multiple functions) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107965 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 14:02:13 +00:00
Gabor Greif
517e124d53 do not repeatedly dereference use_iterator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107963 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 13:17:13 +00:00
Gabor Greif
b654435712 do not repeatedly dereference use_iterator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107962 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 12:23:50 +00:00
Jakob Stoklund Olesen
8154f96f44 Avoid creating %physreg:subidx operands in SimpleRegisterCoalescing::RemoveCopyByCommutingDef. 
This fixes PR7602.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107957 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 05:56:21 +00:00
Jakob Stoklund Olesen
846a31881f Deal with a few remaining spots that assume physical registers have live intervals. 
This fixes PR7601.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107955 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 04:35:38 +00:00
Bruno Cardoso Lopes
be95c15903 Merge VEX enums with other x86 enum forms. Also fix all checks of which VEX 
fields to use. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107952 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 01:56:45 +00:00
Jakob Stoklund Olesen
665eb12466 Fix broken isCopy handling in TrimLiveIntervalToLastUse. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 01:27:21 +00:00
Jakob Stoklund Olesen
1769cccfc8 Handle COPY in VirtRegRewriter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 01:27:19 +00:00
Dan Gohman
01dcb18cf3 Fix the memoperand offsets in code generated for va_start. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107948 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 01:06:48 +00:00
Chris Lattner
c5f5626a29 have the mc lowering process handle a few tail call forms, lowering them to 
jumps where possible and turning the TAILCALL marker in the instruction
asm string into a proper comment.

This eliminates a FIXME and is on the path to finishing:
rdar://7639610 - eliminate encoding and asm info for TAILJMPd TAILJMPr TAILJMPn, etc.

However, I can't eliminate the encodings for these instructions because the JIT
still exists and has its own copy of the encoder, sigh.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107946 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 00:49:41 +00:00
Bob Wilson
a0148c360e Print "dregpair" NEON operands with a space between them, for readability and 
consistency with other instructions that have lists of register operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107944 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 00:47:20 +00:00
Dan Gohman
bf87e24917 Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting 
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107943 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 00:39:23 +00:00
Bruno Cardoso Lopes
1cd050931f Factor out x86 segment override prefix encoding, and also use it for VEX 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107942 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 00:38:14 +00:00
Bob Wilson
f1d93ca920 Reenable DAG combining for vector shuffles. It looks like it was temporarily 
disabled and then never turned back on again.  Adjust some tests, one because
this change avoids an unnecessary instruction, and the other to make it
continue testing what it was intended to test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107941 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 00:38:12 +00:00
Chris Lattner
757e8d6d2e reject pseudo instructions early in the encoder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107939 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 00:17:50 +00:00
Bruno Cardoso Lopes
96716c7b92 Remove trailing whitespaces from file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107937 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-09 00:07:19 +00:00
Chris Lattner
599b531a96 Change LEA to have 5 operands for its memory operand, just 
like all other instructions, even though a segment is not
allowed.  This resolves a bunch of gross hacks in the 
encoder and makes LEA more consistent with the rest of the
instruction set.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107934 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 23:46:44 +00:00
Stuart Hastings
99cfb69f17 Reverting r107918 and r107919. Radar 8063111. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107930 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 23:25:39 +00:00
Jakob Stoklund Olesen
21e9445952 Revert "Fix broken isCopy handling in TrimLiveIntervalToLastUse" 
This reverts commit 107921. It broke the clang self host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107926 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:52:47 +00:00
Chris Lattner
ac0ed5dc08 add some long-overdue enums to refer to the parts of the 5-operand 
X86 memory operand.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107925 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:41:28 +00:00
Devang Patel
0afbf23453 Relax assertion. In optimized code, it is possible that first instruction is coming from a inlined function. 
This fixes PR7596 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107923 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:39:20 +00:00
Bill Wendling
c930cbcada Extension of r107506. Make sure that we don't mark a function as having a call 
if the inline ASM doesn't need a stack frame.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107922 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:38:02 +00:00
Jakob Stoklund Olesen
7cc4f9cd28 Fix broken isCopy handling in TrimLiveIntervalToLastUse 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107921 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:30:38 +00:00
Jakob Stoklund Olesen
61c8eccf24 Remember the VR64 register class 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107920 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:30:35 +00:00
Stuart Hastings
c0e2639a34 Fix decl/def debug info for template functions. Radar 8063111. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107919 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:28:59 +00:00
Chris Lattner
834df19452 Rework segment prefix emission code to handle segments 
in memory operands at the same type as hard coded segments.
This fixes problems where we'd emit the segment override after
the REX prefix on instructions like:
mov %gs:(%rdi), %rax

This fixes rdar://8127102.  I have several cleanup patches coming
next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107917 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:28:12 +00:00
Chris Lattner
751e1123ce introduce a new X86II::getMemoryOperandNo method, which 
returns the start of the memory operand for an instruction.

Introduce a new "X86AddrSegment" enum to reduce # magic numbers
referring to X86 memory operand layout.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107916 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 22:27:06 +00:00
Kalle Raiskila
d258c49589 Switch SPU calling convention (function arguments) 
to a Tablegen implementation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107913 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 21:15:22 +00:00
Kevin Enderby
1b02acb2a0 Revert some unneeded parts of the change in r107886 for the 
.weak_def_can_be_hidden directive.  Chris pointed out that the MCAsmInfo.h/.cpp
chunks aren't needed for this until the compiler starts generating these.  And
when that happens it will be more convenient for it to be a bool than a const
char*.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107906 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 20:30:44 +00:00
Evan Cheng
5d115a0ff9 Check for FiniteOnlyFPMath as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107904 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 20:12:24 +00:00
Devang Patel
ca76f6f57c Reuse DIEInteger for 1. This is frequently used while emitting an attribute using dwarf::DW_FORM_flag form. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107903 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 20:10:35 +00:00
Jakob Stoklund Olesen
7db1e7a527 Teach the x86 floating point stackifier to handle COPY instructions. 
This pass runs before COPY instructions are passed to copyPhysReg, so we simply
translate COPY to the proper pseudo instruction. Note that copyPhysReg does not
handle floating point stack copies.

Once COPY is used everywhere, this can be cleaned up a bit, and most of the
pseudo instructions can be removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107899 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 19:46:30 +00:00
Jakob Stoklund Olesen
320bdcbfe2 Implement X86InstrInfo::copyPhysReg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107898 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 19:46:25 +00:00
Bob Wilson
1425c6a927 The NEONPreAllocPass should never have to assign fixed registers anymore. 
This pass can go away entirely soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107892 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 17:45:26 +00:00
Bob Wilson
8190173350 For big-endian systems, VLD2/VST2 with 32-bit vector elements will swap the 
words within the 64-bit D registers.  Use VLD1/VST1 with 64-bit elements
instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107890 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 17:44:00 +00:00
Kevin Enderby
f59cac5ed3 Added the darwin .weak_def_can_be_hidden directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107886 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 17:22:42 +00:00
Bob Wilson
8af4c54af1 Clean up a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107882 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 16:54:45 +00:00
Jim Grosbach
ed903d746d Clean up scavengeRegister() a bit to prefer available regs, which allows 
the simplification of frame index register scavenging to not have to check
for available registers directly and instead just let scavengeRegister()
handle it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107880 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 16:49:26 +00:00
Jakob Stoklund Olesen
0bc25f4040 Convert EXTRACT_SUBREG to COPY when emitting machine instrs. 
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.

Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 16:40:22 +00:00
Jakob Stoklund Olesen
5c00e07795 Remove references to INSERT_SUBREG after de-SSA. 
Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of
INSERT_SUBREG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107878 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 16:40:15 +00:00
Benjamin Kramer
cde51108de Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107868 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 12:09:56 +00:00
Benjamin Kramer
1db071f0da Teach instcombine to transform 
(X >s -1) ? C1 : C2 and (X <s  0) ? C2 : C1
into ((X >>s 31) & (C2 - C1)) + C1, avoiding the conditional.

This optimization could be extended to take non-const C1 and C2 but we better
stay conservative to avoid code size bloat for now.

for
int sel(int n) {
     return n >= 0 ? 60 : 100;
}

we now generate
  sarl  $31, %edi
  andl  $40, %edi
  leal  60(%rdi), %eax

instead of
  testl %edi, %edi
  movl  $60, %ecx
  movl  $100, %eax
  cmovnsl %ecx, %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107866 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 11:39:10 +00:00
Eric Christopher
fb31ccb68c A slight reworking of the custom patterns for x86-64 tpoff codegen and 
correct the testcase for valid assembly.

Needs more tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107860 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 07:36:46 +00:00
Evan Cheng
4ff7ab612c r107852 is only safe with -enable-unsafe-fp-math to account for +0.0 == -0.0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107856 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 06:01:49 +00:00
Jakob Stoklund Olesen
3651d92d91 Add TargetInstrInfo::copyPhysReg hook and use it from LowerSubregs. 
This target hook is intended to replace copyRegToReg entirely, but for now it
calls copyRegToReg.

Any remaining calls to copyRegToReg wil be replaced by COPY instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107854 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 05:01:41 +00:00
Evan Cheng
515fe3a588 Optimize some vfp comparisons to integer ones. This patch implements the simplest case when the following conditions are met: 
1. The arguments are f32.
2. The arguments are loads and they have no uses other than the comparison.
3. The comparison code is EQ or NE.

e.g.
        vldr.32 s0, [r1]
        vldr.32 s1, [r0]
        vcmpe.f32       s1, s0
        vmrs    apsr_nzcv, fpscr
	beq     LBB0_2
=>
        ldr     r1, [r1]
        ldr     r0, [r0]
        cmp     r0, r1
        beq     LBB0_2

More complicated cases will be implemented in subsequent patches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107852 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 02:08:50 +00:00
Dale Johannesen
7835f1fcdb Changes to ARM tail calls, mostly cosmetic. 
Add explicit testcases for tail calls within the same module.
Duplicate some code to humor those who think .w doesn't apply on ARM.
Leave this disabled on Thumb1, and add some comments explaining why it's hard
and won't gain much.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107851 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 01:18:23 +00:00
Dan Gohman
f595141525 Revert 107840 107839 107813 107804 107800 107797 107791. 
Debug info intrinsics win for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 01:00:56 +00:00
Jim Grosbach
d9642faf7c When processing frame index virtual registers, consider all available registers 
(if there are any) and use the one which remains available for the longest
rather than just using the first one. This should help enable better re-use
of the loaded frame index values. rdar://7318760



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107847 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 00:38:54 +00:00
Chris Lattner
0238f8c430 Fix the second half of PR7437: scalarrepl wasn't preserving 
address spaces when SRoA'ing memcpy's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107846 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-08 00:27:05 +00:00
Dan Gohman
49dcb0f9ec Don't forward-declare registers for static allocas, which we'll 
prefer to materialize as local constants. This fixes the clang
bootstrap abort.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107840 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 23:52:58 +00:00
Dan Gohman
61b7cea126 Fix -fast-isel-abort to check the right instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107839 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 23:47:25 +00:00
Chris Lattner
8fff12605e use PrintEscapedString to handle attribute section with escapes in it, 
PR7399.  The asm parser already handles this.  This is of dubious 
utility (see the PR) but the asmprinter was clearly broken here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107834 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 23:16:37 +00:00
Jakob Stoklund Olesen
5febd075df fix copies to/from GR8_ABCD_H even more 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107832 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 23:04:56 +00:00
Jim Grosbach
03e2d44722 grammar 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107831 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:53:35 +00:00
Jim Grosbach
c7937ae025 Handle cases where the post-RA scheduler may move instructions between the 
address calculation instructions leading up to a jump table when we're trying
to convert them into a TB[H] instruction in Thumb2. This realistically
shouldn't happen much, if at all, for well formed inputs, but it's more correct
to handle it. rdar://7387682



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107830 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:51:22 +00:00
Chris Lattner
da3051a17f finish up support for callw: PR7195 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107826 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:35:13 +00:00
Chris Lattner
9fc05227a2 Implement the major chunk of PR7195: support for 'callw' 
in the integrated assembler.  Still some discussion to be
done.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107825 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:27:31 +00:00
Bruno Cardoso Lopes
cc69e13a36 Add more assembly opcodes for SSE compare instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107823 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:24:03 +00:00
Devang Patel
8aa61477e3 One MDNode may be used to create regular DIE as well as abstract DIE. 
Keep track of abstract subprogram DIEs. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107822 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:20:57 +00:00
Evan Cheng
bcc8017c73 Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107820 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 22:15:37 +00:00
Devang Patel
03753fc734 Print undefined/unknown debug value as "undef". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107818 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 21:52:21 +00:00
Dan Gohman
5c480432b5 Not all custom inserters create new basic blocks. If the inserter 
didn't create a new block, don't reset the insert position.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107813 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 21:18:22 +00:00
Jim Grosbach
26b8ef53ff grammar and trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107811 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 21:06:51 +00:00
Devang Patel
869aa463c8 Rename couple of maps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107810 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 20:49:57 +00:00
Jakob Stoklund Olesen
f2e4afd96c Allow copies between GR8_ABCD_L and GR8_ABCD_H. 
This fixes PR7540.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107809 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 20:33:27 +00:00
Devang Patel
6140962aba 80 cols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107807 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 20:12:52 +00:00
Dan Gohman
4df83ed159 Implement bottom-up fast-isel. This has the advantage of not requiring 
a separate DCE pass over MachineInstrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107804 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 19:20:32 +00:00
Dan Gohman
f423a69839 Add X86FastISel support for return statements. This entails refactoring 
a bunch of stuff, to allow the target-independent calling convention
logic to be employed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107800 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 18:32:53 +00:00
Bruno Cardoso Lopes
ced9ec9bac Add AVX AES instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107798 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 18:24:20 +00:00
Dan Gohman
5fc3da0665 Update the insert position after scheduling, which may change the 
position when emitting multiple blocks when executing a custom
inserter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107797 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 18:22:13 +00:00
Devang Patel
cc87bfb59b Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107796 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 18:18:18 +00:00
Dan Gohman
643fffe429 Fix debugging strings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107795 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 17:28:45 +00:00
Dan Gohman
eabaed26c3 Give FunctionLoweringInfo an MBB member, avoiding the need to pass it 
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 16:47:08 +00:00
Dan Gohman
a4160c3434 Simplify FastISel's constructor by giving it a FunctionLoweringInfo 
instance, rather than pointers to all of FunctionLoweringInfo's
members.

This eliminates an NDEBUG ABI sensitivity.


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 2010-07-07 16:29:44 +00:00
Dan Gohman
4c3fd9f92f Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This will 
allow target-specific fast-isel code to make use of it directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107787 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 16:01:37 +00:00
Dan Gohman
c9403659a9 Split the SDValue out of OutputArg so that SelectionDAG-independent 
code can do calling-convention queries. This obviates OutputArgReg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 15:54:55 +00:00
Chris Lattner
29269d03af add some triple for minix, patch by Kees van Reeuwijk from PR7582 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107785 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 15:52:27 +00:00
Dan Gohman
2f2b0abbac Move CallingConvLower.cpp out of the SelectionDAG directory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107781 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 15:15:27 +00:00
Jakob Stoklund Olesen
fcb4ccd7aa Fix more places assuming subregisters have live intervals 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107780 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 14:41:22 +00:00
Dan Gohman
d463a74464 Add a getFirstNonPHI utility function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107778 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 14:33:51 +00:00
Dan Gohman
b8c86a010c Minore code simplification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107777 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 14:30:04 +00:00
Dan Gohman
9e86f4364b Remove interprocedural-basic-aa and associated code. The AliasAnalysis 
interface needs implementations to be consistent, so any code which
wants to support different semantics must use a different interface.
It's not currently worthwhile to add a new interface for this new
concept.

Document that AliasAnalysis doesn't support cross-function queries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107776 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 14:27:09 +00:00
Gabor Greif
274fefdd96 conditionalize by CallInst::ArgOffset 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107767 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 10:34:03 +00:00
Duncan Sands
8246adc1f0 Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts" 
builds to "Release".  The default build is unchanged (optimization on,
assertions on), however it is now called Release+Asserts.  The intent
is that future LLVM releases released via llvm.org will be Release builds
in the new sense, i.e. will have assertions disabled (currently they have
assertions enabled, for a more than 20% slowdown).  This will bring them
in line with MacOS releases, which ship with assertions disabled.  It also
means that "Release" now means the same things in make and cmake builds:
cmake already disables assertions for "Release" builds AFAICS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107758 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 07:48:00 +00:00
Bruno Cardoso Lopes
4f6bdf9042 Add AVX SSE4.2 instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107752 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 03:39:29 +00:00
Bruno Cardoso Lopes
332fce49e3 Use only one multiclass to pinsrq instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107750 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:43:01 +00:00
Bruno Cardoso Lopes
5e9fa98523 Now that almost all SSE4.1 AVX instructions are added, move code around to more appropriate sections. No functionality changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107749 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:33:38 +00:00
Bruno Cardoso Lopes
09df2ae0d0 Add AVX SSE4.1 insertps, ptest and movntdqa instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107747 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:14:56 +00:00
Bruno Cardoso Lopes
3c14822312 Add AVX SSE4.1 extractps and pinsr instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 01:01:13 +00:00
Jakob Stoklund Olesen
4b76ffc1ff Revert "Remove references to INSERT_SUBREG after de-SSA" r107725. 
Buildbot breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107744 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:32:25 +00:00
Bob Wilson
78dfbc380d Also use REG_SEQUENCE for VTBX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107743 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:08:54 +00:00
Jim Grosbach
e97f968a69 Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's where 
they've been tested to work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107742 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:07:57 +00:00
Bruno Cardoso Lopes
4fd32db6a6 Add AVX SSE4.1 Extract Integer instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-07 00:07:24 +00:00
Jim Grosbach
c66e150b2c By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing rather 
than assuming a target will custom lower them. Targets which do so should
exlicitly mark them as having custom lowerings. PR7454.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107734 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:44:52 +00:00
Jakob Stoklund Olesen
d3b376b448 Remove references to INSERT_SUBREG after de-SSA 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107732 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:40:35 +00:00
Bob Wilson
d491d6ecd2 Use REG_SEQUENCE nodes to make the table registers for VTBL instructions be 
allocated to consecutive registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107730 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:36:25 +00:00
Dale Johannesen
e2b448c208 Accept RIP-relative symbols with 'i' constraint, and 
print the (%rip) only if the 'a' modifier is present.
PR 7528.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107727 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:27:00 +00:00
Jakob Stoklund Olesen
ed2185e171 Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass. 
INSERT_SUBREG will now only appear in SSA machine instructions.

Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant
since partial redef COPY instructions appear.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107726 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:26:25 +00:00
Jakob Stoklund Olesen
fca3a25fed Track defs for all aliases in NEONMoveFix. 
This means that an instruction defining an S register will affect the domain of
the parent D register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107725 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:26:23 +00:00
Bruno Cardoso Lopes
ee94e8297e Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107723 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:15:17 +00:00
Bruno Cardoso Lopes
36869b69b0 Add part of AVX SSE4.1 packed move with sign/zero extend instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 23:01:41 +00:00
Bruno Cardoso Lopes
0106680a2c Fix comment from previous patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107717 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:38:32 +00:00
Bruno Cardoso Lopes
07de40629f Add AVX vblendvpd, vblendvps and vpblendvb instructions 
Update VEX encoding to support those new instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107715 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:36:24 +00:00
Dan Gohman
c9af33c685 CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext. 
SelectBasicBlock doesn't needs its BasicBlock argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107712 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:19:37 +00:00
Devang Patel
0d881dabc1 Propagate debug loc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 22:08:15 +00:00
Bob Wilson
f967ca0eaf Represent NEON load/store alignments in bytes, not bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107701 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:26:18 +00:00
Jakob Stoklund Olesen
5ee99923c1 One more case assuming that subregs have live ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107700 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:13:03 +00:00
Jakob Stoklund Olesen
813eedd207 Fix buildbot breakage where a def is missing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107698 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:06:39 +00:00
Devang Patel
6db2389d69 Add fixme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107697 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 21:05:17 +00:00
Jakob Stoklund Olesen
9c2e7ca351 Be more forgiving when calculating alias interference for physreg coalescing. 
It is OK for an alias live range to overlap if there is a copy to or from the
physical register. CoalescerPair can work out if the copy is coalescable
independently of the alias.

This means that we can join with the actual destination interval instead of
using the getOrigDstReg() hack. It is no longer necessary to merge clobber
ranges into subregisters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107695 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 20:31:51 +00:00
Dan Gohman
14152b480d Reapply r107655 with fixes; insert the pseudo instruction into 
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 20:24:04 +00:00
Eric Christopher
894339e19f Fix to 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107684 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:35:20 +00:00
Devang Patel
be35be614c Fix PR7545 crash. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107678 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 18:18:32 +00:00
Rafael Espindola
a5e82a5748 Don't create neon moves in CopyRegToReg. NEONMoveFixPass will do the conversion 
if profitable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107673 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 16:24:34 +00:00
Chris Lattner
f8bd392dce tighten up this code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:59:27 +00:00
Dan Gohman
258c58cc62 Revert r107655. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107668 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:49:48 +00:00
Dan Gohman
aa8c19405a Add versions of OutputArgReg, AnalyzeReturn, and AnalyzeCallOperands 
which do not depend on SelectionDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:39:54 +00:00
Dan Gohman
c2af869d62 Make getMinimalPhysRegClass' comment mention what makes it different 
from getPhysicalRegisterRegClass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:31:55 +00:00
Anton Korobeynikov
36335be3b9 Fix a major regression on COFF targets introduced by r103267: 'discardable' section means that it is used only during the program load and can be discarded afterwards. 
This way *only* debug sections can be discarded, but not the opposite. Seems like the copy-and-pasto from ELF code, since there it contains the reverse flag ('alloc').

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107658 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:24:56 +00:00
Dan Gohman
0ce249911b Add some more TODO comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107657 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:23:00 +00:00
Dan Gohman
d3b6e41ffb Add a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107656 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:21:57 +00:00
Dan Gohman
b81c771c0d Fix a bunch of custom-inserter functions to handle the case where 
the pseudo instruction is not at the end of the block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107655 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 15:18:19 +00:00
Eric Christopher
f7a0c7bf8b Fix up -fstack-protector on linux to use the segment 
registers.  Split out testcases per architecture and os
now.

Patch from Nelson Elhage.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107640 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 05:18:56 +00:00
Nick Lewycky
10d2f4d01b Detabify this file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107637 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-06 03:53:43 +00:00
Eric Christopher
62f35a2c13 Have the X86 backend use Triple instead of a string and some enums. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107625 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-05 19:26:33 +00:00
Kalle Raiskila
5cb97d16f8 Remove some unused/redundant code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107622 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-05 18:40:09 +00:00
Chris Lattner
32b4b5aea6 more tidying. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107615 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-05 05:53:14 +00:00
Chris Lattner
c06cbad141 some notes about suboptimal insertps's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107613 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-05 05:48:41 +00:00
Chris Lattner
598751ed25 random tidying 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107612 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-05 05:36:21 +00:00
Chris Lattner
a5b412581c rip out even more sporadic v2f32 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107610 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-05 04:38:33 +00:00
Chris Lattner
39aa20a981 rip out the various v2f32 "mmx" handling logic, now that 
v2f32 is illegal on x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107609 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-05 04:36:27 +00:00