Commit Graph

39888 Commits

Author SHA1 Message Date
Rafael Espindola
db77609991 Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp.
The first one was used just to call isSafeToMoveRegClassDefs. In
general, using a more specific reg class is better, in practice only
x86 implements that method and the results are always the same.

The second one is in FindFreeRegister and is used to check if a register
is in a register class, a much more direct call to contains is better as
it should cover more cases and is faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108093 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 16:45:17 +00:00
Jakob Stoklund Olesen
f7d55b97f0 Replace copyRegToReg with copyPhysReg for SystemZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 16:40:46 +00:00
Jakob Stoklund Olesen
75be45cb2e Avoid SSE instructions in FastIsel when it is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108091 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 16:22:13 +00:00
Chandler Carruth
c5080ba0c8 Remove two other uses of ATTRIBUTE_UNUSED for variables only used within
assert()s, switching to void-casts. Removed an unneeded Compiler.h include as
a result. There are two other uses in LLVM, but they're not due to assert()s,
so I've left them alone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108088 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 08:18:12 +00:00
Jakob Stoklund Olesen
a98625cdad Replace copyRegToReg with copyPhysReg for XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108087 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 07:56:13 +00:00
Jakob Stoklund Olesen
8e18a1a5cf Replace copyRegToReg with copyPhysReg for Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108086 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 07:56:09 +00:00
Jakob Stoklund Olesen
377b7b7ca3 Replace copyRegToReg with copyPhysReg for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108084 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 07:31:03 +00:00
Jakob Stoklund Olesen
27689b0aff Replace copyRegToReg with copyPhysReg for PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 07:31:00 +00:00
Jakob Stoklund Olesen
26a99d17de Fix PIC16 comments referencing copyRegToReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 07:30:57 +00:00
Jakob Stoklund Olesen
d86adf3d6e Replace copyRegToReg with copyPhysReg for PIC16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108081 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 06:53:33 +00:00
Jakob Stoklund Olesen
41ce3cfd1b Replace copyRegToReg with copyPhysReg for MSP430.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 06:53:30 +00:00
Jakob Stoklund Olesen
e6afcf8da2 Replace copyRegToReg with copyPhysReg for MBlaze.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108079 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 06:53:27 +00:00
Jakob Stoklund Olesen
ac27366700 Replace copyRegToReg with copyPhysReg for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 06:33:54 +00:00
Jakob Stoklund Olesen
629d80742a Replace copyRegToReg with copyPhysReg for Blackfin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108077 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 05:44:34 +00:00
Jakob Stoklund Olesen
4ea8771535 X86InstrInfo::copyRegToReg is dead. Long live copyPhysReg!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 05:44:30 +00:00
Jakob Stoklund Olesen
1ba318982e Use COPY in X86FastISel::X86SelectRet.
Don't try a cross-class copy. That is very unlikely anywy since return value
registers are usually register class friendly. (%EAX, %XMM0, etc).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 05:17:02 +00:00
Jakob Stoklund Olesen
e7917bb207 Use COPY for fast-isel bitconvert, but don't create cross-class copies.
This doesn't change the behavior of SelectBitcast for X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 05:16:54 +00:00
Rafael Espindola
cbeeae23c3 Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit.

The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:

* The 's' in target data: If this is set to the minimal alignment of any
  argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
  example.
* The getTransientStackAlignment method. It is possible for an architecture to
  have argument less aligned than what we maintain the stack pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 04:01:49 +00:00
Jakob Stoklund Olesen
e797e0c864 Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
This assumes that the registers can be copied which is probably a safe
assumption.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 03:31:05 +00:00
Jakob Stoklund Olesen
5127f79913 Use COPY in FastISel everywhere it is safe and trivial.
The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 03:31:00 +00:00
Jakob Stoklund Olesen
273c14f530 Replace copyRegToReg with copyPhysReg for Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108066 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 01:08:31 +00:00
Jakob Stoklund Olesen
99666a3429 Replace copyRegToReg with copyPhysReg for Alpha.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 01:08:23 +00:00
Jakob Stoklund Olesen
3ecf1f0179 Use COPY in targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 22:43:03 +00:00
Jakob Stoklund Olesen
1e1098c6f3 Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108062 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 22:42:59 +00:00
Jakob Stoklund Olesen
c0075cce7c Only collect subreg extracting copies for later coalescing.
This also avoids fatal copies from physregs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 22:42:53 +00:00
Dan Gohman
a8dab36f3d Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;
if a block is split (by a custom inserter), the insert point may be in a
different block than it was originally. This fixes 32-bit llvm-gcc
bootstrap builds, and I haven't been able to reproduce it otherwise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108060 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 22:42:31 +00:00
Duncan Sands
24080a9878 The accumulator tail recursion transform claims to work for any associative
operation, but the way it's implemented requires the operation to also be
commutative.  So add a check for commutativity (and tweak the corresponding
comments).  This makes no difference in practice since every associative
LLVM instruction is also commutative!  Here's an example to show the need
for commutativity: the accum_recursion.ll testcase calculates the factorial
function.  Before the transformation the result of a call is
  ((((1*1)*2)*3)...)*x
while afterwards it is
  (((1*x)*(x-1))...*2)*1
which clearly requires both associativity and commutativity of * to be equal
to the original.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 20:31:42 +00:00
Jakob Stoklund Olesen
92c1f72c54 Emit COPY instructions instead of using copyRegToReg in InstrEmitter,
ScheduleDAGEmit, TwoAddressLowering, and PHIElimination.

This switches the bulk of register copies to using COPY, but many less used
copyRegToReg calls remain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 19:08:25 +00:00
Jakob Stoklund Olesen
2b336bc4fe Don't emit st(0)/st(1) copies as FpMOV instructions. Use FpSET_ST? instead.
Based on a patch by Rafael Espíndola.

Attempt to make the FpSET_ST1 hack more robust, but we are still relying on
FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline
asm.

We support:

  FpSET_ST0
  INLINEASM

  FpSET_ST0
  FpSET_ST1
  INLINEASM

with and without kills on the arguments. We don't support:

  FpSET_ST1
  FpSET_ST0
  INLINEASM

nor

  FpSET_ST1
  INLINEASM

Just Don't Do It!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 17:42:34 +00:00
Dan Gohman
3cd26a2909 Insert IMPLICIT_DEF instructions at the current insert position, not
at the end of the block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 13:55:45 +00:00
Chandler Carruth
68eec39bca Add parentheses yet again to satisfy GCC's warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 12:06:22 +00:00
Dan Gohman
84023e0fbe Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
 - Eschew ST0 and ST1 for return values.
 - Fix the PIC base register initialization so that it doesn't ever
   fail to end up the top of the entry block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 09:00:22 +00:00
Jakob Stoklund Olesen
d737fcafc4 An x86 function returns a floating point value in st(0), and we must make sure
it is popped, even if it is ununsed. A CopyFromReg node is too weak to represent
the required sideeffect, so insert an FpGET_ST0 instruction directly instead.

This will matter when CopyFromReg gets lowered to a generic COPY instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 04:04:25 +00:00
Devang Patel
7a029b6d7e Update DBG_VALUE to refer appropriate stack slot in case of a spill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:48:31 +00:00
Bruno Cardoso Lopes
58dbf3784d Declare YMM subregisters in the right way! Thanks Jakob
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:46:19 +00:00
Bruno Cardoso Lopes
d52e78efac Add AVX 256-bit packed MOVNT variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:42:42 +00:00
Jakob Stoklund Olesen
61905c8ab3 Remember the *_TC opcodes for load/store
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:27:55 +00:00
Bruno Cardoso Lopes
2bfb8f6ef8 Add AVX 256-bit unpack and interleave
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:20:35 +00:00
Jakob Stoklund Olesen
8ea324093c Fix small bug in isMoveInstr -> COPY translation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108013 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:55:49 +00:00
Jakob Stoklund Olesen
1f32340d95 Automatically fold COPY instructions into stack load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:43:13 +00:00
Jakob Stoklund Olesen
9c50e8b890 Fix a few tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108011 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:43:09 +00:00
Jakob Stoklund Olesen
90fc0f4443 Remat uncoalescable COPY instrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:43:05 +00:00
Jim Grosbach
6c7d3a16b3 In the presence of variable sized objects, allocate an emergency spill slot.
rdar://8131327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:27:06 +00:00
Bill Wendling
8886c495a3 Clarify what mysterious check means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 19:44:12 +00:00
Dan Gohman
aa7426070d Fix MachineLICM to actually visit inner loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:49:45 +00:00
Bruno Cardoso Lopes
e86b01c153 Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:27:43 +00:00
Jakob Stoklund Olesen
e05442d508 Change TII::foldMemoryOperand API to require the machine instruction to be
inserted in a MBB, and return an already inserted MI.

This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.

The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 17:29:08 +00:00
Gabor Greif
e664267ae7 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:51:20 +00:00
Gabor Greif
19e5ada58a remove useless cast and fix typos in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107989 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:42:04 +00:00
Gabor Greif
f64f9cf7ec cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:39:02 +00:00
Bob Wilson
02266e29f9 --- Reverse-merging r107947 into '.':
U    utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U    test/CodeGen/X86/fast-isel.ll
U    test/CodeGen/X86/fast-isel-loads.ll
U    include/llvm/Target/TargetLowering.h
U    include/llvm/Support/PassNameParser.h
U    include/llvm/CodeGen/FunctionLoweringInfo.h
U    include/llvm/CodeGen/CallingConvLower.h
U    include/llvm/CodeGen/FastISel.h
U    include/llvm/CodeGen/SelectionDAGISel.h
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/CallingConvLower.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U    lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.h
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:37:18 +00:00
Gabor Greif
9085fcab82 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:31:08 +00:00
Gabor Greif
bf2eefdb0d cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:26:41 +00:00
Gabor Greif
8ba992ad52 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:22:36 +00:00
Gabor Greif
e80ba4f884 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:17:52 +00:00
Gabor Greif
03f09a3e32 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:08:33 +00:00
Gabor Greif
c654d1b8c1 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:01:21 +00:00
Gabor Greif
d7cc5215f1 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:53:42 +00:00
Gabor Greif
1f2c0c9ead cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:52:36 +00:00
Gabor Greif
7656018c22 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107976 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:40:10 +00:00
Gabor Greif
7556cf541b cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:25:42 +00:00
Gabor Greif
5896935423 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:25:09 +00:00
Gabor Greif
fc36c0f21f cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:01:36 +00:00
Gabor Greif
1d3ae029c4 cache result of operator* (found by inspection)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:48:08 +00:00
Gabor Greif
0814985887 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:36:49 +00:00
Gabor Greif
a29742df5f cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107968 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:29:14 +00:00
Gabor Greif
5891ac8be8 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107967 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:28:41 +00:00
Gabor Greif
5417a03b55 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107966 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:18:23 +00:00
Gabor Greif
9672414017 cache operator*'s result (in multiple functions)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107965 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:02:13 +00:00
Gabor Greif
517e124d53 do not repeatedly dereference use_iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107963 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 13:17:13 +00:00
Gabor Greif
b654435712 do not repeatedly dereference use_iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 12:23:50 +00:00
Jakob Stoklund Olesen
8154f96f44 Avoid creating %physreg:subidx operands in SimpleRegisterCoalescing::RemoveCopyByCommutingDef.
This fixes PR7602.

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2010-07-09 05:56:21 +00:00
Jakob Stoklund Olesen
846a31881f Deal with a few remaining spots that assume physical registers have live intervals.
This fixes PR7601.

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2010-07-09 04:35:38 +00:00
Bruno Cardoso Lopes
be95c15903 Merge VEX enums with other x86 enum forms. Also fix all checks of which VEX
fields to use. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 01:56:45 +00:00
Jakob Stoklund Olesen
665eb12466 Fix broken isCopy handling in TrimLiveIntervalToLastUse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 01:27:21 +00:00
Jakob Stoklund Olesen
1769cccfc8 Handle COPY in VirtRegRewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 01:27:19 +00:00
Dan Gohman
01dcb18cf3 Fix the memoperand offsets in code generated for va_start.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107948 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 01:06:48 +00:00
Chris Lattner
c5f5626a29 have the mc lowering process handle a few tail call forms, lowering them to
jumps where possible and turning the TAILCALL marker in the instruction
asm string into a proper comment.

This eliminates a FIXME and is on the path to finishing:
rdar://7639610 - eliminate encoding and asm info for TAILJMPd TAILJMPr TAILJMPn, etc.

However, I can't eliminate the encodings for these instructions because the JIT
still exists and has its own copy of the encoder, sigh.


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2010-07-09 00:49:41 +00:00
Bob Wilson
a0148c360e Print "dregpair" NEON operands with a space between them, for readability and
consistency with other instructions that have lists of register operands.


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2010-07-09 00:47:20 +00:00
Dan Gohman
bf87e24917 Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.


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2010-07-09 00:39:23 +00:00
Bruno Cardoso Lopes
1cd050931f Factor out x86 segment override prefix encoding, and also use it for VEX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 00:38:14 +00:00
Bob Wilson
f1d93ca920 Reenable DAG combining for vector shuffles. It looks like it was temporarily
disabled and then never turned back on again.  Adjust some tests, one because
this change avoids an unnecessary instruction, and the other to make it
continue testing what it was intended to test.


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2010-07-09 00:38:12 +00:00
Chris Lattner
757e8d6d2e reject pseudo instructions early in the encoder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 00:17:50 +00:00
Bruno Cardoso Lopes
96716c7b92 Remove trailing whitespaces from file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 00:07:19 +00:00
Chris Lattner
599b531a96 Change LEA to have 5 operands for its memory operand, just
like all other instructions, even though a segment is not
allowed.  This resolves a bunch of gross hacks in the 
encoder and makes LEA more consistent with the rest of the
instruction set.

No functionality change.


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2010-07-08 23:46:44 +00:00
Stuart Hastings
99cfb69f17 Reverting r107918 and r107919. Radar 8063111.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107930 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 23:25:39 +00:00
Jakob Stoklund Olesen
21e9445952 Revert "Fix broken isCopy handling in TrimLiveIntervalToLastUse"
This reverts commit 107921. It broke the clang self host.

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2010-07-08 22:52:47 +00:00
Chris Lattner
ac0ed5dc08 add some long-overdue enums to refer to the parts of the 5-operand
X86 memory operand.



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2010-07-08 22:41:28 +00:00
Devang Patel
0afbf23453 Relax assertion. In optimized code, it is possible that first instruction is coming from a inlined function.
This fixes PR7596 .



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2010-07-08 22:39:20 +00:00
Bill Wendling
c930cbcada Extension of r107506. Make sure that we don't mark a function as having a call
if the inline ASM doesn't need a stack frame.


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2010-07-08 22:38:02 +00:00
Jakob Stoklund Olesen
7cc4f9cd28 Fix broken isCopy handling in TrimLiveIntervalToLastUse
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107921 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 22:30:38 +00:00
Jakob Stoklund Olesen
61c8eccf24 Remember the VR64 register class
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2010-07-08 22:30:35 +00:00
Stuart Hastings
c0e2639a34 Fix decl/def debug info for template functions. Radar 8063111.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 22:28:59 +00:00
Chris Lattner
834df19452 Rework segment prefix emission code to handle segments
in memory operands at the same type as hard coded segments.
This fixes problems where we'd emit the segment override after
the REX prefix on instructions like:
mov %gs:(%rdi), %rax

This fixes rdar://8127102.  I have several cleanup patches coming
next.


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2010-07-08 22:28:12 +00:00
Chris Lattner
751e1123ce introduce a new X86II::getMemoryOperandNo method, which
returns the start of the memory operand for an instruction.

Introduce a new "X86AddrSegment" enum to reduce # magic numbers
referring to X86 memory operand layout.


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2010-07-08 22:27:06 +00:00
Kalle Raiskila
d258c49589 Switch SPU calling convention (function arguments)
to a Tablegen implementation.


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2010-07-08 21:15:22 +00:00
Kevin Enderby
1b02acb2a0 Revert some unneeded parts of the change in r107886 for the
.weak_def_can_be_hidden directive.  Chris pointed out that the MCAsmInfo.h/.cpp
chunks aren't needed for this until the compiler starts generating these.  And
when that happens it will be more convenient for it to be a bool than a const
char*.


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2010-07-08 20:30:44 +00:00
Evan Cheng
5d115a0ff9 Check for FiniteOnlyFPMath as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 20:12:24 +00:00
Devang Patel
ca76f6f57c Reuse DIEInteger for 1. This is frequently used while emitting an attribute using dwarf::DW_FORM_flag form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 20:10:35 +00:00
Jakob Stoklund Olesen
7db1e7a527 Teach the x86 floating point stackifier to handle COPY instructions.
This pass runs before COPY instructions are passed to copyPhysReg, so we simply
translate COPY to the proper pseudo instruction. Note that copyPhysReg does not
handle floating point stack copies.

Once COPY is used everywhere, this can be cleaned up a bit, and most of the
pseudo instructions can be removed.

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2010-07-08 19:46:30 +00:00