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37 Commits

Author SHA1 Message Date
Evan Cheng
ca1267c02b Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-31 20:40:39 +00:00
Dan Gohman
6f0d024a53 Rename MRegisterInfo to TargetRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-10 18:45:23 +00:00
Owen Anderson
43dbe05279 Move even more functionality from MRegisterInfo into TargetInstrInfo. 
Some day I'll get it all moved over...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-07 01:35:02 +00:00
Owen Anderson
d94b6a16fe Move some more functionality from MRegisterInfo to TargetInstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45603 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-04 23:57:37 +00:00
Owen Anderson
f6372aa1cc Move some more instruction creation methods from RegisterInfo into InstrInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-01 21:11:32 +00:00
Chris Lattner
4ee451de36 Remove attribution from file headers, per discussion on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 20:36:04 +00:00
Evan Cheng
d64b5c82b9 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-05 03:14:33 +00:00
Evan Cheng
aee4af68ae Remove redundant foldMemoryOperand variants and other code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44517 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-02 08:30:39 +00:00
Evan Cheng
e62f97c094 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44479 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-01 02:07:52 +00:00
Dale Johannesen
b97aec663b Add parameter to getDwarfRegNum to permit targets 
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-13 19:13:01 +00:00
Anton Korobeynikov
f191c80cd7 Use TableGen to emit information for dwarf register numbers. 
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-11 19:50:10 +00:00
Evan Cheng
f0a0cddbcd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. 
- Fix some copy+paste bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-18 21:29:24 +00:00
Evan Cheng
66f0f64082 - Added a few target hooks to generate load / store instructions from / to any 
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 01:32:41 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-26 06:25:56 +00:00
Evan Cheng
35b35c5c32 Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41597 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-30 05:52:20 +00:00
Evan Cheng
64d80e3387 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 01:14:50 +00:00
Anton Korobeynikov
2365f51ed0 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-14 14:06:15 +00:00
Evan Cheng
97de913821 eliminateFrameIndex() change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36626 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 09:13:03 +00:00
Evan Cheng
5c3885ce8e Under normal circumstances, when a frame pointer is not required, we reserve 
argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36607 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-01 00:52:08 +00:00
Evan Cheng
bf2c8b3c96 Added MRegisterInfo hook to re-materialize an instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 08:09:38 +00:00
Evan Cheng
140e33cfd1 Scavenge a register using the register scavenger when needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34966 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-06 10:03:56 +00:00
Evan Cheng
36230cdda4 Make requiresRegisterScavenging determination on a per MachineFunction basis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34711 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:59:19 +00:00
Evan Cheng
5e6df4647e PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-28 00:21:17 +00:00
Evan Cheng
5ef9226f30 Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34692 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-27 21:12:35 +00:00
Evan Cheng
ead7590581 Add option to turn on register scavenger; By default, spills kills the register being stored. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34514 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-23 01:09:11 +00:00
Jim Laskey
62819f3144 Support to provide exception and selector registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-21 22:54:50 +00:00
Evan Cheng
b371f457b0 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-19 21:49:54 +00:00
Reid Spencer
a284cbf667 For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-19 03:20:00 +00:00
Evan Cheng
eceada6728 Added getReservedRegs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-02-17 11:06:00 +00:00
Evan Cheng
6318ffd736 Getting rid uses of evil std::set<> 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33496 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-25 03:07:27 +00:00
Evan Cheng
dc77540d95 hasFP() is now a virtual method of MRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33455 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-23 00:57:47 +00:00
Evan Cheng
a8e2989ece ARM backend contribution from Apple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33353 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-19 07:51:42 +00:00
Evan Cheng
c2b861da18 Fix naming inconsistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32823 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-02 21:33:40 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Evan Cheng
0f3ac8d8d4 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 00:12:58 +00:00
Rafael Espindola
7bc59bc395 added a skeleton of the ARM backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28301 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-14 22:18:28 +00:00