Commit Graph

109321 Commits

Author SHA1 Message Date
Saleem Abdulrasool
586cf3d88d Transforms: reapply SVN r219899
This restores the commit from SVN r219899 with an additional change to ensure
that the CodeGen is correct for the case that was identified as being incorrect
(originally PR7272).

In the case that during inlining we need to synthesize a value on the stack
(i.e. for passing a value byval), then any function involving that alloca must
be stripped of its tailness as the restriction that it does not access the
parent's stack no longer holds.  Unfortunately, a single alloca can cause a
rippling effect through out the inlining as the value may be aliased or may be
mutated through an escaped external call.  As such, we simply track if an alloca
has been introduced in the frame during inlining, and strip any tail calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 18:27:37 +00:00
Robert Khasanov
e1610162fb [AVX512] Fix VSQRT packed instructions internal names.
No functional change


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220808 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 18:22:41 +00:00
Robert Khasanov
9371efbcdb [AVX512] Extended avx512_sqrt_packed (sqrt instructions) to VL subset.
Refactored through AVX512_maskable



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220806 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 18:15:20 +00:00
Robert Khasanov
59cb03d329 [AVX-512] Expanded rsqrt/rcp instructions to VL subset.
Refactored multiclass through AVX512_maskable



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220783 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 16:37:13 +00:00
Robert Khasanov
d4345dd85f [AVX512] Removed special case for cmp instructions in getVectorMaskingNode. Now cmp intrinsics lower as other intrinsics through VSELECT, and then VSELECT tranforms to AND in PerformSELECTCombine.
No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220779 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 16:17:14 +00:00
Robert Khasanov
edf556ec1f [x86] Simplify vector selection if condition value type matches vselect value type and true value is all ones or false value is all zeros.
This transformation worked if selector is produced by SETCC, however SETCC is needed only if we consider to swap operands. So I replaced SETCC check for this case.
Added tests for vselect of <X x i1> values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220777 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 15:59:40 +00:00
Aaron Ballman
7435fa333d Silencing an "enumeral and non-enumeral type in conditional expression" warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220775 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 13:12:13 +00:00
Robert Khasanov
4a52493457 [AVX512] Bring back vector-shuffle lowering support through broadcasts
Ffter commit at rev219046 512-bit broadcasts lowering become non-optimal. Most of tests on broadcasting and embedded broadcasting were changed and they doesn’t produce efficient code.

Example below is from commit changes (it’s the first test from test/CodeGen/X86/avx512-vbroadcast.ll):

 define   <16 x i32> @_inreg16xi32(i32 %a) {
 ; CHECK-LABEL: _inreg16xi32:
 ; CHECK:       ## BB#0:
-; CHECK-NEXT:    vpbroadcastd %edi, %zmm0
+; CHECK-NEXT:    vmovd %edi, %xmm0
+; CHECK-NEXT:    vpbroadcastd %xmm0, %ymm0
+; CHECK-NEXT:    vinserti64x4 $1, %ymm0, %zmm0, %zmm0
 ; CHECK-NEXT:    retq
 %b = insertelement <16 x i32> undef, i32 %a, i32 0
 %c = shufflevector <16 x i32> %b, <16 x i32> undef, <16 x i32> zeroinitializer
 ret <16 x i32> %c
}

Here, 256-bit broadcast was generated instead of 512-bit one.

In this patch
1) I added vector-shuffle lowering through broadcasts
2) Removed asserts and branches likes because this is incorrect
-  assert(Subtarget->hasDQI() && "We can only lower v8i64 with AVX-512-DQI");
3) Fixed lowering tests


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220774 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 12:28:51 +00:00
NAKAMURA Takumi
81ae170379 Reformat partially, where I touched for whitespace changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220773 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 11:54:52 +00:00
NAKAMURA Takumi
2ffeb9f523 LoopRerollPass.cpp: Use range-based loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220772 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 11:54:05 +00:00
NAKAMURA Takumi
0f06462959 Untabify and whitespace cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220771 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 11:53:30 +00:00
Peter Zotov
693bfa58d3 [OCaml] Enable -g for debug builds.
We don't care about pre-3.12.1 anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220767 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 06:15:41 +00:00
Peter Zotov
d02697bfa2 [OCaml] Fix whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220766 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 06:15:18 +00:00
David Blaikie
f9219079ac Minimize the scope of some variables, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220759 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 02:57:26 +00:00
Reid Kleckner
d5de327da0 X86: Implement the vectorcall calling convention
This is a Microsoft calling convention that supports both x86 and x86_64
subtargets. It passes vector and floating point arguments in XMM0-XMM5,
and passes them indirectly once they are consumed.

Homogenous vector aggregates of up to four elements can be passed in
sequential vector registers, but this part is not implemented in LLVM
and will be handled in Clang.

On 32-bit x86, it is similar to fastcall in that it uses ecx:edx as
integer register parameters and is callee cleanup. On x86_64, it
delegates to the normal win64 calling convention.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D5943

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220745 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 01:29:26 +00:00
Tim Northover
dd778c6c9f AArch64: enable Cortex-A57 FP balancing on Cortex-A53.
Benchmarks have shown that it's harmless to the performance there, and having a
unified set of passes between the two cores where possible helps big.LITTLE
deployment.

Patch by Z. Zheng.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220744 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 01:24:32 +00:00
Rafael Espindola
c35c39b73c Remove the PreserveSource linker mode.
I noticed that it was untested, and forcing it on caused some tests to fail:

    LLVM :: Linker/metadata-a.ll
    LLVM :: Linker/prefixdata.ll
    LLVM :: Linker/type-unique-odr-a.ll
    LLVM :: Linker/type-unique-simple-a.ll
    LLVM :: Linker/type-unique-simple2-a.ll
    LLVM :: Linker/type-unique-simple2.ll
    LLVM :: Linker/type-unique-type-array-a.ll
    LLVM :: Linker/unnamed-addr1-a.ll
    LLVM :: Linker/visibility1.ll

If it is to be resurrected, it has to be fixed and we should probably have a
-preserve-source command line option in llvm-mc and run tests with and without
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220741 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-28 00:24:16 +00:00
NAKAMURA Takumi
9ef2fd8775 AArch64InstrInfo.h: Fix a warning introduced in clang r220703. [-Winconsistent-missing-override]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220739 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 23:29:27 +00:00
Adam Nemet
6bc8d95153 [AVX512] Add vpermil variable version
This is implemented via a multiclass that derives from the vperm imm
multiclass.

Fixes <rdar://problem/18426089>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220737 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 23:08:40 +00:00
Adam Nemet
5c76721372 [AVX512] Clean up avx512_perm_imm to use X86VectorVTInfo
No functionality change.  No change in X86.td.expanded except that we only set
the CD8 attributes for the memory variants.  (This shouldn't be used unless we
have a memory operand.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220736 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 23:08:37 +00:00
Adam Nemet
7ba4de2ccc [AVX512] Derive vpermil* from avx512_perm_imm
This used to derive from avx512_pshuf_imm which is confusing.

NFC.  Compared X86.td.expanded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220735 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 23:08:34 +00:00
Adam Nemet
d0ee9ada16 [AVX512] Fix copy-and-paste bugs in vpermil
1) i512mem -> f512mem (this is the packed FP input being permuted)
2) element size is 64 bits in EVEX_CD8 for PD.

(A good illustration why X86VectorVTInfo is useful)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220734 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 23:08:31 +00:00
Rafael Espindola
0660f174cf Make it easier to pass a custom diagnostic handler to the IR linker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220732 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 23:02:10 +00:00
Pete Cooper
68aeef61f4 Fix a stackmap bug introduced in r220710.
For a call to not return in to the stackmap shadow, the shadow must end with the call.

To do this, we must insert any required nops *before* the call, and not after it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220728 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 22:38:45 +00:00
Jingyue Wu
cf84852133 [ScalarEvolution] Guard dump() with #if
to be consistent with its definition in ScalarEvolution.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220721 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 21:14:41 +00:00
Rafael Espindola
f6066a7fd3 Fix bug where sys::Wait could wait on wrong pid.
Setting ChildPid to -1 would cause waitpid to wait for any child process.

Patch by Daniel Reynaud!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220717 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 20:30:04 +00:00
Juergen Ributzka
52a6f59d41 [FastISel][AArch64] Emit immediate version of icmp (subs) for null pointer check.
This is a minor change to use the immediate version when the operand is a null
value. This should get rid of an unnecessary 'mov' instruction in debug
builds and align the code more with the one generated by SelectionDAG.

This fixes rdar://problem/18785125.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220713 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 19:58:36 +00:00
Juergen Ributzka
e2995ff88f [FastISel][AArch64] Optimize compare-and-branch for i1 to use 'tbz'.
Minor enhancement to use 'tbz' for i1 compare-and-branch to get rid of an 'and'
instruction.

This fixes rdar://problem/18784953.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220712 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 19:46:23 +00:00
Pete Cooper
7476f9c513 Stackmap shadows should consider call returns a branch target.
To avoid emitting too many nops, a stackmap shadow can include emitted instructions in the shadow, but these must not include branch targets.

A return from a call should count as a branch target as patching over the instructions after the call would lead to incorrect behaviour for threads currently making that call, when they return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220710 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 19:40:35 +00:00
Juergen Ributzka
b11c5b1078 [FastISel][AArch64] Use 'cbz' also for null values (pointers).
The pattern matching for a 'ConstantInt' value was too restrictive. Checking for
a 'Constant' with a bull value is sufficient for using an 'cbz/cbnz' instruction.

This fixes rdar://problem/18784732.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220709 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 19:38:05 +00:00
Juergen Ributzka
5745cad861 [FastISel][AArch64] Don't fold the 'and' instruction into the 'tbz/tbnz' instruction if it is in a different basic block.
This fixes a bug where the input register was not defined for the 'tbz/tbnz'
instruction. This happened, because we folded the 'and' instruction from a
different basic block.

This fixes rdar://problem/18784013.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220704 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 19:16:48 +00:00
Juergen Ributzka
d3a04223e8 [FastISel][AArch64] Fix load/store with frame indices.
At higher optimization levels the LLVM IR may contain more complex patterns for
loads/stores from/to frame indices. The 'computeAddress' function wasn't able to
handle this and triggered an assertion.

This fix extends the possible addressing modes for frame indices.

This fixes rdar://problem/18783298.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 18:21:58 +00:00
Kostya Serebryany
866ee52df3 [asan] experimental tracing for indirect calls, llvm part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220699 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 18:13:56 +00:00
Lang Hames
0059dd4dd1 [PBQP] Remove a spurious 'typename' keyword. This was causing an error on MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220690 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 17:59:51 +00:00
Lang Hames
6faab9d266 [PBQP] Clarify ambiguous-looking typedef.
This was causing an error on the hexagon bots.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220689 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 17:52:05 +00:00
Lang Hames
57902cc070 [PBQP] Unique allowed-sets for nodes in the PBQP graph and use pairs of these
sets as keys into a cache of interference matrice values in the Interference
constraint adder.

Creating interference matrices was one of the large remaining time-sinks in
PBQP. Caching them reduces the total compile time (when using PBQP) on the
nightly test suite by ~10%.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220688 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 17:44:25 +00:00
Michael Gottesman
86ec9c4081 Add MapVector::rbegin(), MapVector::rend() to completment MapVector::begin(), MapVector::end().
These just delegate to the underlying vector type in the MapVector.

Also just add in some sanity unittests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220687 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 17:20:53 +00:00
NAKAMURA Takumi
af628cc0b8 Prune CRLF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 12:37:26 +00:00
Oliver Stannard
b1d8e7e77c [ARM] Select VMAXNM and VMINNM regardless of operand order
Currently, the ARM backend will select the VMAXNM and VMINNM for these C
expressions:
  (a < b) ? a : b
  (a > b) ? a : b
but not these expressions:
  (a > b) ? b : a
  (a < b) ? b : a

This patch allows all of these expressions to be matched.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220671 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 09:23:02 +00:00
Yuri Gorshenin
75bb472c06 [asan-asm-instrumentation] Added comment describing how asm instrumentation works.
Summary: [asan-asm-instrumentation] Added comment describing how asm instrumentation works.

Reviewers: eugenis

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5970

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220670 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 08:38:54 +00:00
Rui Ueyama
490f286d15 Re-commit r220667.
C++ source given to check_cxx_source_compile should have define "main".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220669 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 08:16:18 +00:00
NAKAMURA Takumi
a85a0b317c Fix unicode chars into ascii in comment lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220668 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 08:08:18 +00:00
Rui Ueyama
e975522566 Revert "Include stddef.h before including cxxabi.h" to un-break buildbot
This reverts commit r220665.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220667 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 08:03:21 +00:00
Rui Ueyama
baa8acd546 Include stddef.h before including cxxabi.h
On FreeBSD 10.0, size_t needs to be defined before including cxxabi.h.
Currenty HAVE_CXXABI_H is not defined on FreeBSD because of that reason.
This patch teaches cmake and configure how to include it.

http://reviews.llvm.org/D5940



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220665 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 07:37:57 +00:00
David Majnemer
fe58be3733 InstCombine: Fix a combine assuming that icmp operands were integers
An icmp may have pointer arguments, it isn't limited to integers or
vectors of integers.

This fixes PR21388.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220664 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 05:47:49 +00:00
Rafael Espindola
e250b13ab9 LinkModules.cpp: don't repeat names in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220662 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-27 02:35:46 +00:00
David Blaikie
bcc5753df8 Remove some unnecessary casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220658 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-26 23:37:04 +00:00
Lang Hames
ce3a612d3a [PBQP] Tidying up as per Dave Blaikie's suggesions for r220642.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220655 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-26 22:12:02 +00:00
Lang Hames
2666eacaf5 [PBQP] Explicitly define copy/move operations for NodeMetadata to keep VS happy.
Hopefully this fixes the bug that was introduced in r220642, and not-quite-fixed
in r220649.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220653 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-26 21:55:54 +00:00
Arnold Schwaighofer
b26fb77d9b Add an option to the LTO code generator to disable vectorization during LTO
We used to always vectorize (slp and loop vectorize) in the LTO pass pipeline.

r220345 changed it so that we used the PassManager's fields 'LoopVectorize' and
'SLPVectorize' out of the desire to be able to disable vectorization using the
cl::opt flags 'vectorize-loops'/'slp-vectorize' which the before mentioned
fields default to.
Unfortunately, this turns off vectorization because those fields
default to false.
This commit adds flags to the LTO library to disable lto vectorization which
reconciles the desire to optionally disable vectorization during LTO and
the desired behavior of defaulting to enabled vectorization.

We really want tools to set PassManager flags directly to enable/disable
vectorization and not go the route via cl::opt flags *in*
PassManagerBuilder.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220652 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-26 21:50:58 +00:00