Commit Graph

1963 Commits

Author SHA1 Message Date
Misha Brukman
5914bf6ef5 Fix the SparcV8 register definitions that were imported from PPC template.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11833 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 21:00:05 +00:00
Misha Brukman
3dff822988 SparcV8 has different types of instructions, but F1 is only used for CALL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11832 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 20:52:20 +00:00
Chris Lattner
87124425d0 Fix failures in 099.go due to the cfgsimplify pass creating switch instructions
where there did not used to be any before


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11829 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 19:30:19 +00:00
Brian Gaeke
e785e531f4 SparcV8 skeleton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11828 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 19:28:19 +00:00
Brian Gaeke
150666fd82 Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11827 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 19:08:12 +00:00
Brian Gaeke
e3d6807ab5 Great renaming: Sparc --> SparcV9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11826 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 18:44:15 +00:00
Chris Lattner
5f2c7b1975 Teach the instruction selector how to transform 'array' GEP computations into X86
scaled indexes.  This allows us to compile GEP's like this:

int* %test([10 x { int, { int } }]* %X, int %Idx) {
        %Idx = cast int %Idx to long
        %X = getelementptr [10 x { int, { int } }]* %X, long 0, long %Idx, ubyte 1, ubyte 0
        ret int* %X
}

Into a single address computation:

test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        lea %EAX, DWORD PTR [%EAX + 8*%ECX + 4]
        ret

Before it generated:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        shl %ECX, 3
        add %EAX, %ECX
        lea %EAX, DWORD PTR [%EAX + 4]
        ret

This is useful for things like int/float/double arrays, as the indexing can be folded into
the loads&stores, reducing register pressure and decreasing the pressure on the decode unit.
With these changes, I expect our performance on 256.bzip2 and gzip to improve a lot.  On
bzip2 for example, we go from this:

10665 asm-printer           - Number of machine instrs printed
   40 ra-local              - Number of loads/stores folded into instructions
 1708 ra-local              - Number of loads added
 1532 ra-local              - Number of stores added
 1354 twoaddressinstruction - Number of instructions added
 1354 twoaddressinstruction - Number of two-address instructions
 2794 x86-peephole          - Number of peephole optimization performed

to this:
9873 asm-printer           - Number of machine instrs printed
  41 ra-local              - Number of loads/stores folded into instructions
1710 ra-local              - Number of loads added
1521 ra-local              - Number of stores added
 789 twoaddressinstruction - Number of instructions added
 789 twoaddressinstruction - Number of two-address instructions
2142 x86-peephole          - Number of peephole optimization performed

... and these types of instructions are often in tight loops.

Linear scan is also helped, but not as much.  It goes from:

8787 asm-printer           - Number of machine instrs printed
2389 liveintervals         - Number of identity moves eliminated after coalescing
2288 liveintervals         - Number of interval joins performed
3522 liveintervals         - Number of intervals after coalescing
5810 liveintervals         - Number of original intervals
 700 spiller               - Number of loads added
 487 spiller               - Number of stores added
 303 spiller               - Number of register spills
1354 twoaddressinstruction - Number of instructions added
1354 twoaddressinstruction - Number of two-address instructions
 363 x86-peephole          - Number of peephole optimization performed

to:

7982 asm-printer           - Number of machine instrs printed
1759 liveintervals         - Number of identity moves eliminated after coalescing
1658 liveintervals         - Number of interval joins performed
3282 liveintervals         - Number of intervals after coalescing
4940 liveintervals         - Number of original intervals
 635 spiller               - Number of loads added
 452 spiller               - Number of stores added
 288 spiller               - Number of register spills
 789 twoaddressinstruction - Number of instructions added
 789 twoaddressinstruction - Number of two-address instructions
 258 x86-peephole          - Number of peephole optimization performed

Though I'm not complaining about the drop in the number of intervals.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11820 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 07:00:55 +00:00
Chris Lattner
b6bac51351 * Make the previous patch more efficient by not allocating a temporary MachineInstr
to do analysis.

*** FOLD getelementptr instructions into loads and stores when possible,
    making use of some of the crazy X86 addressing modes.

For example, the following C++ program fragment:

struct complex {
    double re, im;
    complex(double r, double i) : re(r), im(i) {}
};
inline complex operator+(const complex& a, const complex& b) {
    return complex(a.re+b.re, a.im+b.im);
}
complex addone(const complex& arg) {
    return arg + complex(1,0);
}

Used to be compiled to:
_Z6addoneRK7complex:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
***     mov %EDX, %ECX
        fld QWORD PTR [%EDX]
        fld1
        faddp %ST(1)
***     add %ECX, 8
        fld QWORD PTR [%ECX]
        fldz
        faddp %ST(1)
***     mov %ECX, %EAX
        fxch %ST(1)
        fstp QWORD PTR [%ECX]
***     add %EAX, 8
        fstp QWORD PTR [%EAX]
        ret

Now it is compiled to:
_Z6addoneRK7complex:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        fld QWORD PTR [%ECX]
        fld1
        faddp %ST(1)
        fld QWORD PTR [%ECX + 8]
        fldz
        faddp %ST(1)
        fxch %ST(1)
        fstp QWORD PTR [%EAX]
        fstp QWORD PTR [%EAX + 8]
        ret

Other programs should see similar improvements, across the board.  Note that
in addition to reducing instruction count, this also reduces register pressure
a lot, always a good thing on X86.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11819 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 06:13:04 +00:00
Chris Lattner
2e68037187 Add a helper to create an addressing mode given all of the pieces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11818 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 06:01:07 +00:00
Chris Lattner
985fe3df6f add an inefficient way of folding structure and constant array indexes together
into a single LEA instruction.  This should improve the code generated for
things like X->A.B.C[12].D.

The bigger benefit is still coming though.  Note that this uses an LEA instruction
instead of an add, giving the register allocator more freedom.  We should probably
never generate ADDri32's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11817 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 03:45:50 +00:00
Chris Lattner
5a83096d6a Implement special case for storing an immediate into memory so that we don't need
an intermediate register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11816 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 02:56:58 +00:00
Brian Gaeke
748fba141f FunctionLiveVarInfo.h moved: include/llvm/CodeGen -> lib/Target/Sparc/LiveVar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11804 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-24 19:46:00 +00:00
Chris Lattner
2bcab1f900 Fix some unexpected fallout from the config.h changes. Because the CBE no
longer was getting this #include, it always fell back on the less precise
floating point initializer values, causing some testsuite failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11803 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-24 18:34:10 +00:00
Alkis Evlogimenos
743d0a1f83 Refactor rewinding code for finding the first terminator of a basic
block into MachineBasicBlock::getFirstTerminator().

This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11748 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 18:14:48 +00:00
Chris Lattner
fbc39d5045 Simplify code a bit, don't go off the end of the block, now that the current
block we are in might be empty


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11744 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 07:42:19 +00:00
Chris Lattner
65cf42d32f We were forgetting to add FP_REG_KILL instructions to basic blocks which will
eventually get an assignment due to elimination of PHIs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11743 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 07:29:45 +00:00
Chris Lattner
f7b42259e9 Work around a gas bug. Print '-9223372036854775808' as unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11729 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 03:27:05 +00:00
Chris Lattner
311ca2e51f Implement cast fp -> bool
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11728 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 03:21:41 +00:00
Chris Lattner
baa58a5691 Stop passing iterators around by reference now that we have ilists!
Implement cast Type::ULongTy -> double


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11726 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 03:10:10 +00:00
Chris Lattner
2d0a82570a Add a new cmove instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11722 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 01:16:05 +00:00
Chris Lattner
986618ebc7 Only insert FP_REG_KILL instructions in MachineBasicBlocks that actually
use FP instructions.  This reduces the number of instructions inserted in
176.gcc (for example) from 58074 to 101 (it doesn't use much FP, which
is typical).  This reduction speeds up the entire code generator.  In the
case of 176.gcc, llc went from taking 31.38s to 24.78s.  The passes that
sped up the most are the register allocator and the 2 live variable analysis
passes, which sped up 2.3, 1.3, and 1.5s respectively.  The asmprinter
pass also sped up because it doesn't print the instructions in comments :)

Note that this patch is likely to expose latent bugs in machine code passes,
because now basicblock can be empty, where they were never empty before.  I
cleaned out regalloclocal, but who knows about linscan :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11717 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 19:47:26 +00:00
Alkis Evlogimenos
890f92328d Move MOTy::UseType enum into MachineOperand. This eliminates the
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11715 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 19:23:26 +00:00
Chris Lattner
7ca04097ad Reduce the number of pointless copies inserted due to constant pointer refs.
Also, make an assertion actually fireable!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11713 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 17:35:42 +00:00
Chris Lattner
827832c705 Fix bug in previous checkout: leave the iterator at the first instruction
AFTER the GEP that was emitted.  :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11712 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 17:05:38 +00:00
Chris Lattner
3f1e8e7ceb Completely rewrite how getelementptr instructions are expanded. This has two
(minor) benefits right now:

1. An extra dummy MOVrr32 is gone.  This move would often be coallesced by
   both allocators anyway.
2. The code now uses the gep_type_iterator to walk the gep, which should future
   proof it a bit.  It still assumes that array indexes are Longs though.

These don't really justify rewriting the code.  The big benefit will come later
though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11710 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 07:04:00 +00:00
Alkis Evlogimenos
f216421181 When folding memory operands in machine instructions be careful to
leave register operands with the same use/def flags as the original
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11709 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 06:54:26 +00:00
Chris Lattner
14c6ef7ca1 Wow this is out of date. When we have _real_ code generator documentation,
this should be folded into it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11705 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 05:53:54 +00:00
Chris Lattner
6d2fdcfb8a The two address pass cannot handle two addr instructions where one incoming
value is a physreg and one is a virtreg.  For this reason, disable copy folding
entirely for physregs.  Also, use the new isMoveInstr target hook which gives us
folding of FP moves as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11700 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-22 04:44:58 +00:00
Chris Lattner
f358c5ad15 It is totally unacceptable to print out (literally) millions of zeros when
compiling 129.compress... so don't!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11649 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-20 05:49:22 +00:00
Chris Lattner
e6d04f1a99 Eliminate operator[] is deprecated warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11578 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-18 16:43:51 +00:00
Chris Lattner
fdc01cedd4 Fix deprecated operator[] warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11577 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-18 16:38:18 +00:00
Alkis Evlogimenos
e9118f3694 Fix argument size for MOVSX and MOVZX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11576 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-18 16:20:40 +00:00
Chris Lattner
cc0d2f586f Add support for GlobalAddress's for alkis
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11560 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 18:23:55 +00:00
Alkis Evlogimenos
9b9b7fc28d These store to memory too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11558 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 17:53:48 +00:00
Chris Lattner
acce13e4cc These store to memory, not read from it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11556 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 17:46:50 +00:00
Alkis Evlogimenos
d886ed99fb Instructiosn with 1 memory operand have 4 operands in our
representation.. duh!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11554 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:58:13 +00:00
Alkis Evlogimenos
f41dadafae Align case statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11552 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:50:41 +00:00
Alkis Evlogimenos
14ffe75c9c Add TEST and XCHG memory operand support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11550 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:48:42 +00:00
Alkis Evlogimenos
68bff8e15d Add OR and XOR memory operand support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11549 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:33:14 +00:00
Alkis Evlogimenos
e287a00440 Peephole optimize SUBmi{16,32} into SUBmi{16,32}b when immediate is 8
bits wide.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11548 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:14:29 +00:00
Alkis Evlogimenos
cacca82833 ADDmi{16,32} should be in the next case statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11547 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 15:10:11 +00:00
Alkis Evlogimenos
a7be982e72 Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT,
MOVSX, and MOVZX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11546 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 09:14:23 +00:00
Alkis Evlogimenos
89b0214b76 Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32}
and DECm{8,16,32} instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11545 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:49:20 +00:00
Alkis Evlogimenos
509d6d65b5 Add CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} and DECm{8,16,32} instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11544 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:49:00 +00:00
Alkis Evlogimenos
503770cfc3 Add SUB{rm,mr,mi}{8,16,32} instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11543 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:17:40 +00:00
Alkis Evlogimenos
18bd7bb4d4 Add support for folding memory operands for ADC, SBB and SUB instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11541 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:08:51 +00:00
Alkis Evlogimenos
69da6dba79 Add support for ADC{rm.mr}32 and SBB{rm,mr}32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11540 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:06:31 +00:00
Chris Lattner
ee0919bb10 Add a (hidden) option to print instructions that fail to fuse. It's looking
like compares and test's would be the next huge win...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11539 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 08:03:47 +00:00
Alkis Evlogimenos
17dc674c13 Add support for folding memory operands in MOVri{8,16,32} instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11538 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 07:47:20 +00:00
Chris Lattner
5b67252620 Expand the repertoire of the forms we can print and encode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11537 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 07:40:44 +00:00