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6433 Commits

Author SHA1 Message Date
Roman Divacky
5baf79edc0 Make ELF OS ABI dependent on the OS from target triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113508 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-09 17:57:50 +00:00
Dale Johannesen
f73c5587fa Move remaining MMX instructions from SSE to MMX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113501 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-09 17:13:07 +00:00
Dale Johannesen
4efb0feac8 Move most MMX instructions (defined as anything that 
uses MMX, even if it also uses other things) from InstrSSE
into InstrMMX.  No (intended) functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-09 01:02:39 +00:00
Chris Lattner
90b54547d9 fix rdar://8407548, I missed the commuted form of xchg/test without a suffix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 22:27:05 +00:00
Chris Lattner
a7f08b4970 fix wonky formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113426 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 22:22:10 +00:00
Chris Lattner
373c458850 fix bugs in push/pop segment support, rdar://8407242 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113422 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 22:13:08 +00:00
Dale Johannesen
52664c8efe Add intrinsic-based patterns for MMX PINSRW and PEXTRW. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113420 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 22:08:40 +00:00
Dale Johannesen
ab1deb998e Check in forgotten file. Should fix build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113409 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 21:09:48 +00:00
Dale Johannesen
246658f158 Slight cleanup, use only one form of MMXI_binop_rm_int. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113406 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 20:54:00 +00:00
Dale Johannesen
af4748168c Add intrinsic forms of mmx<->sse conversions. Notes: 
Omission of memory form of PI2PD is intentional; this
does not use an MMX register and does not put the chip
into MMX mode (PI2PS, oddly enough, does).
Operands of PI2PS follow the gcc builtin, not Intel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113388 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 19:15:38 +00:00
Bruno Cardoso Lopes
0a7dd4fa40 Minor change. Fix comments and remove unused and redundant code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113378 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 18:12:31 +00:00
Bruno Cardoso Lopes
1485cc2bb3 x86 vector shuffle lowering now relies only on target specific 
nodes to emit shuffles and don't do isel mask matching anymore.
- Add the selection of the remaining shuffle opcode (movddup)
- Introduce two new functions to "recognize" where we may get
potential folds and add several comments to them explaining why
they are not yet in the desidered shape.
- Add more patterns to fallback the case where we select
a specific shuffle opcode as if it could fold a load, but it
can't, so remap to a valid instruction.
- Add a couple of FIXMEs to address in the following days once
there's a good solution to the current folding problem.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113369 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 17:43:25 +00:00
Chris Lattner
c8ae35a8e8 add support for the commuted form of the test instruction, rdar://8018260. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113352 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:51:12 +00:00
Chris Lattner
ba8e81cca2 implement proper support for sysret{,l,q}, rdar://8403907 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113350 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:45:34 +00:00
Chris Lattner
ba8cea450f implement the iret suite of instructions properly, 
fixing rdar://8403974



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113349 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:38:31 +00:00
Chris Lattner
2544f42692 add support for instruction prefixes on the same line as the instruction, 
implementing rdar://8033482 and PR7254.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:17:37 +00:00
Chris Lattner
34e53140c2 change the MC "ParseInstruction" interface to make it the 
implementation's job to check for and lex the EndOfStatement
marker.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113347 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 05:10:46 +00:00
Chris Lattner
9607c40601 gas accepts xchg <mem>, <reg> as a synonym for xchg <reg>, <mem>. 
Add this to the mc assembler, fixing PR8061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113346 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 04:53:27 +00:00
Chris Lattner
a247685b30 fix the encoding of the "jump on *cx" family of instructions, 
rdar://8061602


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113343 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-08 04:30:51 +00:00
Bruno Cardoso Lopes
90462b4ae1 Factor out some x86 vector shuffle rewriting and add comments about the direction the shuffle lowering is heading to 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113286 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 21:03:14 +00:00
Bruno Cardoso Lopes
0d1340b181 Move code around to prepare for moving some of the logic together to another function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113267 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 20:20:27 +00:00
Bill Wendling
d8dd5757e0 Add an MVT::x86mmx type. It will take the place of all current MMX vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113261 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 20:03:56 +00:00
Evan Cheng
dc0b06c815 Remove a dead comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113259 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 20:01:10 +00:00
Bruno Cardoso Lopes
58277b17c3 decouple MMX check from regular splat checks. Some refactoring is coming, and MMX should be left alone to be easily removed after moving to intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113247 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 18:41:45 +00:00
Bruno Cardoso Lopes
673bf78bb5 Remove now useless check, because the code can be matched below, no need to leave it for isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113242 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 18:29:03 +00:00
Bruno Cardoso Lopes
67fc1e76d4 Minor change. Since the checks are equivalent, use isMMX 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113239 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 18:24:00 +00:00
Dale Johannesen
86097c384f Add patterns for MMX that use the new intrinsics. 
Enable palignr intrinsic.
These may need adjustment for a new VT in due course.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113233 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 18:10:56 +00:00
Bruno Cardoso Lopes
70e81f1517 Remove unused target specific node 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 17:38:55 +00:00
Benjamin Kramer
aceeb3a4e2 Don't leak the old operand when transforming "sldt" into "sldtw". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113200 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 14:40:58 +00:00
Chris Lattner
e9e0fc5eed add missing cmov aliases, this resolves rdar://8208499 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113189 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-07 00:05:45 +00:00
Chris Lattner
7d284de955 remove duplicated entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113188 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 23:57:24 +00:00
Chris Lattner
c5cebeb3cb "sldt <mem>" is ambiguous in 64-bit mode, but should 
always be disambiguated as sldtw.  sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact.  Force it to sldtw, resolving rdar://8017530


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113186 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 23:51:44 +00:00
Chris Lattner
d68c474ec5 fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113184 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 23:40:56 +00:00
Chris Lattner
9389b60a03 fix the operand constraints of the immediate form of in/out, 
allowing unsigned 8-bit operands.  This fixes rdar://8208481



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113182 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 23:29:05 +00:00
Chris Lattner
ce4a3355d9 in the case where an instruction only has one implementation 
of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 22:11:18 +00:00
Chris Lattner
a008e8ac73 Now that we know if we had a total fail on the instruction mnemonic, 
give a more detailed error.  Before:

t.s:11:4: error: unrecognized instruction
   addl $1, $1
   ^
t.s:12:4: error: unrecognized instruction
   f2efqefa $1
   ^

After:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
   f2efqefa $1
   ^

This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 21:54:15 +00:00
Chris Lattner
69c7249a6f simplify the hacks around jrcxz. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113167 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 20:10:12 +00:00
Chris Lattner
ec6789f4f9 have tblgen detect when an instruction would have matched, but 
failed because a subtarget feature was not enabled.  Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode.  Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.

This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113166 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 20:08:02 +00:00
Chris Lattner
79ed3f77e8 change MatchInstructionImpl to return an enum instead of bool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113165 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 19:22:17 +00:00
Chris Lattner
0692ee676f have AsmMatcherEmitter.cpp produce the hunk of code that gets included 
into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 19:11:01 +00:00
Roman Divacky
436c54a186 Redefine LOOP* instructions from I to Ii8PCRel as they take an i8 argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113158 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 18:43:14 +00:00
Chris Lattner
47ab90bfa8 random cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113157 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-06 18:32:06 +00:00
Chris Lattner
f0f5780b39 update this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113116 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-05 20:22:09 +00:00
Chris Lattner
beac75da37 implement rdar://6653118 - fastisel should fold loads where possible. 
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:

int foo(int x, int y, int z) {
  return x+y+z;
}

used to compile into:

_foo:                                   ## @foo
	subq	$12, %rsp
	movl	%edi, 8(%rsp)
	movl	%esi, 4(%rsp)
	movl	%edx, (%rsp)
	movl	8(%rsp), %edx
	movl	4(%rsp), %esi
	addl	%edx, %esi
	movl	(%rsp), %edx
	addl	%esi, %edx
	movl	%edx, %eax
	addq	$12, %rsp
	ret

Now we produce:

_foo:                                   ## @foo
	subq	$12, %rsp
	movl	%edi, 8(%rsp)
	movl	%esi, 4(%rsp)
	movl	%edx, (%rsp)
	movl	8(%rsp), %edx
	addl	4(%rsp), %edx    ## Folded load
	addl	(%rsp), %edx     ## Folded load
	movl	%edx, %eax
	addq	$12, %rsp
	ret

Fewer instructions and less register use = faster compiles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-05 02:18:34 +00:00
Chris Lattner
17aa68055b zap dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113073 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-04 18:12:00 +00:00
Bruno Cardoso Lopes
2eb63dfa0a Remove the last bit of isShuffleMaskLegal checks and improve the comment regarding mmx shuffles 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113059 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-04 02:58:56 +00:00
Bruno Cardoso Lopes
828f6ae03c make explicit that we not handle several mmx shuffles 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113058 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-04 02:50:13 +00:00
Bruno Cardoso Lopes
aace0f295b Emit target specific nodes to handle palignr. Do not touch it for MMX versions yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113056 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-04 02:36:07 +00:00
Bruno Cardoso Lopes
c800c0d25f Emit target specific nodes to handle splats starting at zero indicies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113055 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-04 02:02:14 +00:00
Bruno Cardoso Lopes
bbfc31012b Emit target specific nodes for isPSHUFHWMask and isPSHUFLWMask 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113050 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-04 01:36:45 +00:00