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6876e66e5d
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5783 Commits

Author SHA1 Message Date
Chris Lattner
6876e66e5d Make some code more general, adding support for constant formation of several 
new patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27754 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 06:58:41 +00:00
Chris Lattner
c408382eca Learn how to make odd splatted constants in range [17,29]. This implements 
PowerPC/vec_constants.ll:test_29.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 06:07:44 +00:00
Chris Lattner
4a998b9ca8 Pull some code out into a helper function. 
Effeciently codegen even splats in the range [-32,30].

This allows us to codegen <30,30,30,30> as:

        vspltisw v0, 15
        vadduwm v2, v0, v0

instead of as a cp load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27750 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 06:00:21 +00:00
Chris Lattner
5913810b82 Implement a TODO: for any shuffle that can be viewed as a v4[if]32 shuffle, 
if it can be implemented in 3 or fewer discrete altivec instructions, codegen
it as such.  This implements Regression/CodeGen/PowerPC/vec_perf_shuffle.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27748 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 05:28:54 +00:00
Chris Lattner
cffeb86169 Regenerate with adjusted costs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27746 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 05:26:20 +00:00
Chris Lattner
586d6a808d Regenerate with correct offset 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27744 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 05:08:46 +00:00
Chris Lattner
c74e710000 Increase the opcodes by one each to disambiguate COPY from VMRGHW. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27742 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 00:47:48 +00:00
Chris Lattner
6703461f04 Check in a table, generated by llvm-PerfectShuffle, of optimal shuffles 
of various 4-element vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27739 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 00:37:02 +00:00
Evan Cheng
06aef15843 movduprm, movshduprm bugs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27734 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-16 18:11:28 +00:00
Evan Cheng
d8e8223ea1 Encoding bugs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27733 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-16 07:02:22 +00:00
Evan Cheng
800f12df1e Can't fold loads into alias vector SSE ops used for scalar operation. The load 
address has to be 16-byte aligned but the values aren't spilled to 128-bit
locations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27732 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-16 06:58:19 +00:00
Chris Lattner
f3f69decca Implement a TODO: have the legalizer canonicalize a bunch of operations to 
one type (v4i32) so that we don't have to write patterns for each type, and
so that more CSE opportunities are exposed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27731 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-16 01:37:57 +00:00
Chris Lattner
b17f1679e3 Make the BUILD_VECTOR lowering code much more aggressive w.r.t constant vectors. 
Remove some done items from the todo list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27729 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-16 01:01:29 +00:00
Chris Lattner
730b45694b Fix a crash when faced with a shuffle vector that has an undef in its mask. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27726 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 23:48:05 +00:00
Chris Lattner
6e94af75de Add patterns for matching vnots with bit converted inputs. Most of these will 
go away when I start using evan's binop type canonicalizer


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27725 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 23:45:24 +00:00
Chris Lattner
1fcee4edf5 Add a new vnot_conv predicate for matching vnot's where the allones vector is 
bitconverted from some other type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27724 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 23:39:14 +00:00
Evan Cheng
60d3fa24ba More encoding bugs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27722 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 06:10:09 +00:00
Evan Cheng
1af18985b8 pslldrm, psrawrm, etc. encoding bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27721 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 05:59:08 +00:00
Evan Cheng
7076e2daee hsubp{s|d} encoding bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27720 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 05:52:42 +00:00
Evan Cheng
57ebe9fbf0 Silly bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27719 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 05:37:34 +00:00
Evan Cheng
39fc145995 Do not use movs{h|l}dup for a shuffle with a single non-undef node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27718 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 03:13:24 +00:00
Evan Cheng
407428e1ea Added SSE (and other) entries to foldMemoryOperand(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27716 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 23:33:27 +00:00
Evan Cheng
9ab1ac5e99 Some clean up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27715 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 23:32:40 +00:00
Chris Lattner
b097aa9353 Allow undef in a shuffle mask 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27714 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 23:19:08 +00:00
Evan Cheng
d953947d26 Last few SSE3 intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27711 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 21:59:03 +00:00
Evan Cheng
f3e1b1d716 Misc. SSE2 intrinsics: clflush, lfench, mfence 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27699 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 07:43:12 +00:00
Evan Cheng
d9245ca1a1 We were not adjusting the frame size to ensure proper alignment when alloca / 
vla are present in the function. This causes a crash when a leaf function
allocates space on the stack used to store / load with 128-bit SSE
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27698 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 07:26:43 +00:00
Evan Cheng
4f51d850da New entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27697 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 07:24:04 +00:00
Chris Lattner
1a635d617a Move the rest of the PPCTargetLowering::LowerOperation cases out into 
separate functions, for simplicity and code clarity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27693 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 06:01:58 +00:00
Chris Lattner
f1b4708950 Pull the VECTOR_SHUFFLE and BUILD_VECTOR lowering code out into separate 
functions, which makes the code much cleaner :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27692 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 05:19:18 +00:00
Evan Cheng
bb5c43e73d pcmpeq* and pcmpgt* intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27685 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 01:39:53 +00:00
Evan Cheng
0ac8ea9a4f psll*, psrl*, and psra* intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27684 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 00:14:05 +00:00
Reid Spencer
7a1006c3f8 Remove the .cvsignore file so this directory can be pruned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27683 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 22:00:10 +00:00
Reid Spencer
7095ec1792 Remove .cvsignore so that this directory can be pruned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27682 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 21:59:03 +00:00
Evan Cheng
2b21ac6d4c Doh. PANDrm, etc. are not commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27668 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 18:11:28 +00:00
Chris Lattner
a39d798e0a Force non-darwin targets to use a static relo model. This fixes PR734, 
tested by CodeGen/Generic/vector.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27657 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 17:10:48 +00:00
Chris Lattner
ed93790517 add a note, move an altivec todo to the altivec list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27654 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 16:48:00 +00:00
Reid Spencer
3758552428 Add the README files to the distribution. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27651 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 06:39:24 +00:00
Evan Cheng
00586948aa psad, pmax, pmin intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27647 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 06:11:45 +00:00
Evan Cheng
2f40b1b27e Various SSE2 packed integer intrinsics: pmulhuw, pavgw, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27645 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 05:24:54 +00:00
Evan Cheng
f99898453d X86 SSE2 supports v8i16 multiplication 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27644 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 05:10:25 +00:00
Evan Cheng
fc7c17abb5 Update 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27643 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 05:09:45 +00:00
Evan Cheng
49ac1bf1c4 padds{b|w}, paddus{b|w}, psubs{b|w}, psubus{b|w} intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27639 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 00:43:35 +00:00
Evan Cheng
a50a086341 Naming inconsistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27638 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 00:00:23 +00:00
Evan Cheng
d2a6d54f26 SSE / SSE2 conversion intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27637 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 23:42:44 +00:00
Evan Cheng
2c3ae37213 All "integer" logical ops (pand, por, pxor) are now promoted to v2i64. 
Clean up and fix various logical ops issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 21:21:57 +00:00
Chris Lattner
ac225ca051 Add a new way to match vector constants, which make it easier to bang bits of 
different types.

Codegen spltw(0x7FFFFFFF) and spltw(0x80000000) without a constant pool load,
implementing PowerPC/vec_constants.ll:test1.  This compiles:

typedef float vf __attribute__ ((vector_size (16)));
typedef int vi __attribute__ ((vector_size (16)));
void test(vi *P1, vi *P2, vf *P3) {
  *P1 &= (vi){0x80000000,0x80000000,0x80000000,0x80000000};
  *P2 &= (vi){0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF};
  *P3 = vec_abs((vector float)*P3);
}

to:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        vspltisw v0, -1
        vslw v0, v0, v0
        lvx v1, 0, r3
        vand v1, v1, v0
        stvx v1, 0, r3
        lvx v1, 0, r4
        vandc v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vandc v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr

instead of (with two constant pool entries):

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        li r6, lo16(LCPI1_0)
        lis r7, ha16(LCPI1_0)
        li r8, lo16(LCPI1_1)
        lis r9, ha16(LCPI1_1)
        lvx v0, r7, r6
        lvx v1, 0, r3
        vand v0, v1, v0
        stvx v0, 0, r3
        lvx v0, r9, r8
        lvx v1, 0, r4
        vand v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vand v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr

GCC produces (with 2 cp entries):

_test:
        mfspr r0,256
        stw r0,-4(r1)
        oris r0,r0,0xc00c
        mtspr 256,r0
        lis r2,ha16(LC0)
        lis r9,ha16(LC1)
        la r2,lo16(LC0)(r2)
        lvx v0,0,r3
        lvx v1,0,r5
        la r9,lo16(LC1)(r9)
        lwz r12,-4(r1)
        lvx v12,0,r2
        lvx v13,0,r9
        vand v0,v0,v12
        stvx v0,0,r3
        vspltisw v0,-1
        vslw v12,v0,v0
        vandc v1,v1,v12
        stvx v1,0,r5
        lvx v0,0,r4
        vand v0,v0,v13
        stvx v0,0,r4
        mtspr 256,r12
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27624 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 19:07:14 +00:00
Chris Lattner
e87192a854 Rename get_VSPLI_elt -> get_VSPLTI_elt 
Canonicalize BUILD_VECTOR's that match VSPLTI's into a single type for each
form, eliminating a bunch of Pat patterns in the .td file and allowing us to
CSE stuff more aggressively.  This implements
PowerPC/buildvec_canonicalize.ll:VSPLTI


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27614 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 17:37:20 +00:00
Evan Cheng
91b740da12 Promote v4i32, v8i16, v16i8 load to v2i64 load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27612 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 17:12:36 +00:00
Chris Lattner
2b1c3258d6 Ensure that zero vectors are always v4i32, which forces them to CSE with 
each other.  This implements CodeGen/PowerPC/vxor-canonicalize.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27609 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 16:53:28 +00:00