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Author SHA1 Message Date
Michael J. Spencer
a72d87899b MC-COFF: Drop empty sections, and label symbols. Convert relocations 
targeted at symbols into relocations relative to the containing section.

Patch by Nathan Jeffords!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114823 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 08:58:26 +00:00
Chris Lattner
2956462742 yet more aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114822 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:24:57 +00:00
Chris Lattner
b1162fc05e add a couple more aliases, rdar://8456378 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114821 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:21:41 +00:00
Chris Lattner
df967d6137 fix rdar://8470918 - llvm-mc can't assemble smovl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114819 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:11:53 +00:00
Chris Lattner
cb296ec0b6 Fix rdar://8468087 - llvm-mc commutes fmul (and friend) operands. 
My previous fix for rdar://8456371 should only apply to fmulp/faddp,
not to fmul/fadd.  Instruction set orthogonality is overrated or 
something.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114818 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:08:21 +00:00
Chris Lattner
8048ebe91d the latest assembler that runs on powerpc 10.4 machines doesn't 
support aligned comm.  Detect when compiling for 10.4 and don't
emit an alignment for comm.  THis will hopefully fix PR8198.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114817 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:44:54 +00:00
Chris Lattner
80945784f9 improve indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:34:01 +00:00
Eric Christopher
1127c720ed Insert missing coherency in comment. Add a quick check for hardware 
divide support also.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114813 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:08:12 +00:00
Eric Christopher
43b62beb4c Mass rename for Jim. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114812 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:02:23 +00:00
Eric Christopher
722d315ac9 This code should never fire on non-darwin subtargets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114811 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:01:51 +00:00
Chris Lattner
fd8fddd830 implement support for 'clr' alias. This is part of rdar://8416805, 
but balrog was wanting it on irc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114809 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 04:23:03 +00:00
Lang Hames
cec2945f30 Fixed some tests to avoid LiveIntervals::getInstructionFromIndex(..) overhead where possible. Thanks to Jakob for the suggestions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114798 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-26 03:37:09 +00:00
Jakob Stoklund Olesen
207f8f688b Avoid using VNInfo::getCopy as much as possible. I want to get rid of it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114794 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 18:10:38 +00:00
Lang Hames
6e2968c85c Removed VNInfo::isDefAccurate(). Def "accuracy" can be checked by testing whether LiveIntervals::getInstructionFromIndex(def) returns NULL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114791 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 12:04:16 +00:00
Che-Liang Chiou
f9930da2ef Add ret instruction to PTX backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114788 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 07:46:17 +00:00
Rafael Espindola
73ffea47d2 Move ELF to HasReliableSymbolDifference=true. Also take the opportunity to put 
symbols defined in merge sections in independent atoms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114786 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 05:42:19 +00:00
Owen Anderson
b0ba0f4170 LoadPRE was not properly checking that the load it was PRE'ing post-dominated the block it was being hoisted to. 
Splitting critical edges at the merge point only addressed part of the issue; it is also possible for non-post-domination
to occur when the path from the load to the merge has branches in it.  Unfortunately, full anticipation analysis is
time-consuming, so for now approximate it.  This is strictly more conservative than real anticipation, so we will miss
some cases that real PRE would allow, but we also no longer insert loads into paths where they didn't exist before. :-)

This is a very slight net positive on SPEC for me (0.5% on average).  Most of the benchmarks are largely unaffected, but
when it pays off it pays off decently: 181.mcf improves by 4.5% on my machine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114785 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 05:26:18 +00:00
Evan Cheng
5981fc6788 Fix IIC_iEXTAr itinerary class of Cortex-A9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114784 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 01:09:28 +00:00
Evan Cheng
27fdcd1c95 Remove a unused instruction itinerary class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114782 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 01:06:02 +00:00
Eric Christopher
c69a000470 If we're changing the source of a memcpy we need to use the alignment 
of the source, not the original alignment since it may no longer
be valid.

Fixes rdar://8400094


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114781 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 00:57:26 +00:00
Evan Cheng
576a3968a2 Fix zero and sign extension instructions scheduling itineraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114780 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 00:49:35 +00:00
Jakob Stoklund Olesen
011e591071 Remove SlotIndex::PHI_BIT. It is no longer used by anything. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114779 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 00:45:18 +00:00
Jakob Stoklund Olesen
7c78e2624c Remove the only use of SlotIndex::isPHI. This bit is not being set consistently 
and it will be removed shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114778 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 00:45:15 +00:00
Jakob Stoklund Olesen
1803b37bad Terminator gaps were unused. Might as well delete them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114776 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 23:58:56 +00:00
Evan Cheng
bd30ce4311 More pseudo instruction scheduling itinerary fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114768 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 22:41:41 +00:00
John Thompson
54584743f3 Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114767 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 22:24:05 +00:00
Evan Cheng
5be3922321 Fix scheduling itinerary for pseudo mov immediate instructions which expand into two real instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114766 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 22:03:46 +00:00
Rafael Espindola
a648918eb7 Reapply 114678 and 114667. Reverting them did not fix the bot: 
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost/builds/69

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114761 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 21:19:03 +00:00
Jim Grosbach
433a5785cc Add ARM explicit MCInst lowering for the Thumb eh.sjlj.setjmp sequence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114758 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 20:47:58 +00:00
Michael J. Spencer
1f40960543 Get rid of pop_macro warnings on MSVC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114750 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 19:48:47 +00:00
Evan Cheng
fff606d7b2 Enable code placement optimization pass for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 19:07:23 +00:00
Dale Johannesen
c451051157 We can't return SSE/MMX vectors if SSE is disabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114745 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 19:05:48 +00:00
Rafael Espindola
cd4b20a25b Revert 114678 and 114667 to see if 
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost

gets happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114742 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 18:48:08 +00:00
Nicolas Geoffray
946e3c9f9d Attach a DebugLoc to a GC point in order to get precise information in the JIT of a GC point. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114736 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 17:27:50 +00:00
Daniel Dunbar
facb34b41c MC/AsmParser: Handle a missed case of floating literals in the lexer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114733 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 17:10:26 +00:00
Evan Cheng
de0e11c8f3 Fix a potential null dereference bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114723 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 05:18:35 +00:00
Daniel Dunbar
b95a079cae MC/AsmParser: Support .single and .double for embedding floating point literals. 
- I believe more modern 'gas' supports a more enhanced set of arithmetic on
   them, but for now the only thing we can do is emit them as data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114719 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 01:59:56 +00:00
Daniel Dunbar
54f0a625b0 MC/Lexer: Add 'Real' token type for floating point literals. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114718 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 01:59:31 +00:00
Daniel Dunbar
75413b1464 MC: Add missing ')' in diagnostic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114717 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-24 01:58:56 +00:00
Owen Anderson
f523e476c2 Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further 
reflection, this isn't going to achieve the purpose I intended it for.  Back to the drawing board!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:45:25 +00:00
Bob Wilson
2a6e616142 Set alignment operand for NEON VST instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:42:37 +00:00
Jim Grosbach
453900814e ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114707 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:33:56 +00:00
Jim Grosbach
b327e13740 #+4 --> #4 for consistency with other asm output 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114706 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:32:38 +00:00
Jim Grosbach
45d6c1777c Fix formatting of output .s code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114705 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 23:03:26 +00:00
Owen Anderson
71e416ac3a Add isConditionalMove bits to X86 and ARM instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114703 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 22:57:01 +00:00
Bob Wilson
40ff01a030 Set alignment operand for NEON VLD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114696 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 21:43:54 +00:00
Rafael Espindola
e15eb4e14c Correctly handle weak undefined symbols. Before we would get a invalid binding 
(2 == STB_WEAK | STB_GLOBAL).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 19:55:14 +00:00
Jim Grosbach
b2dda4bd34 never mind. I can't read, apparently 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114689 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 19:42:17 +00:00
Evan Cheng
676e258366 Fix r114632. Return if the only terminator is an unconditional branch after the redundant ones are deleted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 19:42:03 +00:00
Jim Grosbach
24e6f2f802 Fix opcode value for the 'trap' instruction, keeping the type suffix on the 
constant. Hopefully the non-Darwin bots will like it...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114687 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 19:32:40 +00:00
Jim Grosbach
5c49b69609 explicit 'unsigned long' on constant value. Hopefully make bots happier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114686 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 19:08:04 +00:00
Benjamin Kramer
c8ab9eb066 Unbreak build. Jim, please review. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114684 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 18:57:26 +00:00
Evan Cheng
8c1f4329e2 Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114681 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 18:32:19 +00:00
Jim Grosbach
2e6ae13bf6 Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don't 
(yet) recognize the 'trap' mnemonic, so we use .short/.long to emit the
opcode directly. On Darwin, however, we do want the mnemonic for more
readable assembly code and better disassembly.

Adjust the .td file to use the 'trap' mnemonic and handle using the binutils
workaround in the assembly printer. Also tweak the formatting of the opcode
values to make them consistent between the MC printer and the old printer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114679 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 18:05:37 +00:00
Rafael Espindola
a5c6b78bf8 Correctly compute the offset of the symbol. Forgot these bits from the 
last commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114678 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 18:01:31 +00:00
Jim Grosbach
16c9a64c28 nuke unused var 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114676 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 17:58:00 +00:00
Rafael Espindola
b142bef30b Represent relocations against local symbols as relocations against the section 
they are in. Both ways should be equivalent, but gas produces relocations
against the section.

Roman wrote the patch, I added the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 17:25:18 +00:00
Bob Wilson
edf017487f Fix llvm-extract so that it changes the linkage of all GlobalValues to 
"external" even when doing lazy bitcode loading.  This was broken because
a function that is not materialized fails the !isDeclaration() test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 17:25:06 +00:00
Oscar Fuentes
df30bdb3a7 Fix VS 2010 build. 
Patch by Nathan Jeffords!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 16:59:36 +00:00
Rafael Espindola
51efe7a253 Fix the FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114639 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 14:14:56 +00:00
Evan Cheng
b8db1981b8 Follow up to r114630. Do not optimize away unconditional branch following a conditional one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114634 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 07:18:35 +00:00
Evan Cheng
dd3a41a6b3 Disable codegen prepare critical edge splitting. Machine instruction passes now 
break critical edges on demand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114633 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 06:55:34 +00:00
Evan Cheng
108c872466 If there are multiple unconditional branches terminating a block, eliminate all 
but the first one. Those will never be executed. There was logic to do this
but it was faulty.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114632 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 06:54:40 +00:00
Evan Cheng
b0cdf8a446 Don't sink insert_subreg, subreg_to_reg, reg_sequence. They are meant to be 
close to their sources to facilitate coalescing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114631 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 06:53:00 +00:00
Evan Cheng
266a99d161 SDISel should not optimize a unconditional branch following a conditional branch 
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.

This is one of the patches leading up to disabling codegen prepare critical edge
splitting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114630 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 06:51:55 +00:00
Lang Hames
f70e7cc7a2 Moved the PBQP allocator class out of the header and back in to the cpp file to hide the gory details. 
Allocator instances can now be created by calling createPBQPRegisterAllocator.

Tidied up use of CoalescerPair as per Jakob's suggestions.

Made the new PBQPBuilder based construction process the default. The internal construction process
remains in-place and available via -pbqp-builder=false for now. It will be removed shortly if the new
process doesn't cause any regressions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 04:28:54 +00:00
Sean Callanan
38a9288f78 Fixed a crash in the enhanced disassembler where 
because of the lack of a newline, AsmToken::Eof
was being found instead of AsmToken::EndOfStatement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114621 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-23 02:14:12 +00:00
Jim Grosbach
637d89fe0e Add support for ELF PLT references for ARM MC asm printing. Adding a 
new VariantKind to the MCSymbolExpr seems like overkill, but I'm not sure
there's a more straightforward way to get the printing difference captured.
(i.e., x86 uses @PLT, ARM uses (PLT)).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114613 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 23:27:36 +00:00
Jim Grosbach
b6ec8cae3c Enable a few additional asserts in MC instruction lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 23:01:28 +00:00
Owen Anderson
ed1088afb5 A select between a constant and zero, when fed by a bit test, can be efficiently 
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:58:22 +00:00
Cameron Esfahani
4af1eaee70 Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114597 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:35:21 +00:00
Bob Wilson
b68987e4bf Change VDUPLANE DAG combiner to just return the result instead of calling 
CombineTo to avoid putting the result on the worklist.  I don't think it makes
much difference for now, but it might help someday as we add more DAG
combine optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114595 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:27:30 +00:00
Rafael Espindola
59ff3c9134 Avoid some Mach-O specific alignment being done on ELF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:27:05 +00:00
Chris Lattner
e07b75e069 allow target-specific label suffixes, patch by Yuri Gribov! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114592 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:19:53 +00:00
Bob Wilson
0b8ccb8252 Combine both VMOVDRR(VMOVRRD) and VMOVRRD(VMOVDRR), instead of just doing one 
of those.  Refactor to share code for handling BUILD_VECTOR(VMOVRRD).
I don't have a testcase that exercises this, but it seems like an obvious
good thing to do.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114589 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 22:09:21 +00:00
Dan Gohman
c1ac0d7623 Teach memdep about TBAA tags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 21:41:02 +00:00
Devang Patel
be90c3a0ea Use DW_OP_fbreg when offset is based on frame register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114585 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 21:10:38 +00:00
Jim Grosbach
f0633e48eb add FIXME 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114578 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 20:55:15 +00:00
Eric Christopher
56a8b817b1 Temporarily work around new address lowering while I figure out what 
needs to happen for darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114577 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 20:42:08 +00:00
Jim Grosbach
bfbe187593 Remove a few commented out bits 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114576 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 20:32:34 +00:00
Rafael Espindola
38738bf1a8 Fix typo and add a FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114570 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 19:04:41 +00:00
Bob Wilson
ec57a1acec When moving zext/sext to be folded with a load, ignore the issue of whether 
truncates are free only in the case where the extended type is legal but the
load type is not.  If both types are illegal, such as when they are too big,
the load may not be legalized into an extended load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114568 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 18:44:56 +00:00
Jim Grosbach
00d01f1a42 Add PrintSpecial() handling for in ARM MC instruction printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114563 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 18:37:14 +00:00
Jim Grosbach
bd4ec84d15 grammar tweakage 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114561 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 18:18:30 +00:00
Jim Grosbach
00545e1cd5 remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114560 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 18:16:55 +00:00
Daniel Dunbar
e4e06a86bc CrashRecovery/Darwin: Override raise() as well so that crash recovery doesn't 
end up altering the thread on which crashes are done because of its use of
Darwin's broken raise() implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114558 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 17:46:10 +00:00
Rafael Espindola
1963572f9d Correctly align bss. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114556 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 17:43:04 +00:00
Jim Grosbach
a2244cb387 Add MC instruction printer support for ARM and Thumb1 jump tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114555 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 17:39:48 +00:00
Bob Wilson
eafca4e2b2 Attempt to fix llvm-gcc build. It was crashing when building gcov.o for an 
ARM cross-compiler on x86, because the MMO size did not match the type size.
This fixes the MMO size and also the size of the stack object to match the
type size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114554 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 17:35:14 +00:00
Jim Grosbach
205a5fa8e4 Add MC instruction printer support for TB[BH] style thumb2 jump tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114553 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 17:15:35 +00:00
Jim Grosbach
1b935a3d2e Clean up comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114550 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 16:45:13 +00:00
Chris Lattner
2c5291b563 fix rdar://8456371 - Handle commutable instructions written backward. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114536 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 06:26:39 +00:00
Chris Lattner
1eb1b68e3a Fix an inconsistency in the x86 backend that led it to reject "calll foo" on 
x86-32: 32-bit calls were named "call" not "calll".  64-bit calls were correctly
named "callq", so this only impacted x86-32.

This fixes rdar://8456370 - llvm-mc rejects 'calll'

This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114534 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 05:49:14 +00:00
Chris Lattner
bc57c6db4a fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8" 
Teaching the code generator about CR8-15, how to rex them up, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114533 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 05:29:50 +00:00
Chris Lattner
f7d4da0c1d fix rdar://8456417 - llvm-mc can't do basic math 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114532 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 05:05:16 +00:00
Chris Lattner
c2b942acf6 add the missing aliases for fp stack cmovs, rdar://8456391 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 04:56:20 +00:00
Chris Lattner
f93b90c5df reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114529 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 04:39:11 +00:00
Chris Lattner
33d60d5e56 Fix rdar://8456364 - llvm-mc rejects '%CS' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114528 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 04:11:10 +00:00
Chris Lattner
0c289c140e fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp' 
-This line, and those below, will be ignored--

M    test/MC/AsmParser/X86/x86_instructions.s
M    lib/Target/X86/AsmParser/X86AsmParser.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114527 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 04:04:03 +00:00
Chris Lattner
61129252e4 fix rdar://8456361 - llvm-mc rejects 'rep movsd' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114526 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 03:50:32 +00:00
Chris Lattner
492a43e6f6 convert the last 4 X86ISD nodes that should have memoperands to have them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114523 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 01:28:21 +00:00
Chris Lattner
2156b79c49 give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only 
can access the stack due to how it is generated though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114522 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 01:11:26 +00:00
Chris Lattner
0729093cd7 give FP_TO_INT16_IN_MEM and friends a memoperand. They are only 
used with stack slots, but hey, lets be safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114521 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 01:05:16 +00:00
Chris Lattner
8864155a35 give VZEXT_LOAD a memory operand, it now works with segment registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114515 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 00:34:38 +00:00
Chris Lattner
0b79cfee15 revert r114386 now that address modes work correctly, we get a nice 
call through gs-relative memory now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114510 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-22 00:11:31 +00:00
Chris Lattner
93c4a5bef7 give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114508 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:59:42 +00:00
Evan Cheng
691e64a54c OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:49:07 +00:00
Jim Grosbach
882ef2b76a Add start of support for MC instruction printer of ARM jump tables. Filling in 
the rest of it is next up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114500 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 23:28:16 +00:00
Owen Anderson
8614167572 Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 
irrelevant, but add a new test for the new, improved functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114494 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:51:46 +00:00
Jakob Stoklund Olesen
5fa42a45a1 Build the complement interval dupli after the split intervals instead of 
creating it before and subtracting split ranges.

This way, the SSA update code in LiveIntervalMap can properly create and use new
phi values in dupli. Now it is possible to create split regions where a value
escapes along two different CFG edges, creating phi values outside the split
region.

This is a work in progress and probably quite broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114492 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:32:21 +00:00
Chris Lattner
b86faa17a4 reimplement support for GS and FS relative address space matching 
by having X86DAGToDAGISel::SelectAddr get passed in the parent node
of the operand match (the load/store/atomic op) and having it get
the address space from that, instead of having special FS/GS addr
mode operations that require duplicating the entire instruction set
to support.

This makes FS and GS relative accesses *far* more predictable and
work much better.  It also simplifies the X86 backend a bit, more
to come.

There is still a pending issue with nodes like ISD::PREFETCH and
X86ISD::FLD, which really should be MemSDNode's but aren't.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114491 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:07:31 +00:00
John Thompson
67aff164c0 Fixed pr20314-2.c failure, added E, F, p constraint letters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:04:54 +00:00
Chris Lattner
d847bc20b8 Rework passing parent pointers into complexpatterns, I forgot 
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 22:00:25 +00:00
Bob Wilson
71dc4d96ed Move a sign-extend or a zero-extend of a load to the same basic block as the 
load when the type of the load is not legal, even if truncates are not free.
The load is going to be legalized to an extending load anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114488 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 21:54:27 +00:00
Bob Wilson
9120f5c35b Clarify a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114487 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 21:44:14 +00:00
Devang Patel
44cfe14445 If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. 
Testcase is in r114476.
This fixes radar 8412415.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:56:33 +00:00
Chris Lattner
77bd88cda5 correct this logic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:46:40 +00:00
Owen Anderson
bc146b0a4d Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using 
the predicate to discover the number of sign bits.  Enhance X86's target lowering to provide
a useful response to this query.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:42:50 +00:00
Chris Lattner
78d3af47f5 just like they can opt into getting the root of the pattern being 
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:37:12 +00:00
Chris Lattner
52a261b3c1 fix a long standing wart: all the ComplexPattern's were being 
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel 
like detangling).   Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:31:19 +00:00
Jakob Stoklund Olesen
7c72707216 Refix MSVC9 and upper_bound. It actually needs a fully symmetric comparator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114469 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 20:16:12 +00:00
Chris Lattner
701cd62297 even though I'm about to rip it out, simplify the address mode stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 19:41:58 +00:00
Chris Lattner
84bd98ac7b finish pushing MachinePointerInfo through selectiondags. At this point, 
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:58:22 +00:00
Chris Lattner
fc448ff89b convert a couple more places to use the new getStore() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114463 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:51:21 +00:00
Chris Lattner
6229d0acb8 update a bunch of code to use the MachinePointerInfo version of getStore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:41:36 +00:00
Owen Anderson
c004eec71b When adding the carry bit to another value on X86, exploit the fact that the carry-materialization 
(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:41:19 +00:00
Jakob Stoklund Olesen
89bfef003e Don't pollute the global namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114459 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:34:17 +00:00
Jakob Stoklund Olesen
2de0e808c1 MSVC9 does not support upper_bound with an asymmetric comparator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 18:24:30 +00:00
Bob Wilson
65ffec49f7 Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load 
and store intrinsics are represented with MemIntrinsicSDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:56:22 +00:00
Chris Lattner
8026a9d3ee eliminate some uses of the getStore overload. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:50:43 +00:00
Chris Lattner
da2d8e1032 eliminate an old SelectionDAG::getTruncStore method, propagating 
MachinePointerInfo around more.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:42:31 +00:00
Chris Lattner
5cd9391a08 eliminate last SelectionDAG::getLoad old entrypoint, on to stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114450 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:28:52 +00:00
Chris Lattner
d0e139fa74 fix the code that infers SV info to be correct when dealing 
with an indexed load/store that has an offset in the index.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114449 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:24:05 +00:00
Jakob Stoklund Olesen
f568b2706e Add LiveInterval::find and use it for most LiveRange searching operations 
instead of calling lower_bound or upper_bound directly.

This cleans up the search logic a bit because {lower,upper}_bound compare
LR->start by default, and it is usually simpler to search LR->end.

Funnelling all searches through one function also makes it possible to replace
the search algorithm with something faster than binary search.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114448 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:12:18 +00:00
Jakob Stoklund Olesen
0635ead2c4 Remove dead method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114447 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:12:15 +00:00
Chris Lattner
3d6ccfba31 propagate MachinePointerInfo through various uses of the old 
SelectionDAG::getExtLoad overload, and eliminate it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 17:04:51 +00:00
Jim Grosbach
532baa5d53 Fix errant printing of [v]ldm instructions that aren't a pop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114445 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:45:31 +00:00
Benjamin Kramer
a53557e4fb Simplify code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114444 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:41:29 +00:00
Chris Lattner
ecf42c4720 continue MachinePointerInfo'izing, eliminating use of one of the old 
getLoad overloads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:36:31 +00:00
Chris Lattner
fa45901eaa convert dagcombine off the old form of getLoad. This fixes several bugs 
with SVOffset computation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:08:50 +00:00
Benjamin Kramer
28b4afc103 Make CreateComplexVariable independent of SmallVector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114439 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 16:00:03 +00:00
Chris Lattner
f165806655 simplify DAGCombiner::SimplifySelectOps step #2/2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 15:58:55 +00:00
Chris Lattner
1806161a0b substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps. 
no functionality change (step #1)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 15:46:59 +00:00
Mikhail Glushenkov
46aa524f0d llvmc: Allow multiple output languages. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114433 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 14:59:42 +00:00
Lang Hames
0898291490 Fixed ambiguous call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114431 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 13:47:10 +00:00
Gabor Greif
8ff9bb189c Fix buglet when the TST instruction directly uses the AND result. 
I am unable to write a test for this case, help is solicited, though...
What I did is to tickle the code in the debugger and verify that we do the right thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114430 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 13:30:57 +00:00
Lang Hames
e9c935662d Added an additional PBQP problem builder which adds coalescing costs (both between pairs of virtuals, and between virtuals and physicals). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114429 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 13:19:36 +00:00
Gabor Greif
04ac81d5db Move the search for the appropriate AND instruction 
into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.

No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114428 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 12:01:15 +00:00
Chris Lattner
85ca106632 a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not 
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114411 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 07:32:19 +00:00
Chris Lattner
d1c24ed81c convert the targets off the non-MachinePointerInfo of getLoad. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 06:44:06 +00:00
Chris Lattner
1daa6f479d add some accessors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114409 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 06:43:24 +00:00
Chris Lattner
e8639036b1 it's more elegant to put the "getConstantPool" and 
"getFixedStack" on the MachinePointerInfo class.  While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114406 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 06:22:23 +00:00
Chris Lattner
51abfe490b update the X86 backend to use the MachinePointerInfo version of one 
of the getLoad methods.  This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 06:02:19 +00:00
Chris Lattner
e54b482d1c Fix a bug where the x86 backend would lower memcpy/memset of segment relative operations 
into non-segment-relative copies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114402 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 05:43:34 +00:00
Chris Lattner
e72f2027e9 reimplement memcpy/memmove/memset lowering to use MachinePointerInfo 
instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 05:40:29 +00:00
Chris Lattner
40a858f6e7 add some helpful accessors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114400 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 05:39:30 +00:00
Chris Lattner
5c5cb2a171 add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a 
MachinePointerInfo.  Among other virtues, this doesn't silently  truncate the
svoffset to 32-bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114399 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 05:10:45 +00:00
Chris Lattner
e9ba5dd236 simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114397 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 04:57:15 +00:00
Chris Lattner
60bddc8bcd chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo, 
eliminating some weird "infer a frame address" logic which was dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114396 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 04:53:42 +00:00
Chris Lattner
0531356e4d don't implicitly drop the offset of a machinememoperand when legalizing atomics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114395 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 04:51:11 +00:00
Chris Lattner
93a95ae8a9 force clients of MachineFunction::getMachineMemOperand to provide a 
MachinePointerInfo, propagating the type out a level of API.  Remove
the old MachineFunction::getMachineMemOperand impl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114393 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 04:46:39 +00:00
Chris Lattner
59db5496f4 convert targets to the new MF.getMachineMemOperand interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114391 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 04:39:43 +00:00
Chris Lattner
da39c39644 start pushing MachinePointerInfo out through the MachineMemOperand interface 
to the MachineFunction construction methods.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114390 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 04:32:08 +00:00
Chris Lattner
e8e2e80f40 refactor the Value*/offset pair from MachineMemOperand out to a new 
MachinePointerInfo struct, no functionality change.

This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114389 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 04:23:39 +00:00
Chris Lattner
08bad54baf fix rdar://8453210, a crash handling a call through a GS relative load. 
For now, just disable folding the load into the call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114386 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 03:37:00 +00:00
Rafael Espindola
aa359bddbf Revert unrelated change that was accidentally included in the previous commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114383 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 00:40:19 +00:00
Rafael Espindola
f7c10a3cff Implement support for .local and its "interesting" interactions with .comm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114382 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-21 00:24:38 +00:00
Evan Cheng
44be1a8d66 Enable machine sinking critical edge splitting. e.g. 
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114372 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 22:52:00 +00:00
Owen Anderson
4a9f150926 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, 
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 20:39:59 +00:00
Jim Grosbach
1dc335a79f Simplify ARM callee-saved register handling by removing the distinction 
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114340 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 19:32:20 +00:00
Rafael Espindola
43779dcfef Produce a R_X86_64_32 when the value is >=0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114339 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 19:20:47 +00:00
Evan Cheng
7af6dc47a5 Avoid splitting critical edge twice for a set of PHI uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114338 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 19:12:55 +00:00
Francois Pichet
345adbe572 Fix the "unable to rename temporary" lit test failing on Windows. rename is now copy + delete on Windows. Problem to be revisited for a permanent and clean solution. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114320 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-20 04:03:07 +00:00
Owen Anderson
0dcc814276 Revert r114312 while I sort out some issues. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 21:01:26 +00:00
Owen Anderson
d910fb2f12 Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know, 
r114268 fixed the last of the blockers to enabling it.  I will be monitoring
for failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 19:51:55 +00:00
Jakob Stoklund Olesen
71c6095814 Add one more Core i7 model number. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 17:54:28 +00:00
Chris Lattner
313a94c3d0 idiom recognition should catch this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114304 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 00:37:34 +00:00
Chris Lattner
702917d4e8 add a readme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114303 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 00:34:58 +00:00
Chris Lattner
222920d667 add corei7, the laptop version. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114302 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-19 00:31:58 +00:00
NAKAMURA Takumi
cd458be047 X86Subtarget.h: Fix Cygwin's TD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114297 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 19:50:42 +00:00
Eric Christopher
50880d08ec Add the exit instruction to the PTX target. 
Patch by Che-Liang Chiou <clchiou@gmail.com>!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114294 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 18:52:28 +00:00
Michael J. Spencer
895dda6fb5 Fix build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114292 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 17:54:37 +00:00
Rafael Espindola
ad49cf5866 Make sure the STT_FILE symbol is the first one in the symbol table. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114285 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 15:03:21 +00:00
Benjamin Kramer
9e8d1f97e9 Unbreak msvc build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114284 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 14:41:26 +00:00
Gabor Greif
f097b59e0e do not rely on the implicit-dereference semantics of dyn_cast_or_null 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114278 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 11:55:34 +00:00
Gabor Greif
ea4894a7fc do not rely on the implicit-dereference semantics of dyn_cast_or_null 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 11:53:39 +00:00
Lang Hames
481630dee5 Fixed non-const iterator error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114273 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 09:49:08 +00:00
Lang Hames
eb6c8f53b4 Added a separate class (PBQPBuilder) for PBQP Problem construction. This class can be extended to support custom constraints. 
For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming 
no issues with the builder system come up.

To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a
Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114272 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 09:07:10 +00:00
Evan Cheng
2399786b27 Fix code that break critical edges for PHI uses. Watch out for multiple PHIs in different blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114270 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 06:42:17 +00:00
Owen Anderson
14ac1dd2be Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is 
NO path to the destination containing side effects, not that SOME path contains no side effects.
In  practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 04:45:14 +00:00
Eric Christopher
c109556a0a Thumb opcodes for thumb calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114263 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 02:32:38 +00:00
Eric Christopher
6dab137b88 Add addrmode5 fp load support. Swap float/thumb operand adding to handle 
thumb with floating point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114256 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 01:59:37 +00:00
Eric Christopher
b74558ad3e Floating point stores have a 3rd addressing mode type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114254 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 01:23:38 +00:00
Jim Grosbach
988ce097b7 factor out a simple helper function to create a label for PC-relative 
instructions (PICADD, PICLDR, et.al.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114243 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 00:05:05 +00:00
Jim Grosbach
d30cfde935 PC-relative pseudo instructions are lowered and printed directly. Any encounter 
with one in the generic printing code is an error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114242 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-18 00:04:53 +00:00
Benjamin Kramer
92aa1f7123 Fix vmov.f64 disassembly on targets where sizeof(long) != 8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114240 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 23:48:07 +00:00
Jim Grosbach
fbd1873041 Add MC-inst handling for tPICADD 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114237 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 23:41:53 +00:00
Bob Wilson
75f0288b7d Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64 
value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert.  Radar 8407927.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114233 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:59:05 +00:00
Jim Grosbach
e6be85e9ff Teach the (non-MC) instruction printer to use the cannonical names for push/pop, 
and shift instructions on ARM. Update the tests to match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114230 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:36:38 +00:00
Rafael Espindola
0007489312 Avoid relocations in a common case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114229 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:34:41 +00:00
Evan Cheng
6edb0eac87 Teach machine sink to 
1) Do forward copy propagation. This makes it easier to estimate the cost of the
   instruction being sunk.
2) Break critical edges on demand, including cases where the value is used by
   PHI nodes.
Critical edge splitting is not yet enabled by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114227 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:28:18 +00:00
Eric Christopher
a5b1e68107 Rework arm fast isel branch and compare code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114226 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 22:28:18 +00:00
Evan Cheng
c2b768f09e Machine CSE was forgetting to clear some data structures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114222 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 21:59:42 +00:00
Evan Cheng
f437f73348 Fix a potential bug that can cause miscomparison with and without debug info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114220 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 21:56:26 +00:00
Jakob Stoklund Olesen
38cb1cdfb7 Don't include <fenv.h> now that we have llvm/System/FEnv.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114219 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 21:47:03 +00:00
Jim Grosbach
74d7e6c64e Hook up verbose asm comment printing for SOImm operands in MC printer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114215 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 21:33:25 +00:00
Jim Grosbach
196b48b708 trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114212 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 21:25:10 +00:00
Dan Gohman
d8c0a51362 Avoid emitting a PIC base register if no PIC addresses are needed. 
This fixes rdar://8396318.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114201 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 20:24:24 +00:00
Dan Gohman
3f2f21e640 Attempt to support platforms which don't have fenv.h. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114196 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 20:06:27 +00:00
Jim Grosbach
568eeedea7 Add skeleton infrastructure for the ARMMCCodeEmitter class. Patch by Jason Kim! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114195 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 18:46:17 +00:00
Jim Grosbach
c686e33d12 handle the upper16/lower16 target operand flags on symbol references for MC 
instruction lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114191 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 18:25:25 +00:00
Chris Lattner
40cc3f8783 fix rdar://8444631 - encoder crash on 'enter' 
What a weird instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114190 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 18:02:29 +00:00
Daniel Dunbar
f3f95c9274 Fix an MSVC warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114184 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 16:34:24 +00:00
Jim Grosbach
a28abbe245 expand PICLDR MC lowering to handle other PICLDR and PICSTR versions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114183 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 16:25:52 +00:00
Daniel Dunbar
23bea41ec6 MC/Mach-O/i386: Fix a crash in relocation handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 15:21:50 +00:00
NAKAMURA Takumi
4cec6e2103 Move the declaration SetInformationJobObject() outside of namespace. 
It is also workaround for PR7927.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114175 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 11:14:18 +00:00
NAKAMURA Takumi
cdd7fb7853 AlphaSchedule.td: 7bit-ize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114173 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 09:56:43 +00:00
Daniel Dunbar
7ca6e73e7f System: Don't reexport ___eprintf when building with Clang; this symbol isn't 
used on Darwin anymore, and Clang might not always link with the library it is
currently found in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114165 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 04:25:24 +00:00
Daniel Dunbar
cceba83893 MC/AsmParser: Add support for 'a + 4@GOTPCREL' and friends, by reconsing the 
expression to include the modifier.
 - Gross, but this a corner case we don't expect to see often in practice, but
   it is worth accepting.
 - Also improves diagnostics on invalid modifiers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114154 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 02:47:07 +00:00
Dan Gohman
8ee731f2ce Fix the folding of floating-point math library calls, like sin(infinity), 
so that it detects errors on platforms where libm doesn't set errno.
It's still subject to host libm details though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114148 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 01:38:06 +00:00
Dan Gohman
8945db73d1 Add an #include of raw_ostream.h. Previously, this only compiled 
because it was using Twine.h's declaration of operator<<(const Twine &).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114141 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-17 00:33:43 +00:00
Owen Anderson
f56ba2b061 Allow the PassRegistry mutex to be lazily initialized, and clean up the global namespace at the same time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114131 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 23:44:50 +00:00
Owen Anderson
1e3e6362c8 Do not expose the locking for the PassRegistry in the header. Be careful to 
synchronize any method that might lazily initialize the pImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114130 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 23:32:35 +00:00
Benjamin Kramer
fc24c1a7ba Update CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114128 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 23:06:18 +00:00
Dan Gohman
a627e9bfcd Rename a variable to avoid a declaration conflict. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114126 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 22:50:09 +00:00
Dan Gohman
ead0109f5b Add a pass which prints out all the memdep dependencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114121 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 22:08:32 +00:00
Devang Patel
1905a18abc If FE forgot to provide a file name (usually it uses "stdin" as name in such situation) then make one up to ensure that debug info is not malformed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114119 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 20:57:49 +00:00
Owen Anderson
4e282decf3 Revert r114097, adding back in the assertion against replacing an Instruction by itself. Now that CorrelatedValuePropagation is 
more careful not to call SimplifyInstructionsInBlock() on an unreachable block, the issue has been fixed at a higher level.  Add
a big warning to SimplifyInstructionsInBlock() to hopefully prevent this in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114117 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 20:51:41 +00:00
Chris Lattner
35aa94b229 fix rdar://8438816 - unrecognized 'fildq' instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114116 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 20:46:38 +00:00
Rafael Espindola
71859c640f Print the address of sections as 0 and create the metadata sections in the 
same order as gnu as.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114109 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 19:46:31 +00:00
Owen Anderson
ceb9a95957 Use a depth-first iteratation in CorrelatedValuePropagation to avoid wasting time trying 
to optimize unreachable blocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114105 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 18:35:07 +00:00
Dale Johannesen
677c6ecd08 When substituting sunkaddrs into indirect arguments an asm, we were 
walking the asm arguments once and stashing their Values.  This is
wrong because the same memory location can be in the list twice, and
if the first one has a sunkaddr substituted, the stashed value for the
second one will be wrong (use-after-free).  PR 8154.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114104 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 18:30:55 +00:00
Owen Anderson
c2ce21ad51 It is possible, under specific circumstances involving ptrtoint ConstantExpr's, for LVI to end up trying to merge 
a Constant into a ConstantRange.  Handle this conservatively for now, rather than asserting.  The testcase is
more complex that I would like, but the manifestation of the problem is sensitive to iteration orders and the state of the
LVI cache, and I have not been able to reproduce it with manually constructed or simplified cases.

Fixes PR8162.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114103 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 18:28:33 +00:00
Jim Grosbach
b74ca9d631 MC-ization of the PICLDR pseudo. Next up, adding the other variants 
(PICLDRB, et. al.) and PICSTR*

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114098 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 17:43:25 +00:00
Owen Anderson
4b91c3ac96 Fix PR8161, in which an unreachable loop causes recursive instruction simplification to try 
to replace an instruction with itself.  Add a predicate to the simplifier to prevent this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114097 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 17:42:36 +00:00
Jim Grosbach
1d51c41a45 Make sure to promote single precision floats to double before extracting them 
from the APFloat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114096 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 17:37:30 +00:00
Rafael Espindola
34e3d0cfe5 Make sure that names like .note.GNU-stack are accepted as valid section names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114091 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 17:05:55 +00:00
Rafael Espindola
2ea2ac798b Add support for the .zero directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114077 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 15:03:59 +00:00
Kalle Raiskila
1cd1b0b283 Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction. 
This cleans up after the mess r108567 left in the CellSPU backend.
ORCvt-instruction were used to reinterpret registers, and the ORs were then
removed by isMoveInstr(). This patch now removes 350 instrucions of format:
	or $3, $3, $3
(from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is
checked for.

Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114074 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 12:29:33 +00:00
Duncan Sands
5754a45256 Add better support for environment portion of triple. Original patch by 
Cameron Esfahani, tweaked to use array_lengthof.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114073 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 08:25:48 +00:00
Duncan Sands
dd2fdd81bc Some versions of gcc still warn about "ignoring return value ... declared 
with attribute warn_unused_result" here - suppress the warning harder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114072 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 08:20:49 +00:00
Bob Wilson
de0ae8f83d Remove support for "dregpair" operand modifier, now that it is no longer being 
used for anything.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114067 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 04:55:00 +00:00
Bob Wilson
823611bfba When expanding ARM pseudo registers, copy the existing predicate operands 
instead of using default predicates on the expanded instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 04:25:37 +00:00
Jim Grosbach
a8e47b3319 store MC FP immediates as a double instead of as an APFloat, thus avoiding an 
unnecessary dtor for MCOperand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114064 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 03:45:21 +00:00
Bob Wilson
ea606bb76b Add missing break. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114048 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 00:31:32 +00:00
Bob Wilson
9d4ebc0eb8 Change VLDMQ and VSTMQ to be pseudo instructions. They are expanded after 
register allocation to VLDMD and VSTMD respectively.  This avoids using the
dregpair operand modifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114047 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 00:31:02 +00:00
Owen Anderson
cb86def1c2 Fix a threaded LLVM bug due the need for operator= on reference counted AttrListImpl's. It might 
be possible to implement this very carefully to allow a lock-free implementation while still
avoiding illegal interleavings, but I haven't been able to figure one out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114046 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 00:27:35 +00:00
Jakob Stoklund Olesen
f6a129a24b Use the value mapping provided by LiveIntervalMap. This simplifies the code a 
great deal because we don't have to worry about maintaining SSA form.

Unconditionally copy back to dupli when the register is live out of the split
range, even if the live-out value was defined outside the range. Skipping the
back-copy only makes sense when the live range is going to spill outside the
split range, and we don't know that it will. Besides, this was a hack to avoid
SSA update issues.

Clear up some confusion about the end point of a half-open LiveRange. Methinks
LiveRanges need to be closed so both start and end are included in the range.
The low bits of a SlotIndex are symbolic, so a half-open range doesn't really
make sense. This would be a pervasive change, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114043 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-16 00:01:36 +00:00
Michael J. Spencer
7e7d01de9c System/Path: Add x86-64 COFF to IdentifyFileType. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114037 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 23:04:14 +00:00
Owen Anderson
b6d760c7d5 Since PassRegistry is currently a shared global object, it needs locking. While it might intuitively seem 
that all the setup of this class currently happens at static initialization time, this misses the fact
that some later events can cause mutation of the PassRegistrationListeners list, and thus cause race issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114036 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-15 23:03:33 +00:00