Commit Graph

81556 Commits

Author SHA1 Message Date
Eli Bendersky
d9182d6cae Removing a file that's no longer being used after the recent refactorings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153825 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-01 06:50:01 +00:00
Hal Finkel
20b529b3f9 Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore.
Loads and stores can have different pipeline behavior, especially on
embedded chips. This change allows those differences to be expressed.
Except for the 440 scheduler, there are no functionality changes.
On the 440, the latency adjustment is only by one cycle, and so this
probably does not affect much. Nevertheless, it will make a larger
difference in the future and this removes a FIXME from the 440 itin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153821 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-01 04:44:16 +00:00
Rafael Espindola
6226c49bde Add a workaround for building with old versions of clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153820 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 21:54:20 +00:00
Rafael Espindola
f10037b9ff Add a triple to the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153818 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 18:59:07 +00:00
Rafael Espindola
95d594cac3 Teach CodeGen's version of computeMaskedBits to understand the range metadata.
This is the CodeGen equivalent of r153747. I tested that there is not noticeable
performance difference with any combination of -O0/-O2 /-g when compiling
gcc as a single compilation unit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153817 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 18:14:00 +00:00
Hal Finkel
5b00ceaeea Fix dynamic linking on PPC64.
Dynamic linking on PPC64 has had problems since we had to move the top-down
hazard-detection logic post-ra. For dynamic linking to work there needs to be
a nop placed after every call. It turns out that it is really hard to guarantee
that nothing will be placed in between the call (bl) and the nop during post-ra
scheduling. Previous attempts at fixing this by placing logic inside the
hazard detector only partially worked.

This is now fixed in a different way: call+nop codegen-only instructions. As far
as CodeGen is concerned the pair is now a single instruction and cannot be split.
This solution works much better than previous attempts.

The scoreboard hazard detector is also renamed to be more generic, there is currently
no cpu-specific logic in it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153816 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 14:45:15 +00:00
Chandler Carruth
f5f256cffd Fix a typo reported in IRC by someone reviewing this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153815 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 13:18:09 +00:00
Chandler Carruth
b594a84df5 Give the always-inliner its own custom filter. It shouldn't have to pay
the very high overhead of the complex inline cost analysis when all it
wants to do is detect three patterns which must not be inlined. Comment
the code, clean it up, and leave some hints about possible performance
improvements if this ever shows up on a profile.

Moving this off of the (now more expensive) inline cost analysis is
particularly important because we have to run this inliner even at -O0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 13:17:18 +00:00
Chandler Carruth
45de584b4f Remove a bunch of empty, dead, and no-op methods from all of these
interfaces. These methods were used in the old inline cost system where
there was a persistent cache that had to be updated, invalidated, and
cleared. We're now doing more direct computations that don't require
this intricate dance. Even if we resume some level of caching, it would
almost certainly have a simpler and more narrow interface than this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153813 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 12:48:08 +00:00
Chandler Carruth
f2286b0152 Initial commit for the rewrite of the inline cost analysis to operate
on a per-callsite walk of the called function's instructions, in
breadth-first order over the potentially reachable set of basic blocks.

This is a major shift in how inline cost analysis works to improve the
accuracy and rationality of inlining decisions. A brief outline of the
algorithm this moves to:

- Build a simplification mapping based on the callsite arguments to the
  function arguments.
- Push the entry block onto a worklist of potentially-live basic blocks.
- Pop the first block off of the *front* of the worklist (for
  breadth-first ordering) and walk its instructions using a custom
  InstVisitor.
- For each instruction's operands, re-map them based on the
  simplification mappings available for the given callsite.
- Compute any simplification possible of the instruction after
  re-mapping, and store that back int othe simplification mapping.
- Compute any bonuses, costs, or other impacts of the instruction on the
  cost metric.
- When the terminator is reached, replace any conditional value in the
  terminator with any simplifications from the mapping we have, and add
  any successors which are not proven to be dead from these
  simplifications to the worklist.
- Pop the next block off of the front of the worklist, and repeat.
- As soon as the cost of inlining exceeds the threshold for the
  callsite, stop analyzing the function in order to bound cost.

The primary goal of this algorithm is to perfectly handle dead code
paths. We do not want any code in trivially dead code paths to impact
inlining decisions. The previous metric was *extremely* flawed here, and
would always subtract the average cost of two successors of
a conditional branch when it was proven to become an unconditional
branch at the callsite. There was no handling of wildly different costs
between the two successors, which would cause inlining when the path
actually taken was too large, and no inlining when the path actually
taken was trivially simple. There was also no handling of the code
*path*, only the immediate successors. These problems vanish completely
now. See the added regression tests for the shiny new features -- we
skip recursive function calls, SROA-killing instructions, and high cost
complex CFG structures when dead at the callsite being analyzed.

Switching to this algorithm required refactoring the inline cost
interface to accept the actual threshold rather than simply returning
a single cost. The resulting interface is pretty bad, and I'm planning
to do lots of interface cleanup after this patch.

Several other refactorings fell out of this, but I've tried to minimize
them for this patch. =/ There is still more cleanup that can be done
here. Please point out anything that you see in review.

I've worked really hard to try to mirror at least the spirit of all of
the previous heuristics in the new model. It's not clear that they are
all correct any more, but I wanted to minimize the change in this single
patch, it's already a bit ridiculous. One heuristic that is *not* yet
mirrored is to allow inlining of functions with a dynamic alloca *if*
the caller has a dynamic alloca. I will add this back, but I think the
most reasonable way requires changes to the inliner itself rather than
just the cost metric, and so I've deferred this for a subsequent patch.
The test case is XFAIL-ed until then.

As mentioned in the review mail, this seems to make Clang run about 1%
to 2% faster in -O0, but makes its binary size grow by just under 4%.
I've looked into the 4% growth, and it can be fixed, but requires
changes to other parts of the inliner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153812 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 12:42:41 +00:00
Chandler Carruth
7384530c7c Add support to the InstVisitor for visiting a generic callsite. The
visitor will now visit a CallInst and an InvokeInst with
instruction-specific visitors, then visit a generic CallSite visitor,
then delegate back to the Instruction visitor and the TerminatorInst
visitors depending on whether a call or an invoke originally. This will
be used in the soon-to-land inline cost rewrite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153811 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 11:31:24 +00:00
Bill Wendling
7baa27d3b3 Move trivial functions into the class definition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153810 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 11:25:18 +00:00
Bill Wendling
deee238128 Trim headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153809 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 11:22:30 +00:00
Bill Wendling
c94c562692 Indent according to LLVM's style guide.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153808 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 11:15:43 +00:00
Bill Wendling
ab53bc76fd Cleanup whitespace and trim some of the #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153807 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 11:10:35 +00:00
Benjamin Kramer
1955c9cf46 Internalize: Remove reference of @llvm.noinline, it was replaced with the noinline attribute a long time ago.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 11:03:47 +00:00
Bill Wendling
f2cc2ee449 These strings aren't 'const char *' but 'char *'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 10:51:45 +00:00
Bill Wendling
76b13ed403 Cleanup whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153804 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 10:50:14 +00:00
Bill Wendling
caf71d4185 Free the codegen options when deleting LTO code generator object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153803 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 10:49:43 +00:00
Bill Wendling
168f142834 Cleanup whitespace and remove unneeded 'extern' keyword on function definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 10:44:20 +00:00
Chandler Carruth
426d5715b1 Clean up the naming in this test. Someone pointed this out in review at
one point, and I forgot to go back and clean it up. Sorry about that. =/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153801 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 10:38:48 +00:00
Chandler Carruth
c3e955927f FileCheck-ize this test, and generally tidy it up prior to changing
things around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 09:22:33 +00:00
Duncan Sands
4000afe712 I noticed in passing that the Metadata getIfExists method was creating a new
node and returning it if one didn't exist.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153798 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 08:20:11 +00:00
Hal Finkel
6173ed95da Correctly vectorize powi.
The powi intrinsic requires special handling because it always takes a single
integer power regardless of the result type. As a result, we can vectorize
only if the powers are equal. Fixes PR12364.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153797 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 03:38:40 +00:00
Andrew Trick
9f2a9d741f comment typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153796 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 02:39:17 +00:00
Akira Hatanaka
b2874df81d Select static relocation model if it is jitting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153795 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 02:38:36 +00:00
Andrew Trick
dd9a50196c Introduce Register Units: Give each leaf register a number.
First small step toward modeling multi-register multi-pressure. In the
future, register units can also be used to model liveness and
aliasing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153794 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 01:35:59 +00:00
Jakob Stoklund Olesen
3ee3661f8f Add a 2 byte safety margin in offset computations.
ARMConstantIslandPass still has bugs where jump table compression can
cause constant pool entries to go out of range.

Add a safety margin of 2 bytes when placing constant islands, but use
the real max displacement for verification.

<rdar://problem/11156595>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153789 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 00:06:44 +00:00
Jakob Stoklund Olesen
101c03a8c9 Add more debugging output to ARMConstantIslandPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153788 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-31 00:06:42 +00:00
Bill Wendling
5ff4bc20a1 * Set the scope attributes for the ASM symbol we added to be the value passed
into the function.
* Reorder some header files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153783 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 23:26:06 +00:00
Benjamin Kramer
cef670a3a3 Rip out emission of the regIsInRegClass function for the asm printer.
It's slow, bloated and completely redundant with MCRegisterClass::contains.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153782 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 23:13:40 +00:00
Jim Grosbach
bf3c322640 ARM fix encoding fixup resolution for ldrd and friends.
The 8-bit payload is not contiguous in the opcode. Move the upper nibble
over 4 bits into the correct place.

rdar://11158641

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153780 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 21:54:22 +00:00
Jakob Stoklund Olesen
c19f72bd83 Use SequenceToOffsetTable in emitRegisterNameString.
This allows suffix sharing in register names. (AX is a suffix of EAX).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153777 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 21:12:52 +00:00
Jakob Stoklund Olesen
0d4e2ea00e Reapply 153764 and 153761 with a fix.
Use an explicit comparator instead of the default.

The sets are sorted, but not using the default comparator. Hopefully,
this will unbreak the Linux builders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153772 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 20:24:14 +00:00
Rafael Espindola
77ff8bbc2a Revert 153764 and 153761. They broke a --enable-optimized --enable-assertions
--enable-expensive-checks build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153771 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 20:09:06 +00:00
Jim Grosbach
ad353c6303 ARM assembler should prefer non-aliases encoding of cmp.
When an immediate is both a value [t2_]so_imm and a [t2_]so_imm_neg,
we want to use the non-negated form to make sure we prefer the normal
encoding, not the aliased encoding via the negation of, e.g., 'cmp.w'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153770 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 19:59:02 +00:00
Jim Grosbach
a45e3747e6 ARM encoding for VSWP got the second operand incorrect.
Make the non-tied register operand names line up with what the base
class encoding handler expects.

rdar://11157236

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153766 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 18:53:01 +00:00
Jim Grosbach
8f1148bd07 ARM can only use narrow encoding for low regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153765 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 18:39:43 +00:00
Jakob Stoklund Olesen
ecf2d9fc0d Compress SimpleValueType lists by sharing.
Many register classes have the same value types. Share the table space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 17:42:04 +00:00
Jakob Stoklund Olesen
8f36b0b139 Compress register lists by sharing suffixes.
TableGen emits lists of sub-registers, super-registers, and overlaps. Put
them all in a single table and use a SequenceToOffsetTable to share
suffixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153761 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 17:25:43 +00:00
Jakob Stoklund Olesen
184440e808 Add a SequenceToOffsetTable to TableGen.
This is similar to the StringToOffsetTable we use to produce string
tables, but it can be used for other sequences than strings, and it
eliminates entries for suffixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153760 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 17:25:40 +00:00
Jim Grosbach
2d30d947ec ARM integrated assembler should encoding choice for add/sub imm.
For 'adds r2, r2, #56' outside of an IT block, the 16-bit encoding T2
can be used for this syntax. Prefer the narrow encoding when possible.

rdar://11156277

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 17:20:40 +00:00
Rafael Espindola
092c5ccf5b Handle unreachable code in the dominates functions. This changes users when
needed for correctness, but still doesn't clean up code that now unnecessary
checks for reachability.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153755 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 16:46:21 +00:00
Danil Malyshev
0e4fa5ff36 Re-factored RuntimeDyLd:
1. The main works will made in the RuntimeDyLdImpl with uses the ObjectFile class. RuntimeDyLdMachO and RuntimeDyLdELF now only parses relocations and resolve it. This is allows to make improvements of the RuntimeDyLd more easily. In addition the support for COFF can be easily added.

2. Added ARM relocations to RuntimeDyLdELF.

3. Added support for stub functions for the ARM, allowing to do a long branch.

4. Added support for external functions that are not loaded from the object files, but can be loaded from external libraries. Now MCJIT can correctly execute the code containing the printf, putc, and etc.

5. The sections emitted instead functions, thanks Jim Grosbach. MemoryManager.startFunctionBody() and MemoryManager.endFunctionBody() have been removed.
6. MCJITMemoryManager.allocateDataSection() and MCJITMemoryManager. allocateCodeSection() used JMM->allocateSpace() instead of JMM->allocateCodeSection() and JMM->allocateDataSection(), because I got an error: "Cannot allocate an allocated block!" with object file contains more than one code or data sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 16:45:19 +00:00
Jim Grosbach
c0164f8608 ARM assembly parsing needs to be paranoid about negative immediates.
Make sure to treat immediates as unsigned when doing relative comparisons.

rdar://11153621

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153753 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 16:31:31 +00:00
Rafael Espindola
7c7121edb9 Add computeMaskedBitsLoad back, as it was the change to instsimplify that
caused the slowdown last time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153747 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 15:52:11 +00:00
Benjamin Kramer
2f1abe9a5f Add a note about a missed cmov -> sbb opportunity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153741 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 13:02:58 +00:00
Bill Wendling
8fd3fcdba8 Cleanup whitespace. Doxygenize comments. And indent to llvm coding standards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153740 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 10:29:38 +00:00
James Molloy
cb0809b82b Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch.
Patch by Tim Northover!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153737 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 09:15:32 +00:00
Evan Cheng
1c80f56268 ARM target should allow codegenprep to duplicate ret instructions to enable tailcall opt. rdar://11140249
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153717 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 01:24:39 +00:00