Commit Graph

87715 Commits

Author SHA1 Message Date
Chandler Carruth
1b6e9b867b Add a triple to this test -- it has to be an ELF platform...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170374 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 21:44:50 +00:00
Chandler Carruth
6c31d31357 Prepare LLVM to fix PR14625, exposing a hook in MCContext to manage the
compilation directory.

This defaults to the current working directory, just as it always has,
but now an assembler can choose to override it with a custom directory.
I've taught llvm-mc about this option and added a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170371 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 21:32:42 +00:00
Nick Kledzik
c83b8fec01 re-enable test cases now that traits work with g++. Fix some g++ warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170369 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 20:43:53 +00:00
Michael Ilseman
f3ceaff639 Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170368 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 20:40:14 +00:00
Michael Ilseman
0f47e7e019 Removed trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170367 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 20:37:55 +00:00
Chad Rosier
316a5aa0a5 [arm fast-isel] Fast-isel only handles simple VTs, so make sure the necessary
checks are in place.  Some minor cleanup as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 19:59:43 +00:00
Nick Kledzik
fbc8a73e0c Use different trait techniques to be compatible with g++
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170355 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 19:02:05 +00:00
Chandler Carruth
b0de1e31d1 Fix another SROA crasher, PR14601.
This was a silly oversight, we weren't pruning allocas which were used
by variable-length memory intrinsics from the set that could be widened
and promoted as integers. Fix that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170353 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 18:48:07 +00:00
Tim Northover
788221398a Query section for whether it should be executable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170350 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 17:59:35 +00:00
Tim Northover
1c2b2f9c56 Teach MachO which sections contain code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170349 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 17:59:32 +00:00
Evgeniy Stepanov
2dfa3eb566 [msan] Fix lint warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170347 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 16:30:05 +00:00
Richard Osborne
c47793c62c Add instruction encodings / disassembly support for l2r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170345 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 16:28:02 +00:00
Tom Stellard
9f84c05705 R600: enable S_*N2_* instructions
They seem to work fine.

Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170343 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 15:14:56 +00:00
Tom Stellard
3ee6391e0c R600: BB operand support for SI
Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170342 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 15:14:54 +00:00
Tom Stellard
ab8ada34c0 R600: remove nonsense setPrefLoopAlignment
The Align parameter is a power of two, so 16 results in 64K
alignment. Additional to that even 16 byte alignment doesn't
make any sense, so just remove it.

Patch by: Christian König

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 15:14:53 +00:00
Chandler Carruth
99a54942ae Teach the rewriting of memcpy calls to support subvector copies.
This also cleans up a bit of the memcpy call rewriting by sinking some
irrelevant code further down and making the call-emitting code a bit
more concrete.

Previously, memcpy of a subvector would actually miscompile (!!!) the
copy into a single vector element copy. I have no idea how this ever
worked. =/ This is the memcpy half of PR14478 which we probably weren't
noticing previously because it didn't actually assert.

The rewrite relies on the newly refactored insert- and extractVector
functions to do the heavy lifting, and those are the same as used for
loads and stores which makes the test coverage a bit more meaningful
here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170338 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 14:51:24 +00:00
Patrik Hagglund
3d170e64ca Revert/correct some FastISel changes in r170104 (EVT->MVT for
TargetLowering::getRegClassFor).

Some isSimple() guards were missing, or getSimpleVT() were hoisted too
far, resulting in asserts on valid LLVM assembly input.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 14:30:06 +00:00
Evgeniy Stepanov
1794814198 Optimize tree walking in markAliveBlocks.
Check whether a BB is known as reachable before adding it to the worklist.
This way BB's with multiple predecessors are added to the list no more than
once.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170335 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 14:28:00 +00:00
Richard Osborne
a839ffc323 Add instruction encodings for PEEK and ENDIN.
Previously these were marked with the wrong format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170334 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 14:23:54 +00:00
Chandler Carruth
8bbff2348d Fix a secondary bug I introduced while fixing the first part of PR14478.
The first half of fixing this bug was actually in r170328, but was
entirely coincidental. It did however get me to realize the nature of
the bug, and adapt the test case to test more interesting behavior. In
turn, that uncovered the rest of the bug which I've fixed here.

This should fix two new asserts that showed up in the vectorize nightly
tester.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170333 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 14:03:01 +00:00
Richard Osborne
6e43b7f6b2 Fix parameter name in prototypes in XCoreDisassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170332 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 13:55:49 +00:00
Chandler Carruth
5814a88ce9 Hoist a convertValue call to the two paths where it is needed.
I noticed this while looking at r170328. We only ever do a vector
rewrite when the alloca *is* the vector type, so it's good to not paper
over bugs here by doing a convertValue that isn't needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170331 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 13:51:03 +00:00
Richard Osborne
35150cbf41 Add instruction encodings / disassembly support for rus instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 13:50:04 +00:00
Chandler Carruth
7f7d201d73 Hoist the insertVector helper to be a static helper.
This will allow its use inside of memcpy rewriting as well. This routine
is more complex than extractVector, and some of its uses are not 100%
where I want them to be so there is still some work to do here.

While this can technically change the output in some cases, it shouldn't
be a change that matters -- IE, it can leave some dead code lying around
that prior versions did not, etc.

Yet another step in the refactorings leading up to the solution to the
last component of PR14478.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170328 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 13:41:21 +00:00
Richard Osborne
ff6114e872 Add instruction encodings for ZEXT and SEXT.
Previously these were marked with the wrong format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170327 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 13:20:37 +00:00
Chandler Carruth
5c531eb8b1 Lift the extractVector helper all the way out to a static helper function.
The method helpers all implicitly act upon the alloca, and what we
really want is a fully generic helper. Doing memcpy rewrites is more
special than all other rewrites because we are at times rewriting
instructions which touch pointers *other* than the alloca. As
a consequence all of the helpers needed by memcpy rewriting of
sub-vector copies will need to be generalized fully.

Note that all of these helpers ({insert,extract}{Integer,Vector}) are
woefully uncommented. I'm going to go back through and document them
once I get the factoring correct.

No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 13:07:30 +00:00
Chandler Carruth
8ab1efd5fc Factor the vector load rewriting into a more generic form.
This makes it suitable for use in rewriting memcpy in the presence of
subvector memcpy intrinsics.

No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:50:21 +00:00
Richard Osborne
1ffe48a84b Add instruction encodings / disassembly support for 2r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170323 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:29:31 +00:00
Richard Osborne
dd78daa199 Add instruction encodings / disassembly support for 0r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:26:29 +00:00
Richard Osborne
2694948966 Simplify assertion in XCoreInstPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170321 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:13:46 +00:00
Richard Osborne
b4d40a04f0 Update comments to match recommended doxygen style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:13:41 +00:00
Richard Osborne
31061e68a2 Remove unnecessary include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:13:32 +00:00
Duncan Sands
12ea410114 Fix typo that results in new landing pads not getting a name, fixing PR14617.
Patch by Chris Toshok.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170318 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:02:36 +00:00
Duncan Sands
d01e3f0c0b Fix comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170317 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 11:43:15 +00:00
Craig Topper
a521e68210 Remove EFLAGS from the BLSI/BLSMSK/BLSR patterns. The nodes created by DAG combine don't contain an EFLAGS def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 06:13:48 +00:00
Craig Topper
b926afcc5b Simplify BMI ANDN matching to use patterns instead of a DAG combine. Also add ANDN to isDefConvertible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170305 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 05:12:30 +00:00
Craig Topper
b72ae70036 Add rest of BMI/BMI2 instructions to the folding tables as well as popcnt and lzcnt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 05:02:29 +00:00
Craig Topper
16a1acc3b9 Remove store forms of DEC/INC from isDefConvertible. Since they are stores they don't have a register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170303 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 04:55:07 +00:00
Chandler Carruth
17c84ea594 Fix the first part of PR14478: memset now works.
PR14478 highlights a serious problem in SROA that simply wasn't being
exercised due to a lack of vector input code mixed with C-library
function calls. Part of SROA was written carefully to handle subvector
accesses via memset and memcpy, but the rewriter never grew support for
this. Fixing it required refactoring the subvector access code in other
parts of SROA so it could be shared, and then fixing the splat formation
logic and using subvector insertion (this patch).

The PR isn't quite fixed yet, as memcpy is still broken in the same way.
I'm starting on that series of patches now.

Hopefully this will be enough to bring the bullet benchmark back to life
with the bb-vectorizer enabled, but that may require fixing memcpy as
well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170301 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 04:07:37 +00:00
Chandler Carruth
d6e4397a5b Extract the logic for inserting a subvector into a vector alloca.
No functionality changed. Another step of refactoring toward solving
PR14487.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 04:07:35 +00:00
Chandler Carruth
225d25de49 Lift the integer splat computation into a helper function.
No functionality changed. Refactoring leading up to the fix for PR14478
which requires some significant changes to the memset and memcpy
rewriting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 04:07:30 +00:00
Craig Topper
a1032b7e4c Add debug prints for when optimizeLoadInstr folds a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 03:56:00 +00:00
Richard Osborne
e4e0089e45 Add tests for disassembly of 1r XCore instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 18:06:30 +00:00
Richard Osborne
54d6266e9b Add instruction encodings and disassembly for 1r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170293 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 17:37:34 +00:00
Richard Osborne
881e3cca66 Add XCore disassembler.
Currently there is no instruction encoding info and
XCoreDisassembler::getInstruction() always returns Fail. I intend to add
instruction encodings and tests in follow on commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 17:29:14 +00:00
Richard Osborne
054169be24 Remove invalid instruction encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 16:46:31 +00:00
Richard Osborne
1fb0aaa58f Mark anything deriving from PseudoInstXCore as a pseudo instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170290 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 16:46:28 +00:00
Richard Osborne
a44a751bc9 Set instruction size correctly in XCoreInstrFormats.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170289 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 16:46:24 +00:00
Richard Osborne
9578d793c9 Change XCoreAsmPrinter to lower MachineInstrs to MCInsts before emission.
This change adds XCoreMCInstLower to do the lowering to MCInst and
XCoreInstPrinter to print the MCInsts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 16:20:48 +00:00
Richard Osborne
6438214d21 Replace ${:comment} with the comment symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 15:59:02 +00:00