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15079 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
8d3cebca8e Add AVX Move Aligned/Unaligned packed integers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107206 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 21:25:12 +00:00
Bill Wendling
207855cff9 Introducing the "linker_weak" linkage type. This will be used for Objective-C 
metadata types which should be marked as "weak", but which the linker will
remove upon final linkage. For example, the "objc_msgSend_fixup_alloc" symbol is
defined like this:

       .globl l_objc_msgSend_fixup_alloc
       .weak_definition l_objc_msgSend_fixup_alloc
       .section __DATA, __objc_msgrefs, coalesced
       .align 3
l_objc_msgSend_fixup_alloc:
        .quad   _objc_msgSend_fixup
        .quad   L_OBJC_METH_VAR_NAME_1

This is different from the "linker_private" linkage type, because it can't have
the metadata defined with ".weak_definition".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107205 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 21:24:00 +00:00
Bruno Cardoso Lopes
147b7cad2f Add AVX ld/st XCSR register. 
Add VEX encoding bits for MRMXm x86 form



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107204 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 20:35:48 +00:00
Bob Wilson
21773e716f Add support for encoding VDUP (ARM core register) instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107201 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 20:13:29 +00:00
Bruno Cardoso Lopes
721ef73d88 Add AVX non-temporal stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107178 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
de173ca1fb Move non-temporal movs to their own section 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107168 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 17:42:37 +00:00
Bob Wilson
d5a563de07 Add support for encoding NEON VMOV (from core register to scalar) instructions. 
The encoding is the same as VMOV (from scalar to core register) except that
the operands are in different places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107167 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 17:34:07 +00:00
Bruno Cardoso Lopes
ea86423cbd Add sqrt, rsqrt and rcp AVX instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107166 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 17:26:30 +00:00
Jim Grosbach
077f1bfa91 skip dbg_value instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107154 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 16:55:24 +00:00
Bob Wilson
1ab38469df The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to add 
a CPSR operand to them causes an assertion failure, so apparently these
instructions haven't been getting a lot of use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107147 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 16:25:11 +00:00
Rafael Espindola
d31f972bd3 Add a VT argument to getMinimalPhysRegClass and replace the copy related uses 
of getPhysicalRegisterRegClass with it.

If we want to make a copy (or estimate its cost), it is better to use the
smallest class as more efficient operations might be possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107140 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 14:02:34 +00:00
Duncan Sands
31a3a3ebaf Remove pointless variable LastDef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107135 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 13:23:22 +00:00
Duncan Sands
58c86910b3 Remove unused variable Loc and pointless variables unified_syntax 
and thumb_mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107133 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 13:04:35 +00:00
Duncan Sands
978189e090 Remove an unused and a pointless variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107131 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 13:00:29 +00:00
Duncan Sands
78337b4d4d Remove pointless and unused variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107130 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 12:48:49 +00:00
Duncan Sands
90c64f4aac Remove initialized but otherwise unused variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107127 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 11:22:26 +00:00
Evan Cheng
c36b5b9730 PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107122 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 05:38:36 +00:00
Evan Cheng
c170f66742 Change if-cvt options to something that actually as useable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107121 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 05:37:59 +00:00
Bruno Cardoso Lopes
b22dc70a5c Refactoring of arithmetic instruction classes with unary operator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107116 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 01:33:09 +00:00
Jakob Stoklund Olesen
628a79771b When no memoperands are present, assume unaligned, volatile. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107114 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 01:13:07 +00:00
Bruno Cardoso Lopes
4548260ab5 Described the missing AVX forms of SSE2 convert instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107108 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 00:36:02 +00:00
Bob Wilson
5cdede43e9 Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding is 
the same as ARM except that the condition code field is always set to ARMCC::AL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107107 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-29 00:26:13 +00:00
Bob Wilson
62d24a4b92 Make the ARMCodeEmitter identify Thumb functions via ARMFunctionInfo instead 
of the Subtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107086 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-28 22:23:17 +00:00
Jim Grosbach
e89c5e57cc tidy up style. no functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107073 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-28 21:29:17 +00:00
Bob Wilson
08baddbc07 Refactor encoding function for NEON 1-register with modified immediate format. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107070 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-28 21:16:30 +00:00
Bob Wilson
d896a97dc7 Support Thumb mode encoding of NEON instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107068 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-28 21:12:19 +00:00
Bill Wendling
c25ccf85e5 Reduce indentation via early exit. NFC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107067 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-28 21:08:32 +00:00
Jim Grosbach
e9e3f20ffb minor housekeeping cleanup: 80-column, trailing whitespace, spelling, etc.. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106988 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-28 04:27:01 +00:00
Gabor Greif
7a1d92a2cb use ArgOperand API 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106946 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-26 12:17:21 +00:00
Gabor Greif
6bec14fea0 use ArgOperand API 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-26 12:09:10 +00:00
Gabor Greif
1cfe44a460 use ArgOperand API 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106944 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-26 11:51:52 +00:00
Eli Friedman
a2c6f457a4 Followup to r106770: actually generate SXTB and SXTH for sign-extensions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106940 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-26 04:36:50 +00:00
Bob Wilson
52e4a0a074 Add support for encoding NEON VMOV (from scalar to core register) instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106938 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-26 04:07:15 +00:00
Evan Cheng
f6799394d5 It's now possible to run code placement pass for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106935 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-26 01:52:05 +00:00
Jakob Stoklund Olesen
4f5d84e4ad When creating X86 MUL8 and DIV8 instructions, make sure we don't produce 
CopyFromReg nodes for aliasing registers (AX and AL). This confuses the fast
register allocator.

Instead of CopyFromReg(AL), use ExtractSubReg(CopyFromReg(AX), sub_8bit).

This fixes PR7312.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106934 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-26 00:39:23 +00:00
Bob Wilson
80d9bc0336 Renumber NEON instruction formats to be consecutive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106927 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-26 00:05:09 +00:00
Bob Wilson
184723d9be Rename ARM instruction formats NEONGetLnFrm, NEONSetLnFrm and NEONDupFrm to 
"N..." instead of "NEON..." for consistency with the other NEON format names.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106921 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:56:05 +00:00
Bruno Cardoso Lopes
bdffc16d65 Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106917 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:47:23 +00:00
Bob Wilson
2653263165 Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats. 
Renumber MiscFrm to 25.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106916 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:45:37 +00:00
Bruno Cardoso Lopes
161476ec34 Reapply r106896: 
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106912 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:33:42 +00:00
Daniel Dunbar
e39e06af38 Thumb2ITBlockPass: Fix a possible dereference of an invalid iterator. This was 
introduced in r106343, but only showed up recently (with a particular compiler &
linker combination) because of the particular check, and because we have no
builtin checking for dereferencing the end of an array, which is truly
unfortunate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106908 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:14:54 +00:00
Bruno Cardoso Lopes
95325b08a3 revert this now, it's using avx instead of sse :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106906 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 23:04:29 +00:00
Evan Cheng
13151432ed Change if-conversion block size limit checks to add some flexibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106901 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 22:42:03 +00:00
Bob Wilson
5e7b607f72 Add support for encoding 3-register NEON instructions, and fix 
emitNEON2RegInstruction's handling of 2-address operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106900 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 22:40:46 +00:00
Bruno Cardoso Lopes
544a95d716 Add several AVX MOV flavors 
Support VEX encoding for MRMDestReg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106896 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 22:27:51 +00:00
Dale Johannesen
1784d160e4 The hasMemory argument is irrelevant to how the argument 
for an "i" constraint should get lowered; PR 6309.  While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106893 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 21:55:36 +00:00
Bob Wilson
583a2a0615 Add support for encoding 2-register NEON instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106891 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 21:17:19 +00:00
Dan Gohman
ca5b8553ea pcmpeqd and friends are Commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106886 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 21:05:35 +00:00
Bob Wilson
8c605c601d Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106881 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 20:54:44 +00:00
Bill Wendling
730c07e50d - Reapply r106066 now that the bzip2 build regression has been fixed. 
- 2010-06-25-CoalescerSubRegDefDead.ll is the testcase for r106878.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106880 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-25 20:48:10 +00:00