Commit Graph

66447 Commits

Author SHA1 Message Date
Hao Liu
9e0fd27ce7 Fix a bug about generating undef operand when optimising shuffle vector and insert element in instruction combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198730 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 03:06:15 +00:00
David Woodhouse
476136e951 [x86] Kill gratuitous X86_{32,64}TargetMachine subclasses, use X86TargetMachine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198720 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-08 00:08:50 +00:00
Rafael Espindola
b56c57bcbb Move the llvm mangler to lib/IR.
This makes it available to tools that don't link with target (like llvm-ar).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198708 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 21:19:40 +00:00
Roman Divacky
7e889af768 In the ELFWriter when writing aliased (.set) symbols dont blindly
take type from the new symbol but merge them so that the type
is never "downgraded".

This is probably quite rare, except for IFUNC symbols which
we used to misassemble, losing the IFUNC type.

Fixes #18372.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 20:17:03 +00:00
Cameron McInally
67cc1dc995 Fix uninitialized variable warning in DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198702 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:51:38 +00:00
Rafael Espindola
e3b54e2e50 Don't assert with private type info variables.
With the gnu objc runtime private strings are used. Since we only need to
produce a unique label, the fix is to just drop the asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198701 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:38:47 +00:00
Benjamin Kramer
5f9cb7b569 Emit arange padding with a single directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 19:28:14 +00:00
David Peixotto
6f9a004738 Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64
This commit adds the pre-UAL aliases of fconsts and fconstd for
vmov.f32 and vmov.f64. They use an InstAlias rather than a
MnemonicAlias to properly support the predicate operand.

We need to support encoded 8-bit constants in order to implement the
pre-UAL fconsts/fconstd aliases for vmov.f32/vmov.f64, so this
commit also fixes parsing of encoded floating point constants used
in vmov.f32/vmov.f64 instructions. Now we can support assembly code
like this:

  fconsts s0, #0x70

which is equivalent to vmov.f32 s0, #1.0.

Most of the code was already in place to support this feature.
Previously the code was trying to accept encoded 8-bit float
constants for the vmov.f32/vmov.f64 instructions.  It looks like the
support for parsing encoded floats was lost in a refactoring in
commit r148556 and we did not have any tests in place to catch it.

The change in this commit is to keep the parsed value as a 32-bit
float instead of a 64-bit double because that is what the isFPImm()
function expects to find. There is no loss of precision by using a
32-bit float here because we are still limited to an 8-bit encoded
value in the end.

Additionally, we explicitly reject encoded 8-bit floats for
vmovf.32/64. This is the same as the current behavior, but we now do
it explicitly rather than accidently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198697 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 18:19:23 +00:00
Logan Chien
1485d51a16 [arm] Fix an incorrect comment in ARMUnwindOpAsm.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198696 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 17:47:25 +00:00
Chandler Carruth
1446dc9ba8 Try to fix the windows build. The comments in other files don't seem to
be quite accurate. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198690 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 12:37:13 +00:00
Chandler Carruth
bc65a8d518 Move the LLVM IR asm writer header files into the IR directory, as they
are part of the core IR library in order to support dumping and other
basic functionality.

Rename the 'Assembly' include directory to 'AsmParser' to match the
library name and the only functionality left their -- printing has been
in the core IR library for quite some time.

Update all of the #includes to match.

All of this started because I wanted to have the layering in good shape
before I started adding support for printing LLVM IR using the new pass
infrastructure, and commandline support for the new pass infrastructure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198688 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 12:34:26 +00:00
Chandler Carruth
974a445bd9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198685 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 11:48:04 +00:00
Hao Liu
1a080cef90 [AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. There is no test cases for D tuple as the original test cases are too large. As the spill/fill of the D tuple is similar to the Q tuple, the correctness can be guaranteed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 10:50:43 +00:00
Hao Liu
9cca551091 [AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuples such as QPair/QTriple/QQuad. There is no test case for D tuple as the original test cases are too large. As the copy of the D tuple is similar to the Q tuple, the correctness can be guaranteed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198682 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 10:00:03 +00:00
Venkatraman Govindaraju
dff38618c6 [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc.,
Also, correct the offsets for FixupsKindInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198681 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 08:00:49 +00:00
Andrew Trick
9c15f4c9c9 Fix for PR18396: Assertion: MO->isDead "Cannot fold physreg def".
InlineSpiller::foldMemoryOperand needs to handle undef call operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198679 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 07:31:10 +00:00
Andrew Trick
b4e0c9b85d Reapply r198654 "indvars: sink truncates outside the loop."
This doesn't seem to have actually broken anything. It was paranoia
on my part. Trying again now that bots are more stable.

This is a follow up of the r198338 commit that added truncates for
lcssa phi nodes. Sinking the truncates below the phis cleans up the
loop and simplifies subsequent analysis within the indvars pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 06:59:12 +00:00
Kevin Qin
a4d123f461 [AArch64 NEON] Fixed incorrect immediate used in BIC instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198675 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 05:10:47 +00:00
Saleem Abdulrasool
6a4207d263 ARM IAS: allow more depth in contextual diagnostics
Switch the context to be SmallVectors.  This allows for saving additional
context when providing previous emission sites.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198665 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 02:29:00 +00:00
Saleem Abdulrasool
a83f45be97 ARM IAS: refactor unwind context
Move the unwinding context for the ARM IAS into a helper class.  This is purely
a structural refactoring.  A follow up change allows for recording additional
depth to improve diagnostics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198664 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 02:28:55 +00:00
Saleem Abdulrasool
9d76f40575 ARM Streamer: print out tag names
If using verbose asm, print out the friendly name of the tag if possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198663 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 02:28:50 +00:00
Saleem Abdulrasool
8e129852fb ARM IAS: improve .eabi_attribute handling
Parse tag names as well as expressions.  The former is part of the
specification, the latter is for improved compatibility with the GNU assembler.
Fix attribute value handling to be comformant to the specification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198662 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 02:28:42 +00:00
Saleem Abdulrasool
307f17b938 MCParser: introduce Note and use it for ARM AsmParser
Introduce a new virtual method Note into the AsmParser.  This completements the
existing Warning and Error methods.  Use the new method to clean up the output
of the unwind routines in the ARM AsmParser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198661 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 02:28:31 +00:00
Mingjie Xing
a7f23233fa Fix comment of findGCD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198660 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 01:54:16 +00:00
Andrew Trick
2352abb7c6 Revert "indvars: sink truncates outside the loop."
This reverts commit r198654.

One of the bots reported a SciMark failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198659 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 01:50:58 +00:00
Venkatraman Govindaraju
a16f1ce2d9 [Sparc] Add support for parsing memory operands in sparc AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198658 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 01:49:11 +00:00
Andrew Trick
ced88c5918 indvars: sink truncates outside the loop.
This is a follow up of the r198338 commit that added truncates for
lcssa phi nodes. Sinking the truncates below the phis cleans up the
loop and simplifies subsequent analysis within the indvars pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198654 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 01:02:55 +00:00
Andrew Trick
f86063e7ec 80 col. comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198653 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 01:02:52 +00:00
Jack Carter
063564c4c5 [Mips] TargetStreamer Support for .abicalls and .set pic0.
This patch adds .abicalls and .set pic0 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that both the integrated and standalone
assemblers will use for the output for these directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198646 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 23:27:31 +00:00
Kevin Enderby
284c8bc4b0 For the 'C' disassembler API, add a new ReferenceType for the
SymbolLookUp() call back to return a demangled C++ name to
be used as a comment.

For example darwin's otool(1) program the uses the llvm
disassembler now can produce disassembly like:

callq   __ZNK4llvm6Target20createMCDisassemblerERKNS_15MCSubtargetInfoE ## llvm::Target::createMCDisassembler(llvm::MCSubtargetInfo const&) const

Also fix a bug in LLVMDisasmInstruction() that was not flushing
the raw_svector_ostream for the disassembled instruction string
before copying it to the output buffer that was causing truncation
of the output.

rdar://10173828


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198637 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 22:08:08 +00:00
Rafael Espindola
177648336a Improve documentation of the 'a' specifier and the '<abi>:<pref>' align pair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198636 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 21:40:24 +00:00
Andrew Trick
a55aaf7fe6 Reapply r198478 "Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists things."
Now with a fix for PR18384: ValueHandleBase::ValueIsDeleted.

We need to invalidate SCEV's loop info when we delete a block, even if no values are hoisted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198631 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 19:43:14 +00:00
Rafael Espindola
34fa311267 Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198624 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 18:14:34 +00:00
Tim Northover
0aba46f4cd ARM MachO: sort out isTargetDarwin/isTargetIOS/... checks.
The ARM backend has been using most of the MachO related subtarget
checks almost interchangeably, and since the only target it's had to
run on has been IOS (which is all three of MachO, Darwin and IOS) it's
worked out OK so far.

But we'd like to support embedded targets under the "*-*-none-macho"
triple, which means everything starts falling apart and inconsistent
behaviours emerge.

This patch should pick a reasonably sensible set of behaviours for the
new triple (and any others that come along, with luck). Some choices
were debatable (notably FP == r7 or r11), but we can revisit those
later when deficiencies become apparent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198617 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:28:05 +00:00
Robert Lytton
f1c1a7ce44 XCore Target: correct callee save register spilling when callsUnwindInit is true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198616 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:21:12 +00:00
Robert Lytton
3a905cbce6 XCore target: Lower EH_RETURN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198615 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:21:07 +00:00
Robert Lytton
af74cbf553 XCore target: Lower FRAME_TO_ARGS_OFFSET
This requires a knowledge of the stack size which is not known until
the frame is complete, hence the need for the XCoreFTAOElim pass
which lowers the XCoreISD::FRAME_TO_ARGS_OFFSET instrution into its
final form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198614 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:21:00 +00:00
Robert Lytton
12ad7cd730 XCore target: Lower RETURNADDR
Only handles a depth of zero (the same as FRAMEADDR)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198613 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:20:53 +00:00
Robert Lytton
c2508e505a XCore target: Optimise entsp / retsp selection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198612 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:20:47 +00:00
Robert Lytton
7d2dd96694 XCore target: Refactor LR handling
We also narrow the liveness of FP & LR during the prologue to
reflect the actual usage of the registers.
I have been unable to construct a test to prove the previous live
range was too large.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198611 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:20:41 +00:00
Robert Lytton
e2d3dc8b81 XCore target: Refactor the loading of constants into a register
This common functionality will be used to lower FRAME_TO_ARGS_OFFSET.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:20:37 +00:00
Robert Lytton
e452d6e547 XCore target: fix handling of unsized global arrays in large code model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198609 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:20:32 +00:00
Tim Northover
8e27a6b1d3 ARM: keep special non-AEABIness of "-darwin-eabi" triples for now
Longer term, we want to move users to "*-*-*-macho" for embedded work, but for
now people are relying on the last thing we told them, which is unfortunately
"*-*-darwin-eabi".

rdar://problem/15703934

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198602 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 12:00:44 +00:00
Elena Demikhovsky
a56ae89d22 AVX-512: added intrinsic vcvtpd2ps (with rounding mode and without)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198593 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 08:45:54 +00:00
Venkatraman Govindaraju
49e36be48a [Sparc] Explicitly cast -1 to unsigned to fix buildbot errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198592 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 08:24:44 +00:00
Venkatraman Govindaraju
9429f47d83 [Sparc] Add initial implementation of disassembler for sparc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198591 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 08:08:58 +00:00
David Majnemer
ba7548302b MC: Fatally error if subtraction operand is bad
Instead of crashing, raise an error when a subtraction expression
involves an undefined symbol.

This fixes PR18375.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198590 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 07:39:46 +00:00
Craig Topper
0fee6d9703 Remove SegOvrBits from X86 TSFlags since they weren't being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198588 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:51:58 +00:00
Craig Topper
46832216c6 Remove argument to fix build bot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198587 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:09:03 +00:00
Craig Topper
30be10a06e Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode
The 0x66 prefix toggles between 16-bit and 32-bit addressing mode.
So in 32-bit mode it is used to switch to 16-bit addressing mode for the
following instruction, while in 16-bit mode it's the other way round — it's
used to switch to 32-bit mode instead.

Thus, emit the 0x66 prefix byte for OpSize only in 32-bit (and 64-bit) mode,
and introduce a new OpSize16 bit which is used in 16-bit mode instead.

This is just the basic infrastructure for that change; a subsequent patch
will add the new OpSize16 bit to the 32-bit instructions that need it.

Patch from David Woodhouse.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198586 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:02:58 +00:00
Bill Wendling
b87d142ba1 Remove unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198585 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 06:00:00 +00:00
Craig Topper
93c9401dff [x86] Add basic support for .code16
This is not really expected to work right yet. Mostly because we will
still emit the OpSize (0x66) prefix in all the wrong places, along with
a number of other corner cases. Those will all be fixed in the subsequent
commits.

Patch from David Woodhouse.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198584 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 04:55:54 +00:00
Kevin Qin
f14f22cebf [AArch64 NEON] Fix invalid constant used in vselect condition.
There is a wrong assumption that the vector element type and the
type of each ConstantSDNode in the build_vector were the same.
However, when promoting the integer operand of a legally typed
build_vector, the operand type and the vector element type do not
need to be the same
(See method 'DAGTypeLegalizer::PromoteIntOp_BUILD_VECTOR' in
LegalizeIntegerTypes.cpp).

  in AArch64 backend, the following dag sequence:

  C0: i1 = Constant<0>
  C1: i1 = Constant<-1>
  V: v8i1 = BUILD_VECTOR C1, C1, C0, C0, C0, C0, C0, C0

  is type-legalized into:

  NewC0: i32 = Constant<0>
  NewC1: i32 = Constant<1>
  V: v8i8 = BUILD_VECTOR NewC1, NewC1, NewC0, NewC0, NewC0, NewC0, NewC0, NewC0

Forcing a getZeroExtend to VTBits to ensure that the new constant
is correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198582 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 02:26:10 +00:00
Venkatraman Govindaraju
8cba6039da [Sparc] Add ELF Object Writer for Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198580 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 01:22:54 +00:00
Bill Wendling
4644d79871 Refactor function that checks that __builtin_returnaddress's argument is constant.
This moves the check up into the parent class so that all targets can use it
without having to copy (and keep in sync) the same error message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198579 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 00:43:20 +00:00
Saleem Abdulrasool
733d01ed45 ARM: move ARMUnwindOp.h into Support
Move the ARM EHABI unwind opcode definitions from the ARM MCTargetDesc into LLVM
Support.  This enables sharing of the definitions across the ARM target code as
well as llvm-readobj.  This will allow implementation of the unwind decoding in
llvm-readobj.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198576 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 00:15:00 +00:00
Benjamin Kramer
0dc0e22ada SPARC: Make helper function static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198567 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 20:26:05 +00:00
Craig Topper
074b501c17 Fix ModR/M byte output for 16-bit addressing modes (PR18220)
Add some tests to validate correct register selection, including a fix
to an existing test which was requiring the *wrong* output.

Patch from David Woodhouse.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198566 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 19:40:56 +00:00
Craig Topper
d9ff6f10a1 Remove opcode from MOV32r0 that I accidentally left when I converted it to Pseudo. Remove FIXME as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198564 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 19:25:13 +00:00
Saleem Abdulrasool
632c1e5eb6 ARM: style changes to LDRD, STRD definition
Fix indentation, name registers similar to ARM ARM.

No functionality change!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198563 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 16:36:37 +00:00
Elena Demikhovsky
497417520c AVX-512: changed property name from "neverHasSideEffects=1" to "hasSideEffects=0", added this property to VMOVSS/VMOVSD;
Optimized a truncate pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198562 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 14:21:07 +00:00
Elena Demikhovsky
3a880de6e6 AVX-512: Added more intrinsics for convert and min/max.
Removed vzeroupper from AVX-512 mode - our optimization gude does not recommend to insert vzeroupper at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198557 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 10:46:09 +00:00
Chandler Carruth
5c1c0bd714 [PM] Add a definition for the static PassID in the CallGraphAnalysis.
Missed this when adding the skeleton analysis. Caught by a build break
in the next patch I'm working on when trying to use the analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198556 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 10:38:52 +00:00
Craig Topper
9005d2a842 Add the other form of movq xmm,xmm for the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198551 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 07:16:04 +00:00
Craig Topper
adb7d3b49b Use patterns to remove some duplicate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198550 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 06:55:48 +00:00
Craig Topper
6a69266fed Fix encoding for PUSH64i16. Add In64BitMode Predicate. Remove disassembler hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198547 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 05:46:38 +00:00
Craig Topper
01cb7fa977 Mark x86 _alt instructions as AsmParserOnly so they will be omitted from disassembler without string matches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198545 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 04:55:55 +00:00
Craig Topper
2b5dc93948 Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode and remove disassmbler table emitter hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 04:32:42 +00:00
Craig Topper
527f132627 Add a new x86 specific instruction flag to force some isCodeGenOnly instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198543 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 04:17:28 +00:00
Venkatraman Govindaraju
5d02c84191 [Sparc] Add initial implementation of MC Code emitter for sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198533 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 02:13:48 +00:00
Bill Wendling
4a816471f5 Emit an error message if the value passed to __builtin_returnaddress isn't a constant
__builtin_returnaddress requires that the value passed into is be a constant.
However, at -O0 even a constant expression may not be converted to a constant.
Emit an error message intead of crashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198531 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 01:47:20 +00:00
Craig Topper
e43a0f8015 Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198530 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-05 01:35:51 +00:00
Alp Toker
395f7c2505 Add missed cleanup from r198456
All other uses of this macro in LLVM/clang have been moved to the function
definition so follow suite (and the usage advice) here too for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198516 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 22:47:48 +00:00
Craig Topper
29d56f68c6 Tag x86 move to/from debug/control registers with Not64BitMode/In64BitMode. Remove disassembler hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198515 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 22:29:41 +00:00
Alp Toker
ccd36c4c54 Revert "Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists things."
This commit was the source of crasher PR18384:

While deleting: label %for.cond127
An asserting value handle still pointed to this value!
UNREACHABLE executed at llvm/lib/IR/Value.cpp:671!

Reverting to get the builders green, feel free to re-land after fixing up.
(Renato has a handy isolated repro if you need it.)

This reverts commit r198478.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198503 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 17:00:45 +00:00
Venkatraman Govindaraju
72d2b05254 [Sparc] Add the initial implementation of an asm parser for sparc/sparcv9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198484 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 11:30:13 +00:00
Venkatraman Govindaraju
6e202a960e [SparcV9]: Implement RETURNADDR and FRAMEADDR lowering in SPARC64.
Fixes PR18356.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198480 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 07:17:21 +00:00
Andrew Trick
c846d65f99 Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists things.
getSCEV for an ashr instruction creates an intermediate zext
expression when it truncates its operand.

The operand is initially inside the loop, so the narrow zext
expression has a non-loop-invariant loop disposition.

LoopSimplify then runs on an outer loop, hoists the ashr operand, and
properly invalidate the SCEVs that are mapped to value.

The SCEV expression for the ashr is now an AddRec with the hoisted
value as the now loop-invariant start value.

The LoopDisposition of this wide value was properly invalidated during
LoopSimplify.

However, if we later get the ashr SCEV again, we again try to create
the intermediate zext expression. We get the same SCEV that we did
earlier, and it is still cached because it was never mapped to a
Value. When we try to create a new AddRec we abort because we're using
the old non-loop-invariant LoopDisposition.

I don't have a solution for this other than to clear LoopDisposition
when LoopSimplify hoists things.

I think the long-term strategy should be to perform LoopSimplify on
all loops before computing SCEV and before running any loop opts on
individual loops. It's possible we may want to rerun LoopSimplify on
individual loops, but it should rarely do anything, so rarely require
invalidating SCEV.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198478 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 05:52:49 +00:00
Craig Topper
030ceadd69 Remove JMP64pcrel32 (jmpq ). There are no tests for it. I'm pretty sure it won't be emitted correctly since it was set to NoImm. And I can't prove that gas accepts 'jmpq' with an immediate either. Remove the special case for it from the disassembler table generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198475 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-04 05:09:27 +00:00
Nico Weber
c3d3f0c696 Add a LLVM_DUMP_METHOD macro.
The motivation is to mark dump methods as used in debug builds so that they can
be called from lldb, but to not do so in release builds so that they can be
dead-stripped.

There's lots of potential follow-up work suggested in the thread
"Should dump methods be LLVM_ATTRIBUTE_USED only in debug builds?" on cfe-dev,
but everyone seems to agreen on this subset.

Macro name chosen by fair coin toss.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198456 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 22:53:37 +00:00
Reid Kleckner
077b7b1472 Revert "For disassembly when adding a symbolic operand that is a C++ symbol name, also put the human readable name in a comment."
This reverts commit r198441.

This change doesn't build on Windows, and doesn't do the right thing on
Linux and other platforms that don't use a _Z prefix instead of __Z for
C++ names.

It also had no tests, so it wasn't clear how to fix it forward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198445 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 19:56:20 +00:00
Kevin Enderby
6cedb06492 For disassembly when adding a symbolic operand that is a C++
symbol name, also put the human readable name in a comment.

Also fix a bug in LLVMDisasmInstruction() that was not flushing
the raw_svector_ostream for the disassembled instruction string
before copying it to the output buffer that was causing truncation
of the output.

rdar://10173828


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198441 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 19:33:09 +00:00
Rafael Espindola
8e0f67dcec Make the llvm mangler depend only on DataLayout.
Before this patch any program that wanted to know the final symbol name of a
GlobalValue had to link with Target.

This patch implements a compromise solution where the mangler uses DataLayout.
This way, any tool that already links with Target (llc, clang) gets the exact
behavior as before and new IR files can be mangled without linking with Target.

With this patch the mangler is constructed with just a DataLayout and DataLayout
is extended to include the information the Mangler needs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198438 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 19:21:54 +00:00
Ana Pazos
5124fef085 [AArch64][NEON] Added SXTL and SXTL2 instruction aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198437 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 19:20:31 +00:00
David Blaikie
d329ef5a3c Revert "Revert "Debug Info: Type Units: Simplify type hashing using IR-provided unique names.""
This reverts commit r198398, thus reapplying r198397.

I had accidentally introduced an endianness issue when applying the hash
to the type unit. Using support::ulittle64_t in the reinterpret_cast in
addDwarfTypeUnitType fixes this issue.

Original commit message:

Debug Info: Type Units: Simplify type hashing using IR-provided unique
names.

What's good for LTO metadata size problems ought to be good for non-LTO
debug info size too, so let's rely on the same uniqueness in both cases.
If it's insufficient for non-LTO for whatever reason (since we now won't
be uniquing CU-local types or any C types - but these are likely to not
be the most significant contributors to type bloat) we should consider a
frontend solution that'll help both LTO and non-LTO alike, rather than
using DWARF-level DIE-hashing that only helps non-LTO debug info size.

It's also much simpler this way and benefits C++ even more since we can
deduplicate lexically separate definitions of the same C++ type since
they have the same mangled name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198436 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 18:59:42 +00:00
David Peixotto
dace98d805 Fix loop rerolling pass failure with non-consant loop lower bound
The loop rerolling pass was failing with an assertion failure from a
failed cast on loops like this:

  void foo(int *A, int *B, int m, int n) {
    for (int i = m; i < n; i+=4) {
      A[i+0] = B[i+0] * 4;
      A[i+1] = B[i+1] * 4;
      A[i+2] = B[i+2] * 4;
      A[i+3] = B[i+3] * 4;
    }
  }

The code was casting the SCEV-expanded code for the new
induction variable to a phi-node. When the loop had a non-constant
lower bound, the SCEV expander would end the code expansion with an
add insted of a phi node and the cast would fail.

It looks like the cast to a phi node was only needed to get the
induction variable value coming from the backedge to compute the end
of loop condition. This patch changes the loop reroller to compare
the induction variable to the number of times the backedge is taken
instead of the iteration count of the loop. In other words, we stop
the loop when the current value of the induction variable ==
IterationCount-1. Previously, the comparison was comparing the
induction variable value from the next iteration == IterationCount.

This problem only seems to occur on 32-bit targets. For some reason,
the loop is not rerolled on 64-bit targets.

PR18290


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198425 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 17:20:01 +00:00
Arnold Schwaighofer
3036182e99 BasicAA: Use reachabilty instead of dominance for checking value equality in phi
cycles

This allows the value equality check to work even if we don't have a dominator
tree. Also add some more comments.

I was worried about compile time impacts and did not implement reachability but
used the dominance check in the initial patch. The trade-off was that the
dominator tree was required.
The llvm utility function isPotentiallyReachable cuts off the recursive search
after 32 visits. Testing did not show any compile time regressions showing my
worries unjustfied.

No compile time or performance regressions at O3 -flto -mavx on test-suite +
externals.

Addresses review comments from r198290.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198400 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 05:47:03 +00:00
David Blaikie
e611ea7ee5 Revert "Debug Info: Type Units: Simplify type hashing using IR-provided unique names."
Reverting due to bot failure I won't have time to investigate until
tomorrow.

This reverts commit r198397.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198398 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 04:49:04 +00:00
David Blaikie
5df1dd410e Debug Info: Type Units: Simplify type hashing using IR-provided unique names.
What's good for LTO metadata size problems ought to be good for non-LTO
debug info size too, so let's rely on the same uniqueness in both cases.
If it's insufficient for non-LTO for whatever reason (since we now won't
be uniquing CU-local types or any C types - but these are likely to not
be the most significant contributors to type bloat) we should consider a
frontend solution that'll help both LTO and non-LTO alike, rather than
using DWARF-level DIE-hashing that only helps non-LTO debug info size.

It's also much simpler this way and benefits C++ even more since we can
deduplicate lexically separate definitions of the same C++ type since
they have the same mangled name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198397 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 04:20:26 +00:00
Eric Christopher
32abfefd9b 80-column.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198394 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 02:17:35 +00:00
Eric Christopher
38d3757459 Remove TextSectionSym as it is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198393 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 02:16:44 +00:00
David Blaikie
306c04c218 Revert "Reverting r193835 due to weirdness with Go..."
The cgo problem was that it wants dwarf2 which doesn't support direct
constant encoding of the location. So let's add support for dwarf2
encoding (using a location expression) of data member locations.

This reverts commit r198385.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198389 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 01:30:05 +00:00
David Blaikie
58b28147c5 Reverting r193835 due to weirdness with Go...
Apologies for the noise - we're seeing some Go failures with cgo
interacting with Clang's debug info due to this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198385 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-03 00:48:38 +00:00
Quentin Colombet
fb57392a8d [RegAlloc] Make tryInstructionSplit less aggressive.
The greedy register allocator tries to split a live-range around each
instruction where it is used or defined to relax the constraints on the entire
live-range (this is a last chance split before falling back to spill).
The goal is to have a big live-range that is unconstrained (i.e., that can use
the largest legal register class) and several small local live-range that carry
the constraints implied by each instruction.
E.g.,
Let csti be the constraints on operation i.

V1=
op1 V1(cst1)
op2 V1(cst2)

V1 live-range is constrained on the intersection of cst1 and cst2.

tryInstructionSplit relaxes those constraints by aggressively splitting each
def/use point:
V1=
V2 = V1
V3 = V2
op1 V3(cst1)
V4 = V2
op2 V4(cst2)

Because of how the coalescer infrastructure works, each new variable (V3, V4)
that is alive at the same time as V1 (or its copy, here V2) interfere with V1.
Thus, we end up with an uncoalescable copy for each split point.

To make tryInstructionSplit less aggressive, we check if the split point
actually relaxes the constraints on the whole live-range. If it does not, we do
not insert it.
Indeed, it will not help the global allocation problem:
- V1 will have the same constraints.
- V1 will have the same interference + possibly the newly added split variable
  VS.
- VS will produce an uncoalesceable copy if alive at the same time as V1.

<rdar://problem/15570057>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198369 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 22:47:22 +00:00
Hal Finkel
79d8722b11 [PPC] Fix comment to match function name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198362 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 22:09:39 +00:00
Eric Christopher
01a5024ed2 Remove comments on CU skeleton construction, they're probably
obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198361 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 22:04:47 +00:00
Hal Finkel
d151389bd1 [PPC] Fix the scheduling of CR logicals on the P7
CR logicals (crand, crxor, etc.) on the P7 need to be in the first slot of each
dispatch group. The old itinerary entry was just wrong (but has not mattered
because we don't generate these instructions).

This will matter when, in an upcoming commit, we start generating these
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198359 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 21:38:26 +00:00
Eric Christopher
628dca146e Elaborate on comment for skeleton CU construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198358 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 21:38:18 +00:00
Eric Christopher
99ba84390f Revert seemingly unnecessary section sym for the data section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198357 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 21:38:13 +00:00
Hal Finkel
73a5fdd886 [PPC] Use the correct immediate operands on 64-bit instructions
Several of the 64-bit fixed-point instructions with immediate operands were
using the 32-bit (i32) operand nodes instead of the corresponding 64-bit (i64)
operand definitions (u16imm instead of u16imm64, for example).

This error has had no effect so far, but would have caused type-checking
violations with an upcoming change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198356 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 21:26:59 +00:00
Hal Finkel
ac8ba0c0fd Disable compare sinking in CodeGenPrepare when multiple condition registers are available
As noted in the comment above CodeGenPrepare::OptimizeInst, which aggressively
sinks compares to reduce pressure on the condition register(s), for targets
such as PowerPC with multiple condition registers, this may not be the right
thing to do. This adds an HasMultipleConditionRegisters boolean to TLI, and
CodeGenPrepare::OptimizeInst is skipped when HasMultipleConditionRegisters is
true.

This functionality will be used by the PowerPC backend in an upcoming commit.
Especially when the PowerPC backend starts tracking individual condition
register bits as separate allocatable entities (which will happen in this
upcoming commit), this sinking from CodeGenPrepare::OptimizeInst is
significantly suboptimial.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198354 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 21:13:43 +00:00
Andrew Trick
5f8e79e6d2 indvars: cleanup the IV visitor. It does more than gather sext/zext info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198353 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 21:12:11 +00:00
Eric Christopher
e151788aae Fix up a couple of review comments:
Use an if statement instead of a pair of ternary operators checking
the same condition.
Use a cheap method call rather than returning the local symbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 21:03:28 +00:00
Eric Christopher
932aa0d9f6 Simplify conditional.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 21:03:22 +00:00
Matt Arsenault
ee60d39cdd Allow addrspacecast in global aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 20:55:01 +00:00
Hal Finkel
0a3368cde5 [TableGen] Correctly generate implicit anonymous prototype defs in multiclasses
Even within a multiclass, we had been generating concrete implicit anonymous
defs when parsing values (generally in value lists). This behavior was
incorrect, and led to errors when multiclass parameters were used in the
parameter list of the implicit anonymous def.

If we had some multiclass:

multiclass mc<string n> {

 ... : SomeClass<SomeOtherClass<n> >

The capture of the multiclass parameter 'n' would not work correctly, and
depending on how the implicit SomeOtherClass was used, either TableGen would
ignore something it shouldn't, or would crash.

To fix this problem, when inside a multiclass, we generate prototype anonymous
defs for implicit anonymous defs (just as we do for explicit anonymous defs).
Within the multiclass, the current record prototype is populated with a node
that is essentially: !cast<SomeOtherClass>(!strconcat(NAME, anon_value_name)).
This is then resolved to the correct concrete anonymous def, in the usual way,
when NAME is resolved during multiclass instantiation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 20:47:09 +00:00
Matt Arsenault
e13db1008b Delete unread globals through addrspacecast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198346 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 20:01:43 +00:00
Matt Arsenault
1085cc1262 Fix addrspacecast with metadata globals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198345 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 19:53:49 +00:00
Lang Hames
f79b35a038 Remove redundant fold call introduced in r195944. Thanks very much to Juergen
for pointing this out.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198341 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 19:38:41 +00:00
Hal Finkel
2370e55a53 [TableGen] Use the same anonymous name as the prefix on all multiclass defs
TableGen had been generating a different name for an anonymous multiclass's
NAME for every def in the multiclass. This had an unfortunate side effect: it
was impossible to reference one def within the multiclass from another (in the
parameter list, for example). By making sure we only generate an anonymous name
once per multiclass (which, as it turns out, requires only changing the name
parameter to reference type), we can now concatenate NAME within the multiclass
with a def name in order to generate a reference to that def.

This does not matter so much, in and of itself, but is necessary for a
follow-up commit that will fix variable capturing in implicit anonymous
multiclass defs (and that is important).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198340 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 19:35:33 +00:00
Andrew Trick
fcbe3d9501 indvars: insert truncate at loop boundary to avoid redundant IVs.
When widening an IV to remove s/zext, we generally try to eliminate
the original narrow IV. However, LCSSA phi nodes outside the loop were
still using the original IV. Clean this up more aggressively to avoid
redundancy in generated code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198338 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 19:29:38 +00:00
Craig Topper
d573aba8e1 Mark REX64_PREFIX as In64BitMode, remove hack from X86RecognizableInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198336 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 19:12:10 +00:00
David Blaikie
c265f06697 Make llvm::Regex non-copyable but movable.
Based on a patch by Maciej Piechotka.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198334 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 19:04:59 +00:00
Adrian Prantl
f828e82891 Revert "Debug info: Add enumerators to the __apple_names accelerator table."
This reverts r197927 until the discussion on llvm-commits comes to a
conclusion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198333 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 18:48:24 +00:00
Craig Topper
a7133ee752 Mark PUSHFS64/PUSHGS64/POPFS64/POPGS64 as In64BitMode and remove the hack from the disassembler table builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198327 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 18:20:48 +00:00
Craig Topper
e625100c6a Mark all x86 Int_ and _Int patterns as isCodeGenOnly so the disassembler table builder doesn't need to string match them to exclude them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 17:28:14 +00:00
Logan Chien
311730494e [arm] Add softvfp to supported FPU names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198313 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 15:50:02 +00:00
Rafael Espindola
a21a8a863d Make the ARM ABI selectable via SubtargetFeature.
This patch makes it possible to select the ABI with -mattr. It will be used to
forward clang's -target-abi option to llvm's CodeGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198304 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 13:40:08 +00:00
Arnold Schwaighofer
1bdb320dae BasicAA: Fix value equality and phi cycles
When there are cycles in the value graph we have to be careful interpreting
"Value*" identity as "value" equivalence. We interpret the value of a phi node
as the value of its operands.
When we check for value equivalence now we make sure that the "Value*" dominates
all cycles (phis).

%0 = phi [%noaliasval, %addr2]
%l = load %ptr
%addr1 = gep @a, 0, %l
%addr2 = gep @a, 0, (%l + 1)
store %ptr ...

Before this patch we would return NoAlias for (%0, %addr1) which is wrong
because the value of the load is from different iterations of the loop.

Tested on x86_64 -mavx at O3 and O3 -flto with no performance or compile time
regressions.

PR18068
radar://15653794

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198290 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-02 03:31:36 +00:00
Rafael Espindola
33cc3f81c1 Remove the 's' DataLayout specification
During the years there have been some attempts at figuring out how to
align byval arguments. A look at the commit log suggests that they
were

* Use the ABI alignment.
* When that was not sufficient for x86-64, I added the 's' specification to
  DataLayout.
* When that was not sufficient Evan added the virtual getByValTypeAlignment.
* When even that was not sufficient, we just got the FE to add the alignment
  to the byval.

This patch is just a simple cleanup that removes my first attempt at fixing the
problem. I also added an AArch64 implementation of getByValTypeAlignment to
make sure this patch is a nop. I also left the 's' parsing for backward
compatibility.

I will send a short email to llvmdev about the change for anyone maintaining
an out of tree target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 22:29:43 +00:00
Venkatraman Govindaraju
447c3480e5 [Sparc] Handle atomic loads/stores in sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198286 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 22:11:54 +00:00
Craig Topper
5cfd40ccd4 Remove modifierType/Base from X86 disassembler tables as they are no longer used. Removes ~11.5K from static tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198284 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 21:52:57 +00:00
Venkatraman Govindaraju
924ac6dc0c [SparcV9]: Custom lower UMULO/SMULO so that the arguments are send to __multi3() in correct order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 20:22:45 +00:00
Venkatraman Govindaraju
ca0ef6fe4f [SparcV9]: Use SRL instead of SLL to clear top 32-bits in ctpop:i32. SLL does not clear top 32 bit, only SRL does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198280 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 19:00:10 +00:00
NAKAMURA Takumi
550848ecb9 X86Disassembler.cpp: Prune stray @return on translateFPRegister(). [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198279 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 16:19:26 +00:00
Craig Topper
95a3ccdd80 Remove need for MODIFIER_OPCODE in the disassembler tables. AddRegFrms are really more like OrRegFrm so we don't need a difference since we can just mask bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198278 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 15:29:32 +00:00
Elena Demikhovsky
3062a311ac AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp
Printing rounding control.
Enncoding for EVEX_RC (rounding control).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198277 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 15:12:34 +00:00
Craig Topper
979b2cd2bc Second attempt at Removing special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198276 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 14:22:37 +00:00
Nick Lewycky
99cebadb5c Fold vector selects with undef elements in the condition. Fixes PR18319.
Patch by Ilia Filippov!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198267 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 19:30:47 +00:00
Craig Topper
5cbbd7e1a5 Revert r198238 and add FP disassembler tests. It didn't work and I didn't realized we had no FP disassembler test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 17:21:44 +00:00
Craig Topper
31b27056a6 Remove old comment referring to an argument that no longer exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198263 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 15:29:14 +00:00
Mark Seaborn
56b7f736a6 Fix misaligned indentation in "if" block in MipsMCCodeEmitter.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198262 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 13:05:15 +00:00
Craig Topper
c46a29cd9c Add missing MRM_XX forms to the old JIT emitter for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198258 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 03:26:24 +00:00
Craig Topper
64f275b59c Remove MRMInitReg form now that it's last use is gone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198257 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 03:19:03 +00:00
Alp Toker
e27bded358 Silence g++ 4.9 build issue
lib/Support/ThreadLocal.cpp:53:15: error: typedef 'SIZE_TOO_BIG' locally defined but not used [-Werror=unused-local-typedefs]
   typedef int SIZE_TOO_BIG[sizeof(pthread_key_t) <= sizeof(data) ? 1 : -1];

Done the C++11 way, switching on and using LLVM_STATIC_ASSERT() instead of LLVM_ATTRIBUTE_UNUSED.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198255 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 03:16:55 +00:00
Craig Topper
ec62c1ae99 Handle MOV32r0 in expandPostRAPseudo instead of MCInst lowering. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198254 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-31 03:05:38 +00:00
Craig Topper
ad5e4b9476 Merge case statements to remove redundant code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198241 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 19:47:49 +00:00
Craig Topper
e6d2dce7ab Remove special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198238 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 19:16:48 +00:00
Saleem Abdulrasool
4ba4132d62 ARM IAS: account for predicated pre-UAL mnemonics
Checking the trailing letter of the mnemonic is insufficient.  Be more thorough
in the scanning of the instruction to ensure that we correctly work with the
predicated mnemonics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 18:38:01 +00:00
Eric Christopher
98b356bc64 Refactor and reduce code duplication for non-split dwarf strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198233 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 18:32:31 +00:00
Eric Christopher
5be77762a3 Revert r198208 and reapply:
r198196: Use a pointer to keep track of the skeleton unit for each normal unit and construct it up front.
      r198199: Reapply r198196 with a fix to zero initialize the skeleton pointer.
      r198202: Fix aranges and split dwarf by ensuring that the symbol and relocation back to the compile unit from the aranges section is to the skeleton unit and not the one in the dwo.

with a fix to use integer 0 for DW_AT_low_pc since the relocation to the text section symbol was causing issues with COFF. Accordingly remove addLocalLabelAddress and machinery since we're not currently using it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 17:22:27 +00:00
NAKAMURA Takumi
b2299f0c80 Revert r198199 (and r198202). It broke 3 DebugInfo tests for targeting i686-cygming.
r198196: Use a pointer to keep track of the skeleton unit for each normal unit and construct it up front.
  r198199: Reapply r198196 with a fix to zero initialize the skeleton pointer.
  r198202: Fix aranges and split dwarf by ensuring that the symbol and relocation back to the compile unit from the aranges section is to the skeleton unit and not the one in the dwo.

They could be reproducible with explicit target.

  llvm/lib/MC/WinCOFFObjectWriter.cpp:224: bool {anonymous}::COFFSymbol::should_keep() const: Assertion `Section->Number != -1 && "Sections with relocations must be real!"' failed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198208 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 09:26:10 +00:00
Eric Christopher
782b70f4b3 Fix aranges and split dwarf by ensuring that the symbol and relocation
back to the compile unit from the aranges section is to the skeleton
unit and not the one in the dwo.

Do this by adding a method to grab a forwarded on local sym and local
section by querying the skeleton if one exists and using that. Add
a few tests to verify the relocations are back to the correct section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198202 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 05:25:49 +00:00
Bill Wendling
8e58e03822 Keep comment with 'Subtarget' ivar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198201 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 05:17:29 +00:00
Eric Christopher
bba2331876 Reapply r198196 with a fix to zero initialize the skeleton pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198199 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 03:40:32 +00:00
Eric Christopher
0661cbefb3 Temporarily revert "Use a pointer to keep track of the skeleton unit for
each normal unit" as it seems to be causing problems in the asan tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198197 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 03:12:31 +00:00
Eric Christopher
1dd211d88d Use a pointer to keep track of the skeleton unit for each normal unit
and construct it up front. Add address ranges at the end and a helper
routine so that we're not needlessly using an indirction in the case
of split dwarf.

Update testcases according to the new ordering of attributes on
the compile unit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198196 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 03:02:12 +00:00
Jiangning Liu
90128bee68 For AArch64 Neon, simplify scalar dup by lane0 for fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198194 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 02:44:35 +00:00
Hao Liu
afcdbf7400 [AArch64]Add code to spill/fill Q register tuples such as QPair/QTriple/QQuad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198193 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 02:38:12 +00:00
Hao Liu
43ffcc571c [AArch64]Can't select shift left 0 of type v1i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198192 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-30 02:12:46 +00:00