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12226 Commits

Author SHA1 Message Date
David Goodwin
5d598aaf3d Update Cortex-A8 instruction itineraries for integer instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79436 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 18:00:44 +00:00
Bob Wilson
de95c1b88b Add support for Neon VEXT (vector extract) shuffles. 
This is derived from a patch by Anton Korzh.  I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 17:03:43 +00:00
Chris Lattner
6c2f9e14fd eliminate AsmPrinter::SwitchToSection and just have clients 
talk to the MCStreamer directly instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-19 05:49:37 +00:00
Eric Christopher
b120ab4057 Implement sse4.2 string/text processing instructions: 
Add patterns and instruction encoding information.
Add custom lowering to deal with hardwired return register of
uncertain type (xmm0).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79377 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 22:50:32 +00:00
Jakob Stoklund Olesen
c0823fe7c6 Simplify RegScavenger::FindUnusedReg. 
- Drop the Candidates argument and fix all callers. Now that RegScavenger
  tracks available registers accurately, there is no need to restict the
  search.
- Make sure that no aliases of the found register are in use. This was a potential bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79369 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 21:14:54 +00:00
Richard Osborne
1123135dbf Add support for mergeable sections back into the XCore backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79368 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 21:14:31 +00:00
Richard Osborne
a9e8334877 Put data with relocations in the same sections as data without relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79351 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 17:58:17 +00:00
Chris Lattner
35c3531754 fix COFF targets (mingw/cygwin) to provide ehframe and LSDA sections 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79346 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 16:56:17 +00:00
Anton Korobeynikov
848c293962 Text sections should have 'exec' flag set. This seems to unbreak libstdc++ on linux. 
Patch by Dmitry Gorbachev!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79334 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 14:06:12 +00:00
Chris Lattner
090d73c6bd remove some pointless null switchtosections. The IntelAsmPrinter doesn't really work anyway. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79321 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 06:03:07 +00:00
Evan Cheng
51f39961c3 Fix revsh pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79318 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 05:43:23 +00:00
Chris Lattner
79e6408ad3 add support for some targetflags on GV operands. This allows us to 
send instructions like:

NEW: 	movl	"L___stack_chk_guard$non_lazy_ptr" - "L1$pb"(%esi), %eax
OLD: 	movl	L___stack_chk_guard$non_lazy_ptr-"L1$pb"(%esi), %eax

through the streamer.  Several fixmes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79317 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 05:33:27 +00:00
Dan Gohman
25103a2617 Fix function alignment at -Os on x86 to be 1, not 2. getFunctionAlignment 
returns a log2 value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79293 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 00:20:06 +00:00
Dale Johannesen
5cfd4ddece PowerPC inline asm was emitting two output operands 
for a single "m" constraint; this is wrong because the
opcode of a load or store would have to change in parallel.
This patch makes it always compute addresses into a register,
which is correct but not as efficient as possible.  7144566.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79292 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-18 00:18:39 +00:00
Benjamin Kramer
76d5ccf6af Clear the uniquing table when initializing TLOF to avoid a crash when the TLOF is reinitialized with a different MCContext. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79253 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-17 17:05:44 +00:00
Richard Osborne
2a5e23b44d Update getSectionForConstant() to to allow mergable sections to be nulled out 
if not supported by the ELF subtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79249 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-17 16:37:11 +00:00
Chris Lattner
8f4b1ec02b the MinPad argument to PadToColumn only really makes sense to be 1, 
just remove the argument and replace it with 1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79246 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-17 15:48:08 +00:00
Dan Gohman
face41a4de Avoid emitting XMM save code in soft-float or no-implicit-float mode 
or some other situation where no xmm registers need to be saved.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79207 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 21:24:25 +00:00
Dan Gohman
e646d043b0 Delete an unused field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79206 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 21:19:53 +00:00
Benjamin Kramer
9ae7d44d95 Fix use after free in Thumb2SizeReduction (PR4707). A MachineInstr was used after erasure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79189 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 11:56:42 +00:00
Bill Wendling
80c76436fe Styalistic and format changes. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79187 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 11:00:26 +00:00
Chris Lattner
9b60e04b65 add support for external symbols + X86::MOVPC32r. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79175 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 04:28:14 +00:00
Chris Lattner
30c74a2429 implement support for lowering references to global addresses. For example, we now 
can asmprint:

NEW: 	movl	"L___stack_chk_guard$non_lazy_ptr", %eax
OLD: 	movl	L___stack_chk_guard$non_lazy_ptr, %eax

where 'new' is coming out of the MCInst version of the printer.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79170 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 03:12:25 +00:00
Chris Lattner
f5af556c18 more formatting improvements, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79167 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 02:45:18 +00:00
Chris Lattner
d8638babf9 code formatting improvements, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79165 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-16 02:36:40 +00:00
Bill Wendling
3f5bb168bc An overhaul of the exception handling code. This is arguably more correct than 
what was there before. In "no FP mode", we weren't generating labels and unwind
table entries after each "push" instruction. While more than likely "okay", it's
not technically correct. The major thing was that the ordering of when to define
a new CFA register and at what offset wasn't correct. This would cause the
exception handling to fail in ways most miserable to users.

I also cleaned up some code a bit. There's one function which has a "return" at
the beginning, so it's never used. Should I just remove it? :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79139 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 21:27:32 +00:00
Bill Wendling
af56634058 Reapply r79127. It was fixed by d0k. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79136 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 21:21:19 +00:00
Bill Wendling
f865ea85bd Revert r79127. It was causing compilation errors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79135 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 21:14:01 +00:00
Evan Cheng
088880cb19 Change allowsUnalignedMemoryAccesses to take type argument since some targets 
support unaligned mem access only for certain types. (Should it be size
instead?)

ARM v7 supports unaligned access for i16 and i32, some v6 variants support it
as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79127 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 19:23:44 +00:00
Chris Lattner
b6ab29940d the .eh_frame sections we generate need to be writable (which 
is why they are datarel).  This should fix PR4724, and is fallout
from r78890.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79111 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 16:54:02 +00:00
Nicolas Geoffray
bad9defac8 Use the new API for creating an OpaqueType. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79107 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 15:41:32 +00:00
Chris Lattner
5f0b7488ef tidy up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79101 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 15:08:28 +00:00
Nicolas Geoffray
ab2a663af1 Update cpp generation with new LLVM API for primitive types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79098 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 14:47:42 +00:00
Sanjiv Gupta
bfa79b8be9 Revert a few changes that were done in 78603. 
PIC16DebugInfo currently rely on NameStr of composite type descriptors to uniquely
identify debug info for two aggregate type decls with same name.
This implementation will change when we have MDNodes based debug info implemenatation in place



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79097 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 14:36:48 +00:00
Richard Osborne
1c8c15f6d2 Move XCore AsmPrinter to XCore/AsmPrinter directory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79094 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 12:53:15 +00:00
Tilmann Scheller
6b16eff207 Add support for the PowerPC 64-bit SVR4 ABI. 
The Link Register is volatile when using the 32-bit SVR4 ABI.
Make it possible to use the 64-bit SVR4 ABI.
Add non-volatile registers for the 64-bit SVR4 ABI.
Make sure r2 is a reserved register when using the 64-bit SVR4 ABI.
Update PPCFrameInfo for the 64-bit SVR4 ABI.
Add FIXME for 64-bit Darwin PPC.
Insert NOP instruction after direct function calls.
Emit official procedure descriptors.
Create TOC entries for GlobalAddress references.
Spill 64-bit non-volatile registers to the correct slots.
Only custom lower VAARG when using the 32-bit SVR4 ABI.
Use simple VASTART lowering for the 64-bit SVR4 ABI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79091 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 11:54:46 +00:00
Evan Cheng
bc9b754091 Turn on if-conversion for thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 07:59:10 +00:00
Chris Lattner
ad27d77fc0 update for rename. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79082 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 06:14:07 +00:00
Chris Lattner
c077621e13 rename PIC16Section.h -> MCSectionPIC16.h for consistency with 
the class it defines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79081 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 06:13:40 +00:00
Chris Lattner
97d37b601d cmake likes its explicit list of files to build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79080 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 06:10:23 +00:00
Chris Lattner
760e24cd05 use XCore-specific section with xcore specific cp/dp flags to restore 
support for globals going into the appropriate sections with the flags.

This hopefully finishes unbreaking the previous behavior that I broke before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79079 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 06:09:35 +00:00
Chris Lattner
203b3e9e2a If ELF subtargets don't want to support 4/8/16-byte mergable sections, allow 
them to null out the default section pointers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79078 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 06:08:34 +00:00
Chris Lattner
7d996d907f add support for target-specific ELF section flags, add a new MCSectionXCore 
class which represents the XCore cp/dp section flags.  No functionality
change yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79077 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 05:56:11 +00:00
Dan Gohman
bd51c67739 Simplify a few more things, eliminating a few more dependencies on 
"the current basic block".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79069 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 02:07:36 +00:00
Evan Cheng
010b1b9e7b Do not use frame register to reference fixed stack objects if the function is frameless. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79067 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 02:05:35 +00:00
Dan Gohman
d6708eade0 On x86-64, for a varargs function, don't store the xmm registers to 
the register save area if %al is 0. This avoids touching xmm
regsiters when they aren't actually used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79061 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-15 01:38:56 +00:00
Evan Cheng
98a0104014 Leaf functions which do not save CSRs can be frameless even with -disable-fp-elim. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79039 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:48:13 +00:00
Anton Korobeynikov
72977a45a8 Allow targets to specify their choice of calling conventions per 
libcall. Take advantage of this in the ARM backend to rectify broken
choice of CC when hard float is in effect. PIC16 may want to see if
it could be of use in MakePIC16Libcall, which works unchanged.

Patch by Sandeep!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79033 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:10:52 +00:00
Evan Cheng
e6c835f424 Add Thumb2 lsr hooks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79032 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 20:09:37 +00:00
Oscar Fuentes
dac19a7951 CMake: Corrected variable check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79030 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 19:56:04 +00:00
Evan Cheng
59bc0604e5 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79026 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 19:11:20 +00:00
Anton Korobeynikov
9b9014f2a0 Cleanup the mess in msp430 target registration and hopefully unbreak the build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79024 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 19:06:50 +00:00
Evan Cheng
bba9f5f378 Indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 19:01:37 +00:00
Anton Korobeynikov
37f1cbd522 Hopefully unbreak cmake builds 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79015 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 18:46:49 +00:00
Evan Cheng
31b99dd760 Also shrink immediate branches; also more assembler workarounds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79014 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 18:31:44 +00:00
Anton Korobeynikov
960a7c9ad1 Give MSP430 a separate asmprinter lib 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79012 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 18:28:12 +00:00
Anton Korobeynikov
2247276c6f Properly handle indirect win64 args when they're passed in memory 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79009 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 18:19:10 +00:00
Owen Anderson
267a0ff045 Get the CPP backend into some semblance of working by updating for numerous LLVMContext changes, 
as well as the StringRef change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79006 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 17:41:33 +00:00
Bob Wilson
22cac0d9b3 Now that all the legal Neon shuffles (or at least the ones that have been 
implemented so far) are recognized during legalization, it is easy to fall
back to the default expansion for other shuffles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78995 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 05:16:33 +00:00
Bob Wilson
c1d287b4b7 Create a new ARM-specific DAG node, VDUP, to represent a splat from a 
scalar_to_vector.  Generate these VDUP nodes during legalization instead
of trying to recognize the pattern during selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78994 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 05:13:08 +00:00
Bob Wilson
0ce3710825 During legalization, change Neon vdup_lane operations from shuffles to 
target-specific VDUPLANE nodes.  This allows the subreg handling for the
quad-register version to be done easily with Pats in the .td file, instead
of with custom code in ARMISelDAGToDAG.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78993 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 05:08:32 +00:00
Daniel Dunbar
c22e0b2443 Update llvm-mc / MCAsmStreamer to print the instruction using the actual target 
specific printer (this only works on x86, for now).
 - This makes it possible to do some correctness checking of the parsing and
   matching, since we can compare the results of 'as' on the original input, to
   those of 'as' on the output from llvm-mc.

 - In theory, we could now have an easy ATT -> Intel syntax converter. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 03:48:55 +00:00
Daniel Dunbar
575327b77e Add virtual printMCInst method to AsmPrinter, as a quick way to expose the API 
to print one instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78985 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 03:43:57 +00:00
Daniel Dunbar
61466c50df Add X86 instruction printer support for printing MCValue operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78984 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 03:42:12 +00:00
Evan Cheng
a1efbbdbf3 Shrink ADR and LDR from constantpool late during constantpool island pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78970 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 00:32:16 +00:00
Evan Cheng
1135a232eb New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78968 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 00:16:47 +00:00
Dan Gohman
fa9ca0f788 Make these matching rules more strict so that they don't 
accidentally match unrelated things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78966 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-14 00:10:19 +00:00
Daniel Dunbar
7894578470 TargetRegistry: Change AsmPrinter constructor to be typed as returning an 
AsmPrinter instance (instead of just a FunctionPass)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78962 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 23:48:47 +00:00
Bruno Cardoso Lopes
fdf229eda9 Remove HasCrazyBSS and add a flag in TAI to indicate that '.section' 
must be emitted for PowerPC-Linux '.bss' section


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78958 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 23:30:21 +00:00
Owen Anderson
1d0be15f89 Push LLVMContexts through the IntegerType APIs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 21:58:54 +00:00
Daniel Dunbar
67d894ea64 TargetRegistry: Reorganize AsmPrinter construction so that clients pass in the 
TargetAsmInfo. This eliminates a dependency on TargetMachine.h from
TargetRegistry.h, which technically was a layering violation.
 - Clients probably can only sensibly pass in the same TargetAsmInfo as the
   TargetMachine has, but there are only limited clients of this API.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78928 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 19:38:51 +00:00
Daniel Dunbar
a8c58d572b Reapply pieces of 78914 reverted in 78916, this has been fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78921 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 17:08:54 +00:00
Daniel Dunbar
b42dad4761 Revert 78892 and 78895, these break generating working executables on 
x86_64-apple-darwin10.

--- Reverse-merging r78895 into '.':
U    test/CodeGen/PowerPC/2008-12-12-EH.ll
U    lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U    include/llvm/Target/DarwinTargetAsmInfo.h
U    lib/Target/X86/X86TargetAsmInfo.cpp
U    lib/Target/X86/X86TargetAsmInfo.h
U    lib/Target/ARM/ARMTargetAsmInfo.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/ARMTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U    lib/Target/PowerPC/PPCTargetAsmInfo.h
U    lib/Target/PowerPC/PPCTargetMachine.cpp
G    lib/Target/DarwinTargetAsmInfo.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 17:03:38 +00:00
Jim Grosbach
f35d21617e Add missing defs of R2 and D1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78918 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 16:59:44 +00:00
Daniel Dunbar
95cf7e7ed6 Remove obsoleted files (from AsmPrinter move) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78917 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 16:57:03 +00:00
Owen Anderson
e176fc9899 Revert r78914, as it was breaking the build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78916 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 16:54:39 +00:00
Sanjiv Gupta
2780609a47 Move PIC16 AsmPrinter to PIC16/AsmPrinter directory. 
Remove CooperTargetMachine, as currently only one is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78914 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 16:37:05 +00:00
David Goodwin
6d3d9c3fc3 Finalize itineraries for cortex-a8 integer multiply 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78908 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 15:51:13 +00:00
Jim Grosbach
8db5cce021 Remove unnecessary newline 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78905 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 15:12:16 +00:00
Jim Grosbach
1add659b0a Correct comment wording 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 15:11:43 +00:00
Chris Lattner
b71b909bc7 reintroduce support for Mips "small" section handling. This is 
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78900 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 06:28:06 +00:00
Evan Cheng
48bd7e3bbc tPOP_RET now has predicate operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 06:05:07 +00:00
Bob Wilson
bfcbb507c2 Add a fixme message about canonicalizing floating-point vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78897 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 06:01:30 +00:00
Bob Wilson
bab812b4b0 Revert r78852 for now. I want to do this differently, but I don't have time 
to fix it tonight.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78896 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:58:56 +00:00
Chris Lattner
bf04f72592 fix typo, add 10.6 version of test for my previous patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78895 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:43:33 +00:00
Chris Lattner
e3736f86ca Restore some "small section" support code, reverting my patch from r76936. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78894 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:41:27 +00:00
Evan Cheng
86e5f7b6f8 It's ok to spill a tGPR register as long as it's still allocated a low register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:40:51 +00:00
Chris Lattner
b2d3169d96 fix a minor fixme. When building with SL and later tools, the ".eh" symbols 
don't need to be exported from the .o files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78892 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:30:22 +00:00
Bruno Cardoso Lopes
b808588a3a Change MCSectionELF to represent a section semantically instead of 
syntactically as a string, very similiar to what Chris did with MachO.
The parsing support and validation is not introduced yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78890 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 05:07:35 +00:00
Bob Wilson
28865062c1 Add a comment to describe why vector shuffles are legalized to custom DAG nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78884 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 02:13:04 +00:00
Bob Wilson
d06791f6d0 Use cast<> instead of dyn_cast<> in places where the type is known. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78881 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 01:57:47 +00:00
Dan Gohman
cf20ac4fd1 Various AsmWriter output cleanups. Use WriteAsOperand instead of 
PrintUnmangledNameSafely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78878 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 01:36:44 +00:00
Chris Lattner
38cff389af sink uniquing of sections out of MCContext into the ELF and PECOFF TLOF implementations. 
MCContext no longer maintains a string -> section map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78874 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 00:37:15 +00:00
Dale Johannesen
f991ecf723 Symbols with LinkerPrivateLinkage are weak. 
This allows WebKit to build again.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78872 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 00:28:52 +00:00
Chris Lattner
873bc4ccfd make PIC16 unique its own sections instead of having mcontext do it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78871 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 00:26:52 +00:00
Chris Lattner
c9d31524ee add some comments: MCContext owns the MCSections, but it bump pointer allocates 
them, so it doesn't have to explicitly free them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78870 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 00:21:53 +00:00
Chris Lattner
e309cfa0d8 reject invalid code like: 
int x __attribute__((section("_foo, _bar"))) = 4;
int y __attribute__((section("_foo, _bar, 4byte_literals"))) = 1;




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78867 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-13 00:05:07 +00:00
Chris Lattner
5dc47ff039 implement support for uniquing MachO sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78866 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 23:55:02 +00:00
Chris Lattner
a462920ae0 some compiler don't get string from TLOF.h implicitly or something. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78864 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 23:53:59 +00:00
Chris Lattner
d3c4486f46 reduce #includage 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78860 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 23:34:27 +00:00
Bob Wilson
af385baa1d Recognize Neon VDUP shuffles during legalization instead of selection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78852 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 22:54:19 +00:00
Bob Wilson
d8e1757eac Recognize Neon VREV shuffles during legalization instead of selection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78850 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 22:31:50 +00:00
Dan Gohman
a9ad04191c This void is implicit in C++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78848 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 22:10:57 +00:00
Bob Wilson
114a266c94 Generate Neon VTBL and VTBX instructions from the corresponding intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78835 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 20:51:55 +00:00
Dan Gohman
a6340628c2 Use PadToColumn instead of tabs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78834 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 18:55:32 +00:00
Evan Cheng
3aaccffbce PredCC is meant to be 2 bits wide, like PredCC1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78829 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 18:35:50 +00:00
David Goodwin
1a8f36e3ce Enhance the InstrStage object to enable the specification of an Itinerary with overlapping stages. The default is to maintain the current behavior that the "next" stage immediately follows the previous one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78827 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 18:31:53 +00:00
Jim Grosbach
bff392384d Add catch block handling to SjLj exception handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78817 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 17:38:44 +00:00
Bob Wilson
9f7d60f460 Fix TableGen warnings. This partly reverts my previous change to this file, 
leaving the mayLoad and mayStore settings around only the load/store
instructions where those can't be inferred from the patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78815 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 17:04:56 +00:00
Chris Lattner
bfbc1de72f change CBE to just get TAI now, instead of TM to get TAI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 16:41:44 +00:00
Dan Gohman
9ca9daad21 Transform -X/C to X/-C, implementing a README.txt entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78812 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 16:37:02 +00:00
Oscar Fuentes
933849324e CMake: Added asm file to x86_64 MSVC build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78807 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 15:54:28 +00:00
Jim Grosbach
378756c0f2 register naming cleanup (s/ip/r12/) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78806 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 15:21:13 +00:00
Chris Lattner
a7ac47cee1 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple 
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 07:22:17 +00:00
Jakob Stoklund Olesen
d6eb635d1a Move immediate constant predicate templates from the Blackfin target to MathExtras.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78793 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 06:22:07 +00:00
Evan Cheng
007ea274f4 Shrink Thumb2 movcc instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78790 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 05:17:19 +00:00
Evan Cheng
e0d7fe8550 Remove another Darwin assembler workaround. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78779 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 02:07:19 +00:00
Evan Cheng
c972165b11 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78778 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 02:03:03 +00:00
Evan Cheng
ea253b99e9 Remove an Darwin assembler workaround. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78777 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 01:56:42 +00:00
Evan Cheng
05c269c645 Shrink ADDS, ADC, RSB, and SUBS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78776 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 01:49:45 +00:00
Bob Wilson
dbd3c0e06d Add missing chain operands for VLD* and VST* instructions. 
Set "mayLoad" and "mayStore" on the load/store instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78761 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 00:49:01 +00:00
Owen Anderson
23b9b19b1a Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78759 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-12 00:36:31 +00:00
Chris Lattner
c98077ba42 prune #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78749 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 23:07:27 +00:00
Chris Lattner
5940c02633 prune #includage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78748 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 23:06:16 +00:00
Chris Lattner
6b883e3297 fix CodeGen/PowerPC/2007-01-15-AsmDialect.ll, fallout from r78742 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78747 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 23:03:40 +00:00
Chris Lattner
ce914b8f94 change the -x86-asm-syntax=intel/att flag to be in X86TAI 
instead of X86 Subtarget.  This elimianates dependencies on
X86Subtarget from X86TAI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 23:01:09 +00:00
Evan Cheng
b89030ab65 Shrinkify Thumb2 r = add sp, imm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78745 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 23:00:31 +00:00
Chris Lattner
09652df5fc second half of commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78744 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:52:15 +00:00
Chris Lattner
5b67bb1922 pass "is64Bit" flag into PPC TAI ctors instead of a whole targetmachine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78743 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:51:34 +00:00
Chris Lattner
74da671c36 eliminate asmflavor from subtarget, PPCTAI is the only client 
and each callee knows that it returns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78742 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:49:34 +00:00
Chris Lattner
e2b060161c Change the asmprinter to print the comment character before the 
"inlineasmstart/end" strings so that the contents of the directive
are separate from the comment character.  This lets elf targets
get #APP/#NOAPP for free even if they don't use "#" as the comment
character.  This also allows hoisting the darwin stuff up to the
shared TAI class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78737 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:39:40 +00:00
David Goodwin
546952fd60 Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:38:43 +00:00
Chris Lattner
e28a2e8b70 factorize more darwin TAI stuff. Note that this gives 
darwin/arm support for .no_dead_strip


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:31:42 +00:00
Daniel Dunbar
0c420fc20a X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm, FS_MOV32rm as codegen only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78733 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:24:40 +00:00
Chris Lattner
e2811a7480 factorize darwin ProtectedDirective and SetDirective. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78732 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:22:44 +00:00
Daniel Dunbar
7417b761c2 Add 'isCodeGenOnly' bit to Instruction .td records. 
- Used to mark fake instructions which don't correspond to an actual machine
   instruction (or are duplicates of a real instruction). This is to be used for
   "special cases" in the .td files, which should be ignored by things like the
   assembler and disassembler. We still need a good solution to handle pervasive
   duplication, like with the Int_ instructions.

 - Set the bit on fake "mov 0" style instructions, which allows turning an
   assembler matcher warning into a hard error.

 - -2 FIXMEs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78731 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:17:52 +00:00
Chris Lattner
b6ba9c36db all darwin targets have .space and .zerofill, pull up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78730 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:17:31 +00:00
Chris Lattner
5f28ffe6c2 eliminate template from arm TAI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78729 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:14:59 +00:00
Chris Lattner
4b152796ce fix a bug I introduced in r78724 that caused failures in: 
CodeGen/X86/dll-linkage.ll & CodeGen/X86/mingw-alloca.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78728 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:12:58 +00:00
Chris Lattner
c89ecc5c2f move LCOMMDirective = "\t.lcomm\t" up to DarwinTAI, eliminate 
template in PPC backend for TAI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78727 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 22:06:07 +00:00
Owen Anderson
766b5efd99 Fix warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78725 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 21:59:30 +00:00
Chris Lattner
a1a1f02708 eliminate the X86TargetAsmInfo template. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78724 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 21:57:08 +00:00
Sean Callanan
b08ae6b0fb Added ADD instructions with rAX as one parameter to the Intel instruction 
tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78721 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 21:26:06 +00:00
Evan Cheng
4b322e58b7 Shrinkify Thumb2 load / store multiple instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78717 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 21:11:32 +00:00
Daniel Dunbar
59fc42debd llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will be 
used to strip hard coded comments out of .td assembly strings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78716 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 20:59:47 +00:00
Owen Anderson
825b72b057 Split EVT into MVT and EVT, the former representing _just_ a primitive type, while 
the latter is capable of representing either a primitive or an extended type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 20:47:22 +00:00
Chris Lattner
0a31d2f645 pass the TargetTriple down from each target ctor to the 
LLVMTargetMachine ctor.  It is currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 20:42:37 +00:00
Chris Lattner
92319e2454 now that JumpTableDirective can differentate picness itself, MIPS TAI 
no longer needs a targetmachine to initialize itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 20:32:51 +00:00
Chris Lattner
dfab291702 split "JumpTableDirective" (an existing hack) into a PIC and nonPIC 
version.  This allows TAI implementations to specify the directive to use
based on the mode being codegen'd for.

The real fix for this is to remove JumpTableDirective, but I don't feel
like diving into the jumptable snarl just now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78709 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 20:30:58 +00:00
Jim Grosbach
5aa1684e5d Add Thumb2 eh_sjlj_setjmp implementation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78701 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-11 19:42:21 +00:00