Commit Graph

818 Commits

Author SHA1 Message Date
Chris Lattner
cc8cd0cbf1 remove MachineOpCode typedef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45679 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 02:48:55 +00:00
Chris Lattner
ba6da5d5b7 remove some uses of MachineOpCode, move getSchedClass
into TargetInstrDescriptor from TargetInstrInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45678 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 02:46:03 +00:00
Chris Lattner
8ca5c67c6e Add predicates methods to TargetOperandInfo, and switch all clients
over to using them, instead of diddling Flags directly.  Change the
various flags from const variables to enums.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 02:39:19 +00:00
Chris Lattner
69244300b8 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45674 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 01:56:04 +00:00
Owen Anderson
43dbe05279 Move even more functionality from MRegisterInfo into TargetInstrInfo.
Some day I'll get it all moved over...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-07 01:35:02 +00:00
Chris Lattner
834f1ce031 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 23:38:27 +00:00
Chris Lattner
2e48a70b35 rename isStore -> mayStore to more accurately reflect what it captures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45656 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 08:36:04 +00:00
Chris Lattner
8ed9c1a6d9 describe isStore and simplify the implementation of hasUnmodelledSideEffects.
No functionality change. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45651 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-06 05:43:21 +00:00
Evan Cheng
2a3e08b596 X86 JIT PIC jumptable support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45616 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-05 02:26:58 +00:00
Owen Anderson
d94b6a16fe Move some more functionality from MRegisterInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45603 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-04 23:57:37 +00:00
Evan Cheng
be8c03fc66 X86 PIC JIT support fixes: encoding bugs, add lazy pointer stubs support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-04 10:46:51 +00:00
Owen Anderson
f6372aa1cc Move some more instruction creation methods from RegisterInfo into InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-01 21:11:32 +00:00
Chris Lattner
6410552250 Fix a problem where lib/Target/TargetInstrInfo.h would include and use
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45475 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-01 01:03:04 +00:00
Owen Anderson
d10fd9791c Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31 06:32:00 +00:00
Chris Lattner
84bc5427d6 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31 04:13:23 +00:00
Chris Lattner
7ed47a1335 Don't attribute in file headers anymore. See llvmdev for the
discussion of this change.  Boy are my fingers tired. ;-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45411 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 19:59:42 +00:00
Chris Lattner
b16f55f3c8 Tell TargetLoweringOpt whether it is running before
or after legalize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45321 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-22 20:56:36 +00:00
Bill Wendling
4be2f7fe57 s/hasSideEffects/hasUnmodelledSideEffects/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45133 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17 23:19:54 +00:00
Bill Wendling
882d291487 Add "hasSideEffects" method to MachineInstrInfo class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45126 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17 21:53:30 +00:00
Bill Wendling
7d9e97c2ac As per feedback, revised comments to (hopefully) make the different side effect
flags clearer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45120 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-17 21:02:07 +00:00
Dan Gohman
28174c5aa2 Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45032 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-14 15:13:08 +00:00
Bill Wendling
6b1da9c39f Add flags to indicate that there are "never" side effects or that there "may be"
side effects for machine instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45022 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-14 01:48:59 +00:00
Evan Cheng
6e141fd048 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 23:12:09 +00:00
Duncan Sands
67f1c493d1 Remove host endianness info from TargetData and
put it in a new header System/Host.h instead.
Instead of getting the endianness from configure,
calculate it directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44959 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 23:03:45 +00:00
Dan Gohman
8d2ed33f6f Remove a forward-declaration for a non-existant class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44955 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 22:25:09 +00:00
Bill Wendling
8245aab330 Bit masks conflicted. Needed to bump them by one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44903 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 01:51:58 +00:00
Chris Lattner
57d7d3f2d7 Move TargetData::hostIsLittleEndian out of line, which means we
don't have to #include config.h in it.  #including config.h breaks
other projects that have their own autoconf stuff and try to #include
the llvm headers.  One obscure example is llvm-gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44825 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-11 00:28:59 +00:00
Duncan Sands
1eff70451f Fix PR1836: in the interpreter, read and write apints
using the minimum possible number of bytes.  For little
endian targets run on little endian machines, apints are
stored in memory from LSB to MSB as before.  For big endian
targets on big endian machines they are stored from MSB to
LSB which wasn't always the case before (if the target and
host endianness doesn't match values are stored according
to the host's endianness).  Doing this requires knowing the
endianness of the host, which is determined when configuring -
thanks go to Anton for this.  Only having access to little
endian machines I was unable to properly test the big endian
part, which is also the most complicated...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44796 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-10 17:43:13 +00:00
Bill Wendling
041b3f8356 Reverting 44702. It wasn't correct to rename them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44727 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-08 23:58:46 +00:00
Bill Wendling
320c630c1b Renaming:
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44702 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-08 07:17:56 +00:00
Evan Cheng
d64b5c82b9 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44600 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-05 03:14:33 +00:00
Evan Cheng
aee4af68ae Remove redundant foldMemoryOperand variants and other code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-02 08:30:39 +00:00
Evan Cheng
e62f97c094 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44479 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-01 02:07:52 +00:00
Chris Lattner
27a6c7380f Several changes:
1) Change the interface to TargetLowering::ExpandOperationResult to 
   take and return entire NODES that need a result expanded, not just
   the value.  This allows us to handle things like READCYCLECOUNTER,
   which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
   ExpandOperationResult.  This makes the result simpler and fully 
   general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
   i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
   allowing them to work with LegalizeDAGTypes.

LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44300 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-24 07:07:01 +00:00
Dale Johannesen
526e39a02b File missing from previous patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44259 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-20 23:25:17 +00:00
Dan Gohman
50cdabcfd5 Remove meaningless qualifiers from return types, avoiding compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44240 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-19 20:46:23 +00:00
Dale Johannesen
b97aec663b Add parameter to getDwarfRegNum to permit targets
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 19:13:01 +00:00
Owen Anderson
20ab29068d Add a flag for indirect branch instructions.
Target maintainers: please check that the instructions for your target are correctly marked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 07:39:39 +00:00
Evan Cheng
cc41586b9d Much improved pic jumptable codegen:
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 01:32:10 +00:00
Hartmut Kaiser
a1dc96edd2 Fixed compilation errors on VC++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43836 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 19:33:31 +00:00
Rafael Espindola
f1ba1cad38 Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
Thanks for the suggestions Bill :-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 23:12:20 +00:00
Duncan Sands
ca0ed74485 Eliminate the remaining uses of getTypeSize. This
should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43688 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 00:04:43 +00:00
Duncan Sands
3cb3650a27 Change uses of getTypeSize to getABITypeSize, getTypeStoreSize
or getTypeSizeInBits as appropriate in ScalarReplAggregates.
The right change to make was not always obvious, so it would
be good to have an sroa guru review this.  While there I noticed
some bugs, and fixed them: (1) arrays of x86 long double have
holes due to alignment padding, but this wasn't being spotted
by HasStructPadding (renamed to HasPadding).  The same goes
for arrays of oddly sized ints.  Vectors also suffer from this,
in fact the problem for vectors is much worse because basic
vector assumptions seem to be broken by vectors of type with
alignment padding.   I didn't try to fix any of these vector
problems.  (2) The code for extracting smaller integers from
larger ones (in the "int union" case) was wrong on big-endian
machines for integers with size not a multiple of 8, like i1.
Probably this is impossible to hit via llvm-gcc, but I fixed
it anyway while there and added a testcase.  I also got rid of
some trailing whitespace and changed a function name which
had an obvious typo in it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43672 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-04 14:43:57 +00:00
Duncan Sands
514ab348fd Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment.  This gives a primitive type for
which getTypeSize differed from getABITypeSize.  For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).

This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition).  Instead there is:

(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type.  For a primitive type, this is the minimum number
of bits.  For an i36 this is 36 bits.  For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.

(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it).  For an
i36 this is 40 bits, for an x86 long double it is 80 bits.  This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes).  There doesn't seem to be anything
corresponding to this in gcc.

(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment.  For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS.  This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes).  This is
TYPE_SIZE in gcc.

Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize.  This means that the size of an array
is the length times the getABITypeSize.  It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize.  Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case.  So alloca's and mallocs should use getABITypeSize.  Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.

Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.

In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases).  I will get around to auditing these too at some point,
but I could do with some help.

Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize.  I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers.  If someone wants to pack these types more
tightly they can always use a packed struct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43620 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-01 20:53:16 +00:00
Evan Cheng
3c3ddb3a85 Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43465 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 19:58:20 +00:00
Evan Cheng
2bd122c4d9 Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free.
e.g.
Turns this loop:
LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
        movw    %dx, %si
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %edi
        movw    %si, (%edi)
        movl    L_Y$non_lazy_ptr, %edi
        movw    %dx, (%edi)
		addw    $4, %dx
		incw    %si
		incl    %ecx
		cmpl    %eax, %ecx
		jne     LBB1_2  # bb
	
into

LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %esi
        movw    %cx, (%esi)
        movl    L_Y$non_lazy_ptr, %esi
        movw    %dx, (%esi)
        addw    $4, %dx
		incl    %ecx
        cmpl    %eax, %ecx
        jne     LBB1_2  # bb


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43375 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-26 01:56:11 +00:00
Evan Cheng
e11fb34381 isSubRegOf() is a dup of isSubRegister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43249 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-23 06:51:50 +00:00
Evan Cheng
66f7163545 Local spiller optimization:
Turn a store folding instruction into a load folding instruction. e.g.
     xorl  %edi, %eax
     movl  %eax, -32(%ebp)
     movl  -36(%ebp), %eax
     orl   %eax, -32(%ebp)
=>
     xorl  %edi, %eax
     orl   -36(%ebp), %eax
     mov   %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 21:23:22 +00:00
Chris Lattner
1c4d492b94 rename ExpandOperation to ExpandOperationResult, as suggested
by Duncan


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43177 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 15:28:47 +00:00
Chris Lattner
f58dac3169 add a new target hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43165 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 03:31:45 +00:00
Evan Cheng
f0a0cddbcd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.


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2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
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2007-10-18 21:29:24 +00:00
Gordon Henriksen
9bb4ea03be Missing 'public' keyword.
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2007-10-18 11:31:21 +00:00
Gordon Henriksen
4b2b9402c5 Switching TargetMachineRegistry to use the new generic Registry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-17 21:28:48 +00:00
Duncan Sands
f411b83c8c Return Expand from getOperationAction for all extended
types.  This is needed for SIGN_EXTEND_INREG at least.
It is not clear if this is correct for other operations.
On the other hand, for the various load/store actions
it seems to correct to return the type action, as is
currently done.
Also, it seems that SelectionDAG::getValueType can be
called for extended value types; introduce a map for
holding these, since we don't really want to extend
the vector to be 2^32 pointers long!
Generalize DAGTypeLegalizer::PromoteResult_TRUNCATE
and DAGTypeLegalizer::PromoteResult_INT_EXTEND to handle
the various funky possibilities that apints introduce,
for example that you can promote to a type that needs
to be expanded.


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2007-10-17 13:49:58 +00:00
Duncan Sands
af47b11b95 Initial infrastructure for arbitrary precision integer
codegen support.  This should have no effect on codegen
for other types.  Debatable bits: (1) the use (abuse?)
of a set in SDNode::getValueTypeList; (2) the length of
getTypeToTransformTo, which maybe should be refactored
with a non-inline part for extended value types.


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2007-10-16 09:56:48 +00:00
Chris Lattner
1622768794 Fix 80 col violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42976 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 05:30:27 +00:00
Evan Cheng
106e8020bd Change unfoldMemoryOperand(). User is now responsible for passing in the
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42946 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 02:35:06 +00:00
Arnold Schwaighofer
48abc5cf6b Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.



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2007-10-12 21:30:57 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


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2007-10-11 19:40:01 +00:00
Bill Wendling
1c08eba3fb Fix 80-column violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42823 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-10 05:45:59 +00:00
Dan Gohman
cdf2b3b2f8 Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42747 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 15:08:41 +00:00
Evan Cheng
66f0f64082 - Added a few target hooks to generate load / store instructions from / to any
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:32:41 +00:00
Dale Johannesen
3b5b4cd1a5 Add getABITypeSize, getABITypeSizeInBits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42488 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-01 16:03:14 +00:00
Evan Cheng
e5f6204cd5 Enabling new condition code modeling scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-29 00:00:36 +00:00
Dan Gohman
82482944ed TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.


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2007-09-27 23:12:31 +00:00
Evan Cheng
ff11026575 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from).
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.


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2007-09-26 21:31:07 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:25:56 +00:00
Evan Cheng
a3602685b3 New temporary option -new-cc-modeling-scheme to test the new cc modeling scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42283 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:50:04 +00:00
Dan Gohman
72252732c8 Merge hasDotLoc and hasDotFile into hasDotLocAndDotFile since .loc and .file
aren't really usable without each other. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42274 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 21:09:53 +00:00
Dale Johannesen
f1fc3a8fa6 Fix PR 1681. When X86 target uses +sse -sse2,
keep f32 in SSE registers and f64 in x87.  This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.



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2007-09-23 14:52:20 +00:00
Evan Cheng
a3ca3149f2 Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value
between two registers in the specific class.


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2007-09-19 01:35:01 +00:00
Evan Cheng
ffddf97e5d Added getNumDefs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41901 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-13 00:16:29 +00:00
Bill Wendling
4e319a30ba Add accessor method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41854 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 17:24:38 +00:00
Bill Wendling
ef4a661725 Add a bool to indicate if we should set the "indirect encoding" bit in the Dwarf
information for EH.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41852 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 17:20:55 +00:00
Bill Wendling
d60da495cd The personality function on Darwin needs a global stub. We then refer to
that global stub instead of doing the ".set" thingy we were doing before.



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2007-09-11 08:27:17 +00:00
Rafael Espindola
588af2fb99 Add support for having different alignment for objects on call frames.
The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41768 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 14:52:14 +00:00
Owen Anderson
718cb665ca Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 04:06:50 +00:00
Evan Cheng
35b35c5c32 Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 05:52:20 +00:00
Dale Johannesen
f04afdbb48 Change LegalFPImmediates to use APFloat.
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.


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2007-08-30 00:23:21 +00:00
Dan Gohman
81975f6dfd Add explicit keywords and remove spurious trailing semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-27 14:50:10 +00:00
Chris Lattner
48884cd80b rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
changing the interface to allow for future changes.



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2007-08-25 00:47:38 +00:00
Rafael Espindola
21485be444 Partial implementation of calling functions with byval arguments:
*) The needed information is propagated to the DAG
 *) The X86-64 backend detects it and aborts


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-20 15:18:24 +00:00
Reid Spencer
276222a5ae Change casts from old style to new style. This helps document the details
better, gives the compiler a chance to validate the cast and reduces warnings
if the user turns on -Wold-style-cast option.


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2007-08-12 08:12:35 +00:00
Christopher Lamb
8b165731bc Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in LowerSubregs and add more debugging output there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41005 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-10 21:11:55 +00:00
Dale Johannesen
ab081c7195 Update per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40965 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 17:27:48 +00:00
Dale Johannesen
5411a3937f long double 9 of N. This finishes up the X86-32 bits
(constants are still not handled).  Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).


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2007-08-09 01:04:01 +00:00
Reid Spencer
181b6c9cb5 Fix minor doxygen nits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40854 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-05 20:06:04 +00:00
Evan Cheng
b5910820ce Added TargetInstrDescriptor::numDefs - num of results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40709 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 00:20:17 +00:00
Dan Gohman
c2bbfc18e9 More explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40673 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01 15:32:29 +00:00
Dan Gohman
06dd2a68e1 Fix the comments for the 'fast' parameter in addPassesToEmitFile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40592 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-30 15:04:59 +00:00
Dan Gohman
fb71d38247 Fix the comment for getClosestTargetForJIT to reflect the fact that
it does not have a Module parameter.


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2007-07-30 14:58:59 +00:00
Dan Gohman
f452207d20 More explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40589 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-30 14:51:59 +00:00
Duncan Sands
36397f5034 Support for trampolines, except for X86 codegen which is
still under discussion.


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2007-07-27 12:58:54 +00:00
Christopher Lamb
1367fd09cb Have register info provide the inverse mapping of register->superregisters. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40519 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 08:01:58 +00:00
Christopher Lamb
08d52071ba Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40518 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 07:48:21 +00:00
Evan Cheng
8bd6035750 Added -print-emitted-asm to print out JIT generated asm to cerr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-20 21:56:13 +00:00
Dan Gohman
07a96765da Fix comments about vectors to use the current wording.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39921 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-16 14:29:03 +00:00
Anton Korobeynikov
2365f51ed0 Long live the exception handling!
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.


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2007-07-14 14:06:15 +00:00
Evan Cheng
ed80ef6089 Add OptionalDefOperand. Remove clobbersPred. Also add DefinesPredicate to be used by if-converter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38499 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 18:06:29 +00:00