Commit Graph

89476 Commits

Author SHA1 Message Date
Pete Cooper
b0fde6dc02 Check type for legality before forming a select from loads.
Sorry for the lack of a test case.  I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later.

I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 03:14:50 +00:00
Arnold Schwaighofer
6851623c54 ARM cost model: Add vector reverse shuffle costs
A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad
word).

radar://13171406

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 02:40:39 +00:00
Arnold Schwaighofer
4fc6484ee2 Cost model: Add check for reverse shuffles to CostModel analysis
Check for reverse shuffles in the CostModel analysis pass and query
TargetTransform info accordingly. This allows us we can write test cases for
reverse shuffles.

radar://13171406

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 02:40:37 +00:00
Arnold Schwaighofer
d9316dacf5 ARM NEON: Handle v16i8 and v8i16 reverse shuffles
Lower reverse shuffles to a vrev64 and a vext instruction instead of the default
legalization of storing and loading to the stack. This is important because we
generate reverse shuffles in the loop vectorizer when we reverse store to an
array.

  uint8_t Arr[N];
  for (i = 0; i < N; ++i)
    Arr[N - i - 1] = ...

radar://13171760

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 01:58:32 +00:00
Chad Rosier
53e5bb70db Update error message due to previous commit, r174926.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 01:12:24 +00:00
Chad Rosier
d556fd1290 [ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.
Part of rdar://12470373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 01:00:01 +00:00
David Blaikie
2ce067a9fb DIBuilder: make the return type of createBasicType more specific
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 00:40:41 +00:00
Kay Tiong Khoo
6c3daabc3e Added 0x0D to 2-byte opcode extension table for prefetch* variants
Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 00:19:12 +00:00
Hal Finkel
c951003faf BBVectorize: Don't over-search when building the dependency map
When building the pairable-instruction dependency map, don't search
past the last pairable instruction. For large blocks that have been
divided into multiple instruction groups, searching past the last
instruction in each group is very wasteful. This gives a 32% speedup
on the csa.ll test case from PR15222 (when using 50 instructions
in each group).

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174915 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 23:02:17 +00:00
Hal Finkel
8f3359a4b3 BBVectorize: Omit unnecessary entries in PairableInstUsers
This map is queried only for instructions in pairs of pairable
instructions; so make sure that only pairs of pairable
instructions are added to the map. This gives a 3.5% speedup
on the csa.ll test case from PR15222.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 23:02:09 +00:00
Michael J. Spencer
86f18eb0b3 [Support][Compiler] Add LLVM_HAS_VARIADIC_TEMPLATES.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174913 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 22:51:07 +00:00
Akira Hatanaka
b4b4fa80ba [mips] Expand pseudo instructions before they are emitted in
MipsCodeEmitter.cpp.

JALR and NOP are expanded by function emitPseudoExpansionLowering, which is not
called when the old JIT is used.

This fixes the following tests which have been failing on
llvm-mips-linux builder:

LLVM :: ExecutionEngine__2003-01-04-LoopTest.ll
LLVM :: ExecutionEngine__2003-05-06-LivenessClobber.ll
LLVM :: ExecutionEngine__2003-06-04-bzip2-bug.ll
LLVM :: ExecutionEngine__2005-12-02-TailCallBug.ll
LLVM :: ExecutionEngine__2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll
LLVM :: ExecutionEngine__hello2.ll
LLVM :: ExecutionEngine__stubs.ll
LLVM :: ExecutionEngine__test-branch.ll
LLVM :: ExecutionEngine__test-call.ll
LLVM :: ExecutionEngine__test-common-symbols.ll
LLVM :: ExecutionEngine__test-loadstore.ll
LLVM :: ExecutionEngine__test-loop.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 22:35:40 +00:00
Bill Wendling
e9229a6a96 Rename AttributeSets to AttributeGroups so that it's more meaningful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 22:33:26 +00:00
Bill Wendling
04ef4be048 Use a std::map so that we record the group ID.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 22:32:29 +00:00
Bill Wendling
e3db2048ea Rename to something more sensible. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174909 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 22:31:34 +00:00
Akira Hatanaka
1b235a26f5 [mips] Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 22:03:52 +00:00
Michael Ilseman
9c213cc3c3 Optimization: bitcast (<1 x ...> insertelement ..., X, ...) to ... ==> bitcast X to ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 21:41:44 +00:00
Krzysztof Parzyszek
71490fa946 Extend Hexagon hardware loop generation to handle various additional cases:
- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174904 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 21:37:55 +00:00
Michael Ilseman
651fb490ae Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174903 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 21:36:49 +00:00
Krzysztof Parzyszek
ce55d91ec9 Implement HexagonInstrInfo::analyzeCompare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174901 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 20:04:29 +00:00
Kay Tiong Khoo
86494d7991 *fixed disassembly of some i386 system insts with intel syntax
*added file for test cases for i386 intel syntax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174900 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 19:46:36 +00:00
Justin Holewinski
ff5adad9f3 [NVPTX] Remove NoCapture from address space conversion intrinsics. NoCapture is not valid in this case, and was causing incorrect optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174896 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 18:56:35 +00:00
Hal Finkel
b1a8258933 BBVectorize: Eliminate one more restricted linear search
This eliminates one more linear search over a range of
std::multimap entries. This gives a 22% speedup on the
csa.ll test case from PR15222.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174893 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 17:19:34 +00:00
Tim Northover
511d285700 AArch64: generate dwarfdump test rather than include .o in subversion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174891 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 16:28:12 +00:00
Michel Danzer
311ea66db1 R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.
The modifiers don't seem to have any effect with V_MOV_B32, supposedly it's
meant to just move bits untouched.

Fixes 46 piglit tests with radeonsi, though unfortunately 11 of those had
just regressed because they started using the clamp modifier.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174890 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 15:58:21 +00:00
Kostya Serebryany
117de489a0 [asan] added a flag -mllvm asan-short-64bit-mapping-offset=1 (0 by default)
This flag makes asan use a small (<2G) offset for 64-bit asan shadow mapping.
On x86_64 this saves us a register, thus achieving ~2/3 of the
zero-base-offset's benefits in both performance and code size.

Thanks Jakub Jelinek for the idea.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 14:36:01 +00:00
Tim Northover
716d26b2ce AArch64: fix build on some MSVC versions
This does two things:

It removes a call to abs() which may have "long long" parameter on Windows,
which is not necessarily available in C++03.

It also corrects the signedness of Amount, which was relying on
implementation-defined conversions previously.

Code was already tested (albeit in an implemnetation defined way) so no extra
tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174885 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 14:25:52 +00:00
Bill Schmidt
fd980723b6 Restore the resurrected doc link previously deleted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174884 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 14:14:32 +00:00
Bill Schmidt
db0412207f Remove a dead PowerPC doc link
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174881 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 13:16:30 +00:00
Tim Northover
77b1c9cf57 AArch64: Simplify logic in deciding whether bfi is valid
Previous code had a confusing comment which was mostly an implementation
detail. This condition corresponds to "lsb up to register width" and "width not
ridiculous".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174877 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 12:32:18 +00:00
Tim Northover
b05dc55460 AArch64: Add basic relocation processing for llvm-dwarfdump.
This allows llvm-dwarfdump to handle the relocations needed, at least
for LLVM-produced code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174874 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 11:16:02 +00:00
Tim Northover
c37aa995e3 AArch64: Undo change to how test was run
This broke on Windows, presumably due to interleaving of output streams.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174873 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 10:51:41 +00:00
Tim Northover
b516186386 Make use of DiagnosticType to provide better AArch64 diagnostics.
This gives a DiagnosticType to all AsmOperands in sight. This replaces all
"invalid operand" diagnostics with something more specific. The messages given
should still be sufficiently vague that they're not usually actively misleading
when LLVM guesses your instruction incorrectly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174871 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 09:29:37 +00:00
Cameron Zwarich
8597c14e9b Add support for updating LiveIntervals to MachineBasicBlock::SplitCriticalEdge().
This is currently a bit hairier than it needs to be, since depending on where the
split block resides the end ListEntry of the split block may be the end ListEntry
of the original block or a new entry. Some changes to the SlotIndexes updating
should make it possible to eliminate the two cases here.

This also isn't as optimized as it could be. In the future Liveinterval should
probably get a flag that indicates whether the LiveInterval is within a single
basic block. We could ignore all such intervals when splitting an edge.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 09:24:47 +00:00
Cameron Zwarich
cbe3f5e162 Update SlotIndexes after updateTerminator() possibly removes instructions. I am
really trying to avoid piping SlotIndexes through to RemoveBranch() and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174869 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 09:24:45 +00:00
Cameron Zwarich
4e08e35e96 Fix some problems with the updating of SlotIndexes after adding a new MBB. In
particular, holes were being left between two blocks after splitting an edge.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174868 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 09:24:42 +00:00
Bill Wendling
b29ce26ea6 Add support for printing out the attribute groups.
This emits the attribute groups that are used by the functions. (It currently
doesn't print out return type or parameter attributes within attribute groups.)

Note: The functions still retrieve their attributes from the "old" bitcode
format (using the deprecated 'Raw()' method). This means that string attributes
within an attribute group will not show up during a disassembly. This will be
addressed in a future commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174867 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 08:43:33 +00:00
Bill Wendling
595ef3e314 FileCheck-ize the tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174865 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 08:34:57 +00:00
Kostya Serebryany
ab39afa9d9 [tsan/msan] adding thread_safety and uninitialized_checks attributes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174864 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 08:13:54 +00:00
Bob Wilson
f64c889cc9 Revert "Rename LLVMContext diagnostic handler types and functions."
This reverts my commit 171047. Now that I've removed my misguided attempt to
support backend warnings, these diagnostics are only about inline assembly.
It would take quite a bit more work to generalize them properly, so I'm
just reverting this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174860 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 05:37:07 +00:00
Hal Finkel
00f63b1b84 BBVectorize: Remove the linear searches from pair connection searching
This removes the last of the linear searches over ranges of std::multimap
iterators, giving a 7% speedup on the doduc.bc input from PR15222.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 05:29:51 +00:00
Hal Finkel
2f0e63cc16 BBVectorize: Avoid linear searches within the load-move set
This is another cleanup aimed at eliminating linear searches
in ranges of std::multimap.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174858 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 05:29:49 +00:00
Hal Finkel
3fc1e4aa15 BBVectorize: isa/cast cleanup in getInstructionTypes
Profiling suggests that getInstructionTypes is performance-sensitive,
this cleans up some double-casting in that function in favor of
using dyn_cast.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174857 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 05:29:48 +00:00
Hal Finkel
da20ea696d BBVectorize: Make the bookkeeping to support full cycle checking less expensive
By itself, this does not have much of an effect, but only because in the default
configuration the full cycle checks are used only for small problem sizes.
This is part of a general cleanup of uses of iteration over std::multimap
ranges only for the purpose of checking membership.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174856 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 05:29:41 +00:00
Evan Cheng
092e5e7566 Currently, codegen may spent some time in SDISel passes even if an entire
function is successfully handled by fast-isel. That's because function
arguments are *always* handled by SDISel. Introduce FastLowerArguments to
allow each target to provide hook to handle formal argument lowering.

As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle
functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It
completely eliminates the need for SDISel for trivial functions.

rdar://13163905


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174855 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 01:27:15 +00:00
Evan Cheng
5f352cc6e4 Remove unnecessary code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174854 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 01:18:26 +00:00
David Blaikie
f12b379448 Fix unnecessary removal of const through cast machinery
I have some uncommitted changes to the cast code that catch this sort of thing
at compile-time but I still need to do some other cleanup before I can enable
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11 01:16:51 +00:00
Joel Jones
612779eb83 Spelling correction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174852 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-10 23:56:30 +00:00
Cameron Zwarich
f5844a7515 Fix the unused but nearly correct method SlotIndexes::insertMBBInMaps() and add
support for updating SlotIndexes to MachineBasicBlock::SplitCriticalEdge(). This
calls renumberIndexes() every time; it should be improved to only renumber
locally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174851 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-10 23:29:54 +00:00
Cameron Zwarich
36f54480f8 Abstract the liveness checking in PHIElimination::SplitPHIEdges() to support
both LiveVariables and LiveIntervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174850 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-10 23:29:49 +00:00