Commit Graph

2433 Commits

Author SHA1 Message Date
Bob Wilson
8f3434647d Handle 'a' modifier in ARM inline assembly.
Patch by Richard Pennington.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-06 21:46:51 +00:00
Nick Lewycky
cfdd807cfa Try SSE2?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-04 10:24:24 +00:00
Nick Lewycky
2cd1b777d7 Fix test on non-x86 platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-04 07:20:43 +00:00
Dan Gohman
f50c7981ae Fix a TargetLowering optimization so that it doesn't duplicate
loads when an input node has multiple uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 20:11:30 +00:00
Mon P Wang
1e95580925 Added a x86 dag combine to increase the chances to use a
movq for v2i64 on x86-32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68368 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 02:43:30 +00:00
Bob Wilson
bf6396bed0 Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
assembly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-01 17:58:54 +00:00
Evan Cheng
6fb2168aae Fully general expansion of integer shift of any size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68134 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 19:39:24 +00:00
Dan Gohman
431efa19aa Add an explicit -asm-verbose to these tests, to make it
possible to run the tests with -asm-verbose defaulting
to false.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 18:20:47 +00:00
Owen Anderson
696a1307ba Remove the "fast" cases for spill and restore point determination, as these were subtlely wrong in obscure cases. Patch the testcase
to account for this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:27:09 +00:00
Dan Gohman
07c26ee87e Fix live-out reg logic to not insert over-aggressive AssertZExt
instructions. This fixes lua.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 01:38:29 +00:00
Evan Cheng
e6f350d755 Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed.
e.g.
%reg1024<def> = MOV r1
%reg1025<def> = ADD %reg1024, %reg1026
r0            = MOV %reg1025

If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 21:34:07 +00:00
Anton Korobeynikov
30ffe8150f Tweak test for recent relro stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 15:28:40 +00:00
Evan Cheng
878071e6d0 Forgot this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 06:17:34 +00:00
Anton Korobeynikov
807117dc56 Testcase for recent ro/relocs stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-29 17:14:57 +00:00
Duncan Sands
004e27cc1b Fix PR3899: add support for extracting floats from vectors
when using -soft-float.
Based on a patch by Jakob Stoklund Olesen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-29 13:51:06 +00:00
Arnold Schwaighofer
11ff97801b Make check in CheckTailCallReturnConstraints for ignorable instructions between
a CALL and a RET node more generic. Add a test for tail calls with a void
return.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67943 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 12:36:29 +00:00
Arnold Schwaighofer
e75fd69f15 Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67934 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 08:33:27 +00:00
Evan Cheng
0b0cd9113a Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq    $3, %rdi
leaq    (%rdi,%rdi,4), %rax

This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq    (%rdi,%rdi,2), %rax
leaq    (%rsi,%rax,8), %rax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 05:57:29 +00:00
Dan Gohman
1a36744b07 Fix this test so that it doesn't spuriously fail due to some
unrelated debugging output happening to contain the string "store".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67849 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-27 16:17:22 +00:00
Evan Cheng
0802851816 Add -march=x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67783 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 23:03:32 +00:00
Bill Wendling
dccbfea503 Add -f to RUN line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 06:17:54 +00:00
Chris Lattner
a95dbf23f8 no need for eh info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 05:51:18 +00:00
Bill Wendling
24c98cebc8 Add testcase for r67728.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 01:52:47 +00:00
Evan Cheng
e597282fe5 Add a test case for PR3779: when to promote the function return value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 20:30:19 +00:00
Evan Cheng
3927f438b5 Revert 67132. This is breaking some objective-c apps.
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 20:20:11 +00:00
Evan Cheng
42bf74be14 CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 01:47:28 +00:00
Dan Gohman
e1c5267aec Add a testcase for the scheduling heuristic introduced in r67586.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 16:38:27 +00:00
Evan Cheng
f1c0ae9de5 Do not emit comments unless -asm-verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67580 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 00:17:40 +00:00
Evan Cheng
5d088fee7c Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases.
e.g. allocating for GR32, bh is not used, updating bl spill weight.                                                                                                        
     bl should get the same spill weight otherwise it will be choosen                                                                                              
     as a spill candidate since spilling bh doesn't make ebx available.
This fix PR2866.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 22:57:19 +00:00
Dale Johannesen
1b25cb2416 Fix internal representation of fp80 to be the
same as a normal i80 {low64, high16} rather
than its own {high64, low16}.  A depressing number
of places know about this; I think I got them all.
Bitcode readers and writers convert back to the old
form to avoid breaking compatibility.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 21:16:53 +00:00
Evan Cheng
3e744c8bc4 Update test for pr3864.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67545 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 18:27:36 +00:00
Evan Cheng
2824a65550 Fix PR3391 and PR3864. Reg allocator infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67544 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 18:24:37 +00:00
Evan Cheng
fb11288109 Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67512 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 08:01:15 +00:00
Evan Cheng
7d6d4b360f Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
%RAX<def> = ...
%RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
The first def is defining RAX, not EAX so the top bits were not zero-extended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67511 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 07:19:58 +00:00
Rafael Espindola
6b2c7ae2c9 Add -relocation-model=pic so that the test works
both in Linux and Darwin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67191 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-18 09:38:28 +00:00
Mon P Wang
aa9df0b0c3 Added missing support for widening when splitting an unary op (PR3683)
and expanding a bit convert (PR3711).  In both cases, we extract the
valid part of the widen vector and then do the conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-18 06:24:04 +00:00
Evan Cheng
7367319991 Add another test case for r64440.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67156 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-18 02:43:01 +00:00
Chris Lattner
ff81ebf758 Disable the "call to immediate" optimization on x86-64. It is
not safe in general because the immediate could be an arbitrary
value that does not fit in a 32-bit pcrel displacement.  
Conservatively fall back to loading the value into a register
and calling through it.

We still do the optzn on X86-32.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-18 00:43:52 +00:00
Bill Wendling
64ec298e68 A more proper -mtriple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67138 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-18 00:19:44 +00:00
Bill Wendling
652c3c36c5 Temporary fix. I think Rafael wanted this to be Linux-only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67137 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-18 00:16:36 +00:00
Chris Lattner
b7e64ac3ac LSR shouldn't ever try to hack on integer IV's larger than 64-bits. Right now
it is not APInt clean, but even when it is it needs to be evaluated carefully
to determine whether it is actually profitable.

This fixes a crash on PR3806


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67134 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 23:58:30 +00:00
Rafael Espindola
152932b71c Don't force promotion of return arguments on the callee.
Some architectures (like x86) don't require it.
This fixes bug 3779.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67132 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 23:43:59 +00:00
Chris Lattner
3985728bde this is apparently passing now. Evan/Dan, please check
to see if this is producing the expected code or not, I'm
not sure what the test was intended to check.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 20:23:43 +00:00
Chris Lattner
0b18e59336 Fix codegen to compute the size of an allocation by multiplying the
size by the array amount as an i32 value instead of promoting from
i32 to i64 then doing the multiply.  Not doing this broke wrap-around
assumptions that the optimizers (validly) made.  The ultimate real
fix for this is to introduce i64 version of alloca and remove mallocinst.

This fixes PR3829


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 19:36:00 +00:00
Evan Cheng
58e2287d00 Add newline at end of file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 17:08:25 +00:00
Scott Michel
a82d3f7c57 CellSPU:
Revert inadvertent mis-fix of fneg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67084 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 16:45:16 +00:00
Duncan Sands
a5fec0dba3 Reapply r67049, with the test adjusted for darwin
(which produces "call L_f$stub" rather than "call f").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67079 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 09:46:22 +00:00
Mon P Wang
93b7415f4c Fix a problem with DAGCombine where we were building an illegal build
vector shuffle mask. Forced the mask to be built using i32.  Note: this will
be irrelevant once vector_shuffle no longer takes a build vector for the
shuffle mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67076 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 06:33:10 +00:00
Dan Gohman
9626447e70 Recognize bswapl as bswap too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67072 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 02:45:40 +00:00
Dan Gohman
d73566609e Recognize "bswapq" as an alternate spelling for the bswap instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67071 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 02:17:27 +00:00