6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-28 04:33:05 +00:00
Code Issues Projects Releases Wiki Activity
71,589 Commits 39 Branches 0 Tags 277 MiB
b8295f7a0e
Commit Graph

71589 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Akira Hatanaka
8d580659f9 Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129105 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 20:25:10 +00:00
Akira Hatanaka
3f92b439d9 Update ATUsed every time after expandRegLargeImmPair is called. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129104 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 20:23:26 +00:00
Mon P Wang
e32cdef38e Fixed encoding for VEXTqf 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129101 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:56:12 +00:00
Andrew Trick
5469976506 Added a check in the preRA scheduler for potential interference on a 
induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.

Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129100 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:54:57 +00:00
Akira Hatanaka
9777e7afd4 Fix handling of functions with internal linkage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129099 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:51:44 +00:00
Johnny Chen
22dc4d9f59 Add sanity checking for invalid register encodings for signed/unsigned extend instructions. 
Add some test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129098 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:28:58 +00:00
Johnny Chen
8dbda0b51b Add sanity checking for invalid register encodings for saturating instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129096 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:02:08 +00:00
Jakob Stoklund Olesen
e815dab69f Recompute hasPHIKill flags when shrinking live intervals. 
PHI values may be deleted, causing the flags to be wrong. This fixes PR9616.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129092 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 18:43:14 +00:00
Johnny Chen
4d4e25740b Add some more comments about checkings of invalid register numbers. 
And two test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129090 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 18:33:19 +00:00
Rafael Espindola
45e1a53efd Expose more passes to the C API. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129087 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 18:20:46 +00:00
Jakob Stoklund Olesen
f34ae32a6b Avoid moving iterators when the previous block was just visited. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129081 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 17:27:50 +00:00
Jakob Stoklund Olesen
0bd2bd9ecc Prefer multiplications to divisions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129080 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 17:27:48 +00:00
Jakob Stoklund Olesen
7b41fbe872 Extract SpillPlacement::addLinks for handling the special transparent blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129079 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 17:27:46 +00:00
Devang Patel
949666ea16 While hoisting common code from if/else, hoist debug info intrinsics if they match. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129078 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 17:27:36 +00:00
Tanya Lattner
0433b21c98 Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal vector type (vectors of size 3). Also included test cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129074 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 15:24:20 +00:00
Jay Foad
71001c97c6 Fix a bit of nonsense. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129073 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 12:41:09 +00:00
Chris Lattner
a844a3e7b2 add faust too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129053 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 03:09:21 +00:00
Chris Lattner
3d6a80a26a add a few late stragglers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129052 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 03:08:22 +00:00
Sean Callanan
5c3a245f3c Fixed a bug where missing EDInstInfo would cause 
tokenization to crash and burn.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129051 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 01:56:01 +00:00
Johnny Chen
f16f4e09ec Sanity check MSRi for invalid mask values and reject it as invalid. 
rdar://problem/9246844


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129050 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 01:37:34 +00:00
Eli Friedman
0e382192c1 PR9634: Don't unconditionally tell the AliasSetTracker that the PreheaderLoad 
is equivalent to any other relevant value; it isn't true in general.
If it is equivalent, the LoopPromoter will tell the AST the equivalence.
Also, delete the PreheaderLoad if it is unused.

Chris, since you were the last one to make major changes here, can you check
that this is sane?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 01:35:06 +00:00
Johnny Chen
8424a60fc9 The ARM disassembler was not recognizing USADA8 instruction. Need to add checking for register values 
for USAD8 and USADA8.

rdar://problem/9247060


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 01:05:52 +00:00
Evan Cheng
2c69f8eec6 Change -arm-divmod-libcall to a target neutral option. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129045 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:58:44 +00:00
Evan Cheng
1adb47cc11 Remove dead code. rdar://9221736. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129044 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:56:37 +00:00
Johnny Chen
2455268cdd Should also check SMLAD for invalid register values. 
rdar://problem/9246650


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129042 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:50:25 +00:00
Devang Patel
ae6c95b58e Simplify. isIdenticalToWhenDefined() checks opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129041 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:30:15 +00:00
Nick Lewycky
84025ba08f Set unnamed_addr on strings created through the IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:14:29 +00:00
Nick Lewycky
c60a475091 Add support for ArrayRef in IRBuilder's CreateCall. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129039 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:03:25 +00:00
Owen Anderson
df298c9ea6 Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for folded comparisons, just like ADD and SUB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129038 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 23:35:59 +00:00
Owen Anderson
ef7fb17936 Cleanups from Jim: remove redundant constraints and a dead FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129036 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:45:55 +00:00
Devang Patel
d418194036 While folding branch to a common destination into a predecessor, copy dbg values also. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129035 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:37:20 +00:00
Jim Grosbach
f22eefba68 Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129034 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:35:47 +00:00
Johnny Chen
d8b4c4d74f A8.6.393 
The ARM disassembler should reject invalid (type, align) encodings as invalid instructions.

So, instead of:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

	vst2.32	{d0, d2}, [r3, :256], r3

we now have:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

mc-input.txt:1:1: warning: invalid instruction encoding
0xb3 0x9 0x3 0xf4
^


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129033 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:14:48 +00:00
Jim Grosbach
01ccab4012 tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129032 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:13:52 +00:00
Jakob Stoklund Olesen
9a54352879 Also account for the spill code that would be inserted in live-through blocks with interference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129030 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 21:32:41 +00:00
Jakob Stoklund Olesen
1b400e840f Abort the constraint calculation early when all positive bias is lost. 
Without any positive bias, there is nothing for the spill placer to to. It will
spill everywhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129029 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 21:32:38 +00:00
Nick Lewycky
b0923771c9 Fix typo in doxy-comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129028 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 20:54:07 +00:00
Johnny Chen
4d81c9a6ba A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP" 
Since these "Advanced SIMD and VFP" instructions have more specfic encoding bits
specified, if coproc == 10 or 11, we should reject the insn as invalid.

rdar://problem/9239922
rdar://problem/9239596


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129027 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 20:49:02 +00:00
Nick Lewycky
a040d47c74 Fix comment to use llvm 2.x syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129025 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 20:38:44 +00:00
Nick Lewycky
ec5d1800f9 Replace const std::vector& with ArrayRef in the type creation APIs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 20:28:34 +00:00
Jakob Stoklund Olesen
70d4370b47 Keep track of the number of positively biased nodes when adding constraints. 
If there are no positive nodes, the algorithm can be aborted early.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 19:14:00 +00:00
Jakob Stoklund Olesen
9efa2a263e Break the spill placement algorithm into three parts: prepare, addConstraints, and finish. 
This will allow us to abort the algorithm early if it is determined to be futile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129020 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 19:13:57 +00:00
Roman Divacky
77b42e9654 Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129019 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 19:12:21 +00:00
Johnny Chen
a9611549fe Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong. 
Also set the encoding bits (for A8.6.303, A8.6.328, A8.6.329) Inst{3-0} = 0b0000,
in class NVLaneOp.

rdar://problem/9240648


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129015 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 18:27:46 +00:00
Rafael Espindola
3d195faaad Add another case we are not optimizing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129012 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 17:35:32 +00:00
Rafael Espindola
8617897aaa The original issue has been fixed by not doing unnecessary sign extensions. 
Change the test to force a sign extension and expose the problem again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129011 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 17:19:35 +00:00
Devang Patel
f3480a8015 face+palm 
Keep track of llvm.dbg.value intrinsics with non null values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129010 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 17:08:15 +00:00
Rafael Espindola
f5a90561b0 Do a topological sort of the types before writing them out. 
This takes the linking of libxul on linux from 6m54.931s to 5m39.840s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129009 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 16:49:37 +00:00
Jim Grosbach
714b34fc24 EngineBuilder setter method for UseMCJIT was missing return value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129008 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 16:35:19 +00:00
Chris Lattner
0fa5da9753 add rubinius 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129006 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 16:14:25 +00:00