Evan Cheng
c972165b11
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12 02:03:03 +00:00
Evan Cheng
ea253b99e9
Remove an Darwin assembler workaround.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12 01:56:42 +00:00
Evan Cheng
05c269c645
Shrink ADDS, ADC, RSB, and SUBS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12 01:49:45 +00:00
Bob Wilson
dbd3c0e06d
Add missing chain operands for VLD* and VST* instructions.
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Set "mayLoad" and "mayStore" on the load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78761 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12 00:49:01 +00:00
Owen Anderson
23b9b19b1a
Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78759 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-12 00:36:31 +00:00
Chris Lattner
c98077ba42
prune #include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 23:07:27 +00:00
Chris Lattner
5940c02633
prune #includage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78748 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 23:06:16 +00:00
Chris Lattner
6b883e3297
fix CodeGen/PowerPC/2007-01-15-AsmDialect.ll, fallout from r78742
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78747 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 23:03:40 +00:00
Chris Lattner
ce914b8f94
change the -x86-asm-syntax=intel/att flag to be in X86TAI
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instead of X86 Subtarget. This elimianates dependencies on
X86Subtarget from X86TAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 23:01:09 +00:00
Evan Cheng
b89030ab65
Shrinkify Thumb2 r = add sp, imm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 23:00:31 +00:00
Chris Lattner
09652df5fc
second half of commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:52:15 +00:00
Chris Lattner
5b67bb1922
pass "is64Bit" flag into PPC TAI ctors instead of a whole targetmachine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:51:34 +00:00
Chris Lattner
74da671c36
eliminate asmflavor from subtarget, PPCTAI is the only client
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and each callee knows that it returns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:49:34 +00:00
Chris Lattner
e2b060161c
Change the asmprinter to print the comment character before the
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"inlineasmstart/end" strings so that the contents of the directive
are separate from the comment character. This lets elf targets
get #APP/#NOAPP for free even if they don't use "#" as the comment
character. This also allows hoisting the darwin stuff up to the
shared TAI class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:39:40 +00:00
David Goodwin
546952fd60
Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:38:43 +00:00
Chris Lattner
e28a2e8b70
factorize more darwin TAI stuff. Note that this gives
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darwin/arm support for .no_dead_strip
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:31:42 +00:00
Daniel Dunbar
0c420fc20a
X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm, FS_MOV32rm as codegen only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:24:40 +00:00
Chris Lattner
e2811a7480
factorize darwin ProtectedDirective and SetDirective.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78732 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:22:44 +00:00
Daniel Dunbar
7417b761c2
Add 'isCodeGenOnly' bit to Instruction .td records.
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- Used to mark fake instructions which don't correspond to an actual machine
instruction (or are duplicates of a real instruction). This is to be used for
"special cases" in the .td files, which should be ignored by things like the
assembler and disassembler. We still need a good solution to handle pervasive
duplication, like with the Int_ instructions.
- Set the bit on fake "mov 0" style instructions, which allows turning an
assembler matcher warning into a hard error.
- -2 FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78731 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:17:52 +00:00
Chris Lattner
b6ba9c36db
all darwin targets have .space and .zerofill, pull up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78730 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:17:31 +00:00
Chris Lattner
5f28ffe6c2
eliminate template from arm TAI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:14:59 +00:00
Chris Lattner
4b152796ce
fix a bug I introduced in r78724 that caused failures in:
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CodeGen/X86/dll-linkage.ll & CodeGen/X86/mingw-alloca.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78728 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:12:58 +00:00
Chris Lattner
c89ecc5c2f
move LCOMMDirective = "\t.lcomm\t" up to DarwinTAI, eliminate
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template in PPC backend for TAI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:06:07 +00:00
Owen Anderson
766b5efd99
Fix warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78725 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 21:59:30 +00:00
Chris Lattner
a1a1f02708
eliminate the X86TargetAsmInfo template.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 21:57:08 +00:00
Sean Callanan
b08ae6b0fb
Added ADD instructions with rAX as one parameter to the Intel instruction
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tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78721 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 21:26:06 +00:00
Evan Cheng
4b322e58b7
Shrinkify Thumb2 load / store multiple instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78717 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 21:11:32 +00:00
Daniel Dunbar
59fc42debd
llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will be
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used to strip hard coded comments out of .td assembly strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78716 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 20:59:47 +00:00
Owen Anderson
825b72b057
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
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the latter is capable of representing either a primitive or an extended type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 20:47:22 +00:00
Chris Lattner
0a31d2f645
pass the TargetTriple down from each target ctor to the
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LLVMTargetMachine ctor. It is currently unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 20:42:37 +00:00
Chris Lattner
92319e2454
now that JumpTableDirective can differentate picness itself, MIPS TAI
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no longer needs a targetmachine to initialize itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 20:32:51 +00:00
Chris Lattner
dfab291702
split "JumpTableDirective" (an existing hack) into a PIC and nonPIC
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version. This allows TAI implementations to specify the directive to use
based on the mode being codegen'd for.
The real fix for this is to remove JumpTableDirective, but I don't feel
like diving into the jumptable snarl just now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78709 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 20:30:58 +00:00
Jim Grosbach
5aa1684e5d
Add Thumb2 eh_sjlj_setjmp implementation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 19:42:21 +00:00
Jim Grosbach
cdc17ebc2b
fix GetInstSizeInBytes for eh_sjlj_setjmp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78683 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 17:08:15 +00:00
Chris Lattner
02552decf9
move some 32-bit instrs to x86instrinfo.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78680 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 16:58:39 +00:00
Benjamin Kramer
327365e58f
This void is implicit in C++.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78678 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 16:03:08 +00:00
Dan Gohman
ffef8acc3e
Tidy #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78677 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 16:02:12 +00:00
Dan Gohman
3108222c2c
Simplify this code. The case where one class is GR64RegClass and the
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other is a subclass of it is effectively handled by the prior tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 15:59:48 +00:00
Jim Grosbach
764ab52dd8
Whitespace cleanup. Remove trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78666 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 15:33:49 +00:00
Jim Grosbach
f128787f94
Move ~ARMConstantPoolValue() to the .cpp file to avoid needing to include <cstdlib> in the header.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78665 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 15:26:27 +00:00
Evan Cheng
195c71b472
Fix the previous accidental commit. Now shrinking common Thumb2 load / store instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78659 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 09:37:40 +00:00
Evan Cheng
3a21425dbe
Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form to
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match base only address, i.e. [r] since Thumb2 requires a offset register field.
For those, use [r + imm12] where the immediate is zero.
Note the generated assembly code does not look any different after the patch.
But the bug would have broken the JIT (if there is Thumb2 support) and it can
break later passes which expect the address mode to be well-formed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 08:52:18 +00:00
Evan Cheng
1cf5783dd7
80 column violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 08:47:46 +00:00
Evan Cheng
4a8ea215e6
Cosmetic changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78655 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 07:36:14 +00:00
Evan Cheng
7fb8c3ffc0
Adding a blank line back.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78654 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 07:32:58 +00:00
Bob Wilson
b0abb4dc42
Use vAny type to get rid of Neon intrinsics that differed only in whether
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the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.
If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 05:39:44 +00:00
Daniel Dunbar
0db68f4e3a
llvm-mc/X86: Parse '*' correctly (in the way the matcher expects).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 05:00:25 +00:00
Sanjiv Gupta
a418628d30
Fixed more problems caused by 78142.
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Passing of indirect arguments starts after return value on the callee's frame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 01:51:55 +00:00
Bob Wilson
f24bd401eb
Use new EVT::vAny type to combine Neon intrinsics for VPADD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 01:15:26 +00:00
Sean Callanan
1c5cf1b378
Added the x86 INT instructions; both the special-case INT 3 and the general-case
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INT i8. These instructions are only for interpretation by disassemblers, not
for emission, so they do not as yet have patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78630 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 01:09:06 +00:00