Commit Graph

12009 Commits

Author SHA1 Message Date
David Goodwin
f35290ce8d Fix bug in NEON convert for single-precision FP. This also fixes the tblgen warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78629 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 01:07:38 +00:00
Jim Grosbach
3034e8fb1f Add stdlib.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78627 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 00:20:00 +00:00
Jim Grosbach
1b747ad8a0 SjLj based exception handling unwinding support. This patch is nasty, brutish
and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 00:09:57 +00:00
Evan Cheng
3a1f0f6785 Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 23:56:04 +00:00
Dan Gohman
a407ca16c2 Fix a bug where DAGCombine was producing an illegal ConstantFP
node after legalize, and remove the workaround code from the
ARM backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78615 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 23:15:10 +00:00
Owen Anderson
e50ed30282 Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 22:56:29 +00:00
Eric Christopher
a8c6908995 Whitespace, 80-column, and isTwoAddress -> Constraints = "" changes.
No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 22:37:37 +00:00
David Goodwin
338268c67f Use NEON for single-precision int<->FP conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 22:17:39 +00:00
Devang Patel
715c66251c Do not rely on magic "llvm.dbg.*" global variable name to find debug info.
PIC16 developers, please verify. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78603 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 22:11:20 +00:00
Eric Christopher
027c2b11ea Fix up whitespace, remove commented out code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 21:48:58 +00:00
Daniel Dunbar
44f63f9335 llvm-mc/AsmParser: Disambiguate i64i8imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 21:06:41 +00:00
Daniel Dunbar
5c468e3d70 llvm-mc/AsmParser: Allow .td users to redefine the names of the methods to call
on target specific operands for testing class membership and converting to
MCInst operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78597 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 21:00:45 +00:00
Owen Anderson
d6662add68 SimpleValueType-ify a few more methods on TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78595 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 20:46:15 +00:00
Evan Cheng
e2b861f7d9 Handle the constantfp created during post-legalization dag combiner phase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78594 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 20:25:59 +00:00
Owen Anderson
70671845ad Continue the SimpleValueType-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78593 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 20:18:46 +00:00
Daniel Dunbar
8e00117e04 llvm-mc/AsmMatcher: Fix thinko, Mem isn't a subclass of Imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78587 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 19:08:02 +00:00
Owen Anderson
77547befdc Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:56:59 +00:00
Daniel Dunbar
338825c192 llvm-mc/AsmMatcher: Change assembler parser match classes to their own record
structure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78581 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:41:10 +00:00
Chris Lattner
f9bdeddb96 split MachO section handling stuff out to its out .h/.cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:15:01 +00:00
Chris Lattner
f3231de60b arm only needs to emit one .align directive for hidden nlp's, not one
per pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:02:16 +00:00
Chris Lattner
c076a97939 make sure that arm nonlazypointers are aligned properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:01:34 +00:00
Chris Lattner
e1e8a82986 Fix a weird ppc64-specific link error during an llvm-gcc build:
ld: bad offset (0x00000091) for lo14 instruction pic-base fix-up in ___popcountdi2 from libgcc/./_popcountsi2_s.o

The problem is that the non lazy symbol pointers need to be 8 byte aligned
on ppc64 and .section doesn't have an implicit alignment like ".non_lazy_symbol_pointer"
does.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 17:58:51 +00:00
Chris Lattner
12b2bda61a fix some warnings for the MSVC build, by Yonggang Luo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 17:35:42 +00:00
David Goodwin
bcf81629b8 Checkpoint scheduling itinerary changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 15:56:13 +00:00
Evan Cheng
65f2e7887a Watch out for empty BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 08:10:13 +00:00
Evan Cheng
8442d00a0e rev, rev16, and revsh do not set CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78561 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 07:58:45 +00:00
Evan Cheng
0d3007bb32 Duh. Most 16-bit Thumb rr instructions are two-address. Fix table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 07:20:37 +00:00
Evan Cheng
26cc252a43 CPSR can be livein; transfer predicate operands correctly; tMUL is two-address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78559 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 06:57:42 +00:00
Evan Cheng
19068ba71a Add support for folding loads / stores into 16-bit moves used by Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 06:32:05 +00:00
Evan Cheng
2294645642 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 05:51:48 +00:00
Evan Cheng
052053bbe3 Use tMOVgpr2gpr instead of t2MOVr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78556 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 05:49:43 +00:00
Evan Cheng
e8af1f9afe Add support to reduce most of 32-bit Thumb2 arithmetic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78550 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 02:37:24 +00:00
Evan Cheng
09d97354ed Always use the 16-bit tMOVgpr2gpr instead of the 32-bit t2MOVr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78549 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 02:06:53 +00:00
Chris Lattner
ff4bc460c5 Make the big switch: Change MCSectionMachO to represent a section *semantically*
instead of syntactically as a string.  This means that it keeps track of the 
segment, section, flags, etc directly and asmprints them in the right format.
This also includes parsing and validation support for llvm-mc and 
"attribute(section)", so we should now start getting errors about invalid 
section attributes from the compiler instead of the assembler on darwin.

Still todo: 
1) Uniquing of darwin mcsections
2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h]
3) there are a few FIXMEs, for example what is the syntax to get the
   S_GB_ZEROFILL segment type?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78547 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 01:39:42 +00:00
Benjamin Kramer
c6ca847a4e Use abs64 instead abs; some platforms don't have a 64-bit abs overload. Noticed by Yonggang Luo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 22:37:07 +00:00
Evan Cheng
a56c57e5f0 Add support to convert 32-bit instructions to 16-bit non-two-address ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 19:17:19 +00:00
Daniel Dunbar
5fe6338ac8 llvm-mc/AsmParser: Implement user defined super classes.
- We can now discriminate SUB32ri8 from SUB32ri, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78530 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 07:20:21 +00:00
Daniel Dunbar
98164afb01 Extend comment on ParserMatchClass .td field, and add some missing
classes for X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78524 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 06:00:04 +00:00
Daniel Dunbar
6745d42e8e llvm-mc/AsmParser: Define match classes in the .td file.
-2 FIXMEs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78523 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 05:18:30 +00:00
Chris Lattner
93b6db3de9 sink the 'name' and 'isdirective' state out of MCSection into its derived classes.
This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 23:39:42 +00:00
Anton Korobeynikov
8e9ece75db Use subclassing to print lane-like immediates (w/o hash) eliminating
'no_hash' modifier. Hopefully this will make Daniel happy :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78514 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 23:10:41 +00:00
Chris Lattner
ba44633a3b add a note about dead zero extends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78511 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 22:46:59 +00:00
Chris Lattner
892e182393 1. Make MCSection an abstract class.
2. Move section switch printing to MCSection virtual method which takes a
   TAI.  This eliminates textual formatting stuff from TLOF.
3. Eliminate SwitchToSectionDirective, getSectionFlagsAsString, and 
   TLOFELF::AtIsCommentChar.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78510 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 22:41:53 +00:00
Eric Christopher
b4dc13cab7 Add crc32 instruction and intrinsics. Add a new class of prefix
bytes for F2 0F 38 and propagate. Add a FIXME for a set
of possibilities which correspond to intrinsics already used.

New test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:55:08 +00:00
Jakob Stoklund Olesen
46151de6a0 Add support for READCYCLECOUNTER in Blackfin back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:42:22 +00:00
Chris Lattner
f7427e558d add new PIC16Section class, this time hopefully not breaking the build :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:37:01 +00:00
Daniel Dunbar
245f05843f llvm-mc/AsmMatcher: Switch token matching to use the new string matcher.
Also, redefined MatchRegisterName to just return the register value or a
sentinel, to simplify the generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:22:41 +00:00
Daniel Dunbar
fb373909be Revert r78501, it doesn't build.
--- Reverse-merging r78501 into '.':
U    lib/Target/PIC16/PIC16TargetObjectFile.cpp
D    lib/Target/PIC16/PIC16Section.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78503 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 21:12:40 +00:00
Chris Lattner
50e38121d1 make PIC16 create its own custom MCSection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:55:25 +00:00
Chris Lattner
7c599d056a make target-specific TLOF impls (except PIC16) create target-specific
MCSection instances.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:52:13 +00:00
Chris Lattner
5277b22687 eliminate TargetLoweringObjectFileSparc in favor of a TAI hook.
A TAI hook is appropriate in this case because this is just an
asm syntax issue, not a semantic difference. TLOF should model
the semantics of the section.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78498 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:43:12 +00:00
Chris Lattner
9aee18186c give pic16 a target-specific section creation name too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:23:47 +00:00
Chris Lattner
0c0cb71233 now that getOrCreateSection is all object-file specific,
give the impls an object-file-specific name.  In the future
they can take different arguments etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:22:20 +00:00
Chris Lattner
fbf1d271e6 sink getOrCreateSection down into all the object file implementations,
now that they create *all* the sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 20:14:13 +00:00
Bruno Cardoso Lopes
71435a3975 Use reloc_absolute_word_sext relocation for X86::MOV64(ri/mi)32 instructions,
since they are in 64 bit mode with i64immSExt32 imms. JIT is not affected since 
it handles both word absolute relocations in the same way


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 17:47:41 +00:00
Daniel Dunbar
cf1e764a1c Update CMake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78475 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 17:03:13 +00:00
Anton Korobeynikov
06af2ba809 Add insert_elt / extract_elt patterns for v4f32 stuff.
Did anyone tests v4f32 ever?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 14:06:07 +00:00
Anton Korobeynikov
3405201bce Lane number should be printed w/o hash
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78469 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 14:05:53 +00:00
Anton Korobeynikov
baf31088f1 Use VLDM / VSTM to spill/reload 128-bit Neon registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 13:35:48 +00:00
Andrew Lenharth
20c08e534f move this fp select into a pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 12:49:07 +00:00
Daniel Dunbar
a3741fa28b llvm-mc/AsmMatcher: Improve match code.
- This doesn't actually improve the algorithm (its still linear), but the
   generated (match) code is now fairly compact and table driven. Still need a
   generic string matcher.

 - The table still needs to be compressed, this is quite simple to do and should
   shrink it to under 16k.

 - This also simplifies and restructures the code to make the match classes more
   explicit, in anticipation of resolving ambiguities.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78461 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 07:50:56 +00:00
Bob Wilson
b6ab51e829 Implement Neon VZIP and VUZP instructions. These are very similar to VTRN,
so I generalized the class for VTRN in the .td file to handle all 3 of them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78460 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 06:13:25 +00:00
Bob Wilson
64efd90f8c Implement Neon VTRN instructions. For now, anyway, these are selected
directly from the intrinsics produced by the frontend.  If it is more
convenient to have a custom DAG node for using these to implement shuffles,
we can add that later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78459 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 05:53:00 +00:00
Evan Cheng
3eff16e27a Add a skeleton Thumb2 instruction size reduction pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78456 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:21:23 +00:00
Evan Cheng
8fb903604e Code refactoring. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78455 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:20:32 +00:00
Evan Cheng
57834cdee5 tADDhirr should target GPR, not tGPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78454 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 03:19:44 +00:00
Evan Cheng
34f8a029e3 I can type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78453 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 02:54:37 +00:00
Chris Lattner
41aefdcdd1 make printInstruction return void since its result is omitted. Make the
error condition get trapped with an assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78449 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 01:32:19 +00:00
Chris Lattner
2698cb6811 don't check the result of printInstruction anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-08 00:05:42 +00:00
Anton Korobeynikov
941222eea0 Do not generate 32-bit call on win64 when imm does not fit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:59:21 +00:00
David Goodwin
767a952a6f Make NEON single-precision FP support the default for cortex-a8 (again).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78430 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:32:33 +00:00
Chris Lattner
db0a9706e7 remove a bunch of now-dead crud from the asmprinter and TAI interfaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 23:16:27 +00:00
Anton Korobeynikov
a55fd4a23f Unbreak the stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:51:13 +00:00
Andrew Lenharth
7116b7bb0c avoid this libcall with long inline expansion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78420 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:37:20 +00:00
Anton Korobeynikov
32a1b25781 2 more vdup.32 cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 22:36:50 +00:00
Evan Cheng
fcc716352b A big oops. Thumb1 default CC is a def of CPSR, not a use of CPSR.
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2009-08-07 22:36:37 +00:00
Bill Wendling
1232167ce3 Reformatting of lines. Put multiple DEBUG statements under one DEBUG statement.
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2009-08-07 21:33:25 +00:00
Evan Cheng
d77c7aba83 Thumb2 32-bit ldm / stm needs .w suffix if submode is ia.
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2009-08-07 21:19:10 +00:00
Daniel Dunbar
2724915c17 llvm-mc/AsmMatcher: Tweaks in response to feedback.
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2009-08-07 20:33:39 +00:00
Evan Cheng
f12288e8aa This is done.
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2009-08-07 19:34:52 +00:00
Evan Cheng
e118cb6146 Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07 19:34:35 +00:00
Evan Cheng
1d2426c470 Fix support to use NEON for single precision fp math.
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2009-08-07 19:30:41 +00:00
Sanjiv Gupta
394a1a21a1 Minor fixes to avoid using invalid debugloc.
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2009-08-07 11:00:02 +00:00
Benjamin Kramer
b8d222def1 Simplify code and avoid allocations.
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2009-08-07 10:42:28 +00:00
Daniel Dunbar
6812cd18aa Improve disabling of X86 AsmMatcher.
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2009-08-07 09:06:38 +00:00
Daniel Dunbar
7ddca30f31 Disable X86 AsmMatcher for now, it is causing gcc-4.0 to run out of memory on
i386-apple-darwin9. This presumably will get fixed once the generated code
improves.


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2009-08-07 08:45:03 +00:00
Daniel Dunbar
20927f26fc llvm-mc/AsmMatcher: Move to a slightly more sane matching design.
- Still not very sane, but a least its not 60k lines on X86. :)

 - In terms of correctness, currently some things are hard wired for X86, and we
   still don't properly resolve ambiguities (this is ignoring the instructions
   we don't even match due to funny .td stuff or other corner cases).

The high level changes:
 1. Represent tokens which are significant for matching explicitly as separate
    operands. This uniformly handles not only the instruction mnemonic, but
    also 'signficiant' syntax like the '*' in "call * ...".

 2. Separate the matching of operands to an instruction from the construction of
    the MCInst. In theory this can be done during matching, but since the number
    of variations is small I think it makes sense to decompose the problems.

 3. Improved a few of the mechanisms to at least successfully flatten / tokenize
    the assembly strings for PowerPC and ARM.

 4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
    moving towards for handling ambiguous instructions. The high-bit is to infer
    a partial ordering of the operand classes (and force the user to specify one
    if we can't) and use that to resolve ambiguities.


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2009-08-07 08:26:05 +00:00
Evan Cheng
b6879b2b84 Error out, rather than infinite looping, if constant island pass can't converge.
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2009-08-07 07:35:21 +00:00
Evan Cheng
53c67c0218 tBfar is bl, which clobbers LR.
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2009-08-07 05:45:07 +00:00
Sanjiv Gupta
85019e15eb Run memsel inserter just before emit assembly to avoid tinkering by other passes.
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2009-08-07 05:44:27 +00:00
Andrew Lenharth
a3c6073fd3 These should be expanded
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2009-08-07 02:17:44 +00:00
Dan Gohman
7db949df78 Fix a bunch of namespace pollution.
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2009-08-07 01:32:21 +00:00
Evan Cheng
861986401e It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing.
This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time.

This fixes PR4659 and PR4682.


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2009-08-07 00:34:42 +00:00
Nicolas Geoffray
6f62cffd63 Output the new StructType constructor, which takes the context of the
module as first argument.



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2009-08-06 21:31:35 +00:00
Devang Patel
2251666d44 Use DebugInfoFinder
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2009-08-06 20:53:24 +00:00
Bob Wilson
b36ec86c01 Implement Neon VST[234] operations.
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2009-08-06 18:47:44 +00:00
David Goodwin
8b7d7ade85 Add parameter to pattern classes to enable an itinerary to be specified for instructions. For now just use the existing itineraries or NoItinerary.
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2009-08-06 16:52:47 +00:00
Chris Lattner
24f654c8a4 Fix several fixmes and clean up code by sinking *all* section
creation activity into the target-specific subclasses of TLOF.
Before this, globals with explicit sections could be created by
the base class.

1. make getOrCreateSection protected, add a new getExplicitSectionGlobal
   pure virtual method to assign sections to globals with a specified
   section.
2. eliminate getSpecialCasedSectionGlobals, which is now PIC specific.
3. eliminate the getKindForNamedSection virtual method, which is
   now just a static method for ELF.
4. Add implementions of getExplicitSectionGlobal for ELF/PECOFF/Darwin/PIC16.
   They are now all detangled and understandable, woo! :)


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2009-08-06 16:39:58 +00:00
Chris Lattner
759b88898d go through PIC16TargetObjectFile to make sections instead of
creating them directly in the pic16 asmprinter.


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2009-08-06 16:27:28 +00:00
Anton Korobeynikov
d7697d0167 We need to sext global addresses in kernel code model, not zext
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2009-08-06 11:23:24 +00:00