Commit Graph

13020 Commits

Author SHA1 Message Date
Lang Hames
3b0714d993 Rewrite instruction operands in AdjustCopiesBackFrom. Fixes PR11861.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 00:05:42 +00:00
Chris Lattner
6b0dc92043 progress making the world safe to ConstantDataVector. While
we're at it, allow PatternMatch's "neg" pattern to match integer
vector negations, and enhance ComputeNumSigned bits to handle
shl of vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 21:37:55 +00:00
Chris Lattner
5b676ce793 tidy up forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 20:44:57 +00:00
Chad Rosier
6a5d0e2a98 Update comment for r149070.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 20:19:05 +00:00
Chad Rosier
0162ff421d Replace the use of isPredicable() with isPredicated() in
MachineBasicBlock::canFallThrough().  We're interested in the state of the
instruction (i.e., is this a barrier or not?), not if the instruction is
predicable or not.
rdar://10501092

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 18:24:25 +00:00
Jakob Stoklund Olesen
1a96c91431 Clear kill flags before propagating a copy.
The live range of the source register may be extended when a redundant
copy is eliminated. Make sure any kill flags between the two copies are
cleared.

This fixes PR11765.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 17:52:15 +00:00
James Molloy
34982576a4 Add support for the R_ARM_TARGET1 relocation, which should be given to relocations applied to all C++ constructors and destructors.
This enables the linker to match concrete relocation types (absolute or relative) with whatever library or C++ support code is being linked against.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 09:25:43 +00:00
Chris Lattner
56243b89e7 eliminate the Constant::getVectorElements method. There are better (and
more robust) ways to do what it was doing now.  Also, add static methods
for decoding a ShuffleVector mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149028 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-26 02:51:13 +00:00
Jakob Stoklund Olesen
e8838d5c5f Improve sub-register def handling in ProcessImplicitDefs.
This boils down to using MachineOperand::readsReg() more.

This fixes PR11829 where a use ended up after the first def when
lowering REG_SEQUENCE instructions involving IMPLICIT_DEFs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 23:36:27 +00:00
Anton Korobeynikov
4a99f59aef Properly emit ctors / dtors with priorities into desired sections
and let linker handle the rest.

This finally fixes PR5329



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 22:24:19 +00:00
Lang Hames
58a3685916 Don't add live ranges for aliases of physregs that are live in to the
function. They don't appear to be used, and are inconsistent with handling of
other physreg intervals (i.e. intervals that are not live-in) where ranges are
not inserted for aliases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148986 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 22:11:06 +00:00
Lang Hames
6c76e80753 Always break upon finding a vreg operand (in Release as well as +Asserts). Remove assertion which can no longer trigger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 21:53:23 +00:00
Chris Lattner
4ca829e895 use ConstantVector::getSplat in a few places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148929 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 06:02:56 +00:00
Chris Lattner
0f193b8a68 Use the right method to get the # elements in a CDS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148897 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 01:27:20 +00:00
Jakob Stoklund Olesen
d36f5af224 Set correct <def,undef> flags when lowering REG_SEQUENCE.
A REG_SEQUENCE instruction is lowered into a sequence of partial defs:

  %vreg7:ssub_0<def,undef> = COPY %vreg20:ssub_0
  %vreg7:ssub_1<def> = COPY %vreg2
  %vreg7:ssub_2<def> = COPY %vreg2
  %vreg7:ssub_3<def> = COPY %vreg2

The first def needs an <undef> flag to indicate it is the beginning of
the live range, while the other defs are read-modify-write.  Previously,
we depended on LiveIntervalAnalysis to notice and fix the missing
<def,undef>, but that solution was never robust, it was causing problems
with ProcessImplicitDefs and the lowering of chained REG_SEQUENCE
instructions.

This fixes PR11841.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148879 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:28:42 +00:00
Jakob Stoklund Olesen
1ce6a36610 Use the standard MachineFunction::print() after SlotIndexes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 23:28:38 +00:00
Jakob Stoklund Olesen
10c6fdcd11 Fix old doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148825 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:09:18 +00:00
Chris Lattner
1ee0ecf84a add more support for ConstantDataSequential
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 13:41:11 +00:00
Evgeniy Stepanov
53fa1ae510 An option to selectively enable part of ARM EHABI support.
This change adds an new option --arm-enable-ehabi-descriptors that
enables emitting unwinding descriptors. This provides a mode with a
working backtrace() without the (currently broken) exception support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148800 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 13:05:33 +00:00
Benjamin Kramer
e697b4f486 Bit pack DIE structures better.
16 bits are sufficient to store attributes, tags and forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 12:08:28 +00:00
Eric Christopher
8a69834935 Remove generation of DW_AT_sibling. Nothing as far as I can tell uses it.
Saves about 1.5% on debug info size.

rdar://10278198

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148794 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 09:43:28 +00:00
Chris Lattner
9e631da253 Add AsmPrinter (aka MCLowering) support for ConstantDataSequential,
and clean up some other misc stuff.  Unlike ConstantArray, we will
prefer to emit .fill directives for "String" arrays that all have
the same value, since they are denser than emitting a .ascii


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148793 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 09:31:43 +00:00
Jakob Stoklund Olesen
defe12df51 Preserve <def,undef> flags in CoalesceExtSubRegs.
This won't have an effect until EliminateRegSequences() starts setting
the undef flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148779 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 04:44:01 +00:00
Chandler Carruth
3eb4be0ace Revert r148686 (and r148694, a fix to it) due to a serious layering
violation -- MC cannot depend on CodeGen.

Specifically, the MCTargetDesc component of each target is actually
a subcomponent of the MC library. As such, it cannot depend on the
target-independent code generator, because MC itself cannot depend on
the target-independent code generator. This change moved a flag from the
ARM MCTargetDesc file ARMMCAsmInfo.cpp to the CodeGen layer in
ARMException.cpp, leaving behind an 'extern' to refer back to it. That
layering order isn't viable givin the constraints outlined above.
Commandline flags are designed to be static specifically to avoid these
types of bugs.

Fixing this is likely going to require some non-trivial refactoring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 00:30:17 +00:00
Bill Wendling
4302a4965c Remove extraneous ';'s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148740 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 22:55:02 +00:00
Lang Hames
e0bd8c3a26 copyImplicitOps is redundant here - the loop above already copies these ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148725 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 21:15:01 +00:00
Jakob Stoklund Olesen
d0848a6398 Fix PR11829. PostRA LICM was too aggressive.
This fixes a typo in r148589.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148724 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 21:01:15 +00:00
Jakob Stoklund Olesen
39f6660193 Simplify debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148723 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 21:01:11 +00:00
Evgeniy Stepanov
7908480e4c An option to selectively enable parts of ARM EHABI support.
This change adds an new value to the --arm-enable-ehabi option that
disables emitting unwinding descriptors. This mode gives a working
backtrace() without the (currently broken) exception support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148686 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 07:57:39 +00:00
Anton Korobeynikov
4a309f3d25 Add an option to disable buggy copy propagation pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148662 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-22 14:08:34 +00:00
Evan Cheng
7423db2dcf Fix an obvious typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-21 03:31:03 +00:00
Jakob Stoklund Olesen
8c47ad8c47 Handle register masks in LiveVariables.
A register mask operand kills any live physreg that isn't preserved.
Unlike an implicit-def operand, the clobbered physregs are never live
afterwards.

This means LiveVariables has to track a much smaller number of live
physregs, and it should spend much less time in addRegisterDead().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148609 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-21 00:58:53 +00:00
Jakob Stoklund Olesen
4888d5e98c Delete an unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148594 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 22:48:59 +00:00
Jakob Stoklund Olesen
a3c4ca9c7b Support register masks in MachineLICM.
Only PostRA LICM is affected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148589 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 22:27:12 +00:00
Jakob Stoklund Olesen
6b88c180da Handle register masks in DeadMachineInstructionElim.
Don't track live physregs that are clobbered by a register mask operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 22:27:09 +00:00
David Blaikie
4d6ccb5f68 More dead code removal (using -Wunreachable-code)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 21:51:11 +00:00
Kostya Serebryany
164b86b439 Extend Attributes to 64 bits
Problem: LLVM needs more function attributes than currently available (32 bits).
One such proposed attribute is "address_safety", which shows that a function is being checked for address safety (by AddressSanitizer, SAFECode, etc).

Solution:
- extend the Attributes from 32 bits to 64-bits
- wrap the object into a class so that unsigned is never erroneously used instead
- change "unsigned" to "Attributes" throughout the code, including one place in clang.
- the class has no "operator uint64 ()", but it has "uint64_t Raw() " to support packing/unpacking.
- the class has "safe operator bool()" to support the common idiom:  if (Attributes attr = getAttrs()) useAttrs(attr);
- The CTOR from uint64_t is marked explicit, so I had to add a few explicit CTOR calls
- Add the new attribute "address_safety". Doing it in the same commit to check that attributes beyond first 32 bits actually work.
- Some of the functions from the Attribute namespace are worth moving inside the class, but I'd prefer to have it as a separate commit.

Tested:
"make check" on Linux (32-bit and 64-bit) and Mac (10.6)
built/run spec CPU 2006 on Linux with clang -O2.


This change will break clang build in lib/CodeGen/CGCall.cpp.
The following patch will fix it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148553 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 17:56:17 +00:00
Bill Wendling
b618ea5ff9 When lowering the 'resume' instruction, look to see if we can eliminate the
'insertvalue' instructions that recreate the structure returned by the
'landingpad' instruction. Because the 'insertvalue' instruction isn't supported
by FastISel, this can save a bit of time during -O0 compilation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148520 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 00:53:28 +00:00
Evan Cheng
ef2887d348 More bundle related API additions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148465 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 07:47:03 +00:00
Evan Cheng
3f9c251e40 Rewriter should definitly rewrite instructions inside bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148464 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 07:46:36 +00:00
Evan Cheng
a2e435cd23 Enhance finalizeBundle to return end of bundle iterator because it makes sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148462 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 06:13:10 +00:00
Evan Cheng
bca15f9c80 - Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing
to instruction right after the last instruction in the bundle.
- Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code
  will find the last instruction in the bundle by following the 'InsideBundle'
  marker. This is useful in case bundles are formed early (i.e. during MI
  scheduling) but finalized later (i.e. after register allocator has finished
  rewriting virtual registers with physical registers).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148444 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 00:46:06 +00:00
Evan Cheng
9b159710eb Rename Finalizebundle to finalizeBundle to conform to coding guideline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148440 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-19 00:06:10 +00:00
Jakob Stoklund Olesen
9cf37e8b48 Add a RegisterMaskSDNode class.
This SelectionDAG node will be attached to call nodes by LowerCall(),
and eventually becomes a MO_RegisterMask MachineOperand on the
MachineInstr representing the call instruction.

LowerCall() will attach a register mask that depends on the calling
convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148436 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-18 23:52:12 +00:00
Lang Hames
bfab85e9b1 Fixed macro condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-18 19:48:31 +00:00
Nadav Rotem
819026f2f8 Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-18 08:33:18 +00:00
Pete Cooper
cd7f02bb43 Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-18 04:16:16 +00:00
Nadav Rotem
ba05c91ed2 Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148337 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 21:44:01 +00:00
Craig Topper
d3b588965d Teach DAG combiner to turn a BUILD_VECTOR of UNDEFs into an UNDEF of vector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148297 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 09:09:48 +00:00
Andrew Trick
c6cf11b412 misched: Inital interface and implementation for ScheduleTopDownLive and ShuffleInstructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 06:55:07 +00:00