Dan Gohman
68d599df37
Speculatively micro-optimize memory-zeroing calls on Darwin 10.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49048 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 20:38:36 +00:00
Evan Cheng
9845eb5b03
More soft fp fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49016 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 02:18:22 +00:00
Evan Cheng
110cf48752
Unbreak ARM / Thumb soft FP support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49012 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 01:50:16 +00:00
Dale Johannesen
1d3863fdbc
Mark functions in some tests as 'nounwind'. Generating
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EH info for these functions causes the tests to fail for
random reasons (e.g. looking for 'or' or counting lines
with asm-printer; labels count as lines.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49003 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 23:20:09 +00:00
Evan Cheng
427f4c106a
It's not safe to fold a load from GV stub or constantpool into a two-address use.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49002 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 23:19:51 +00:00
Dan Gohman
b061c4bc44
Fix a DAGCombiner optimization to respect volatile qualification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48994 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 20:32:52 +00:00
Dan Gohman
d4a2ad35e3
Fix a tokenfactor node to use the load chain rather than the
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load value. This fixes PR2177.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48932 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-28 23:45:16 +00:00
Evan Cheng
7a963fa8ee
Fix a memory bug: increment an iterator of a deleted machine instr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48853 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27 01:27:25 +00:00
Evan Cheng
0c28432852
One more coalescer fix wrt deadness propagation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48837 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26 20:15:49 +00:00
Evan Cheng
ed70cbb3f3
Avoid commuting a def MI in order to coalesce a copy instruction away if any use of the same val# is a copy instruction that has already been coalesced.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48833 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26 19:03:01 +00:00
Dale Johannesen
27c31054ec
Use ## for comment delimiter on darwin x86-32, so
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llvm's output .s files will go through gcc -std=c99
without triggering preprocesser errors. Approach
suggested by Daveed Vandevoorde.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48808 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 23:29:30 +00:00
Evan Cheng
26471c48b3
Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48792 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 20:08:07 +00:00
Dan Gohman
27845362d9
Add CMP32mr and friends to the load-unfolding table. Among
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other things, this allows the scheduler to unfold a load operand
in the 2008-01-08-SchedulerCrash.ll testcase, so it now successfully
clones the comparison to avoid a pushf+popf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48777 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 16:53:19 +00:00
Tanya Lattner
6f729d601c
Byebye llvm-upgrade!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48762 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 04:26:08 +00:00
Evan Cheng
a2fb634def
lastRegisterUse() should ignore identity copies. Those will be erased.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48759 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 02:02:19 +00:00
Bill Wendling
3e98c30cf5
Use the bit size of the operand instead of the hard-coded 32 to generate the
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mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48750 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24 23:16:37 +00:00
Evan Cheng
62a3f1538c
- SSE4.1 extractfps extracts a f32 into a gr32 register. Very useful! Not. Fix the instruction specification and teaches lowering code to use it only when the only use is a store instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24 21:52:23 +00:00
Dan Gohman
4c931fc6e2
APIntify SelectionDAG's EXTRACT_ELEMENT code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48726 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24 16:38:05 +00:00
Bill Wendling
d59c517a83
New testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48697 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-22 22:27:01 +00:00
Evan Cheng
08b1173971
Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-22 01:55:50 +00:00
Dan Gohman
f1d3d666c1
Handle getresult instructions in different basic blocks
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from their aggregate operands by moving the getresult
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48657 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 21:01:32 +00:00
Chris Lattner
24e0a546b4
Add support for calls that return two FP values in
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ST(0)/ST(1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48634 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 06:38:26 +00:00
Chris Lattner
ae60ddc22a
disable a bogus assertion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48633 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 06:01:05 +00:00
Chris Lattner
0353526ed1
Enable support for returning two long-double values in ST(0)/ST(1).
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This allows us to compile fp-stack-2results.ll into:
_test:
fldz
fld1
ret
which returns 1 in ST(0) and 0 in ST(1). This is needed for x86-64
_Complex long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48632 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 05:57:20 +00:00
Evan Cheng
fa5a91a71e
Undo 48570. Correctly match mmx shift instructions with an immediate operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48627 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 00:40:09 +00:00
Evan Cheng
260e07ec8c
Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20 02:18:41 +00:00
Scott Michel
79698f60c4
Add more patterns to match in the integer comparison test harnesses.
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Fix bugs encountered, mostly due to range matching for immediates;
the CellSPU's 10-bit immediates are sign extended, covering a
larger range of unsigned values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20 00:51:36 +00:00
Evan Cheng
dff1dcac6c
Add intrinsics to match mmx shift builtin's with immediate operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48569 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 23:38:52 +00:00
Dan Gohman
7925ed05d0
Add support for multiple return values for the PPC target by
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converting call result lowering to use the CallingConvLowering
infastructure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 21:39:28 +00:00
Christopher Lamb
15cbde3cf6
Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 08:30:06 +00:00
Evan Cheng
82a6d23700
Fixed a coalescer bug caused by a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 02:26:36 +00:00
Evan Cheng
94202018c5
Fix live variables issues:
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1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue.
2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register:
= EAX, AX<imp-use,kill>
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AX =
In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 00:52:20 +00:00
Evan Cheng
586ccac4ec
Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48515 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 23:36:35 +00:00
Bill Wendling
dbfd894561
It might be nice to have this run as x86 on non-x86 platforms...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48511 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 22:38:22 +00:00
Bill Wendling
2974e49019
Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 22:29:51 +00:00
Dale Johannesen
cf49819877
Make conversions of i8/i16 to ppcf128 work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48493 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 17:28:38 +00:00
Christopher Lamb
981576c818
Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 16:46:39 +00:00
Evan Cheng
3c88d742d4
Rewrite code that propagate isDead information after a dead copy is coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48490 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 08:26:47 +00:00
Chris Lattner
9493268124
ensure we continue matching x86-64 rotates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48437 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-17 01:35:03 +00:00
Evan Cheng
c17ba8a28d
Fix PR2138. Apparently any modification to a std::multimap (including remove entries for a different key) can invalidate multimap iterators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48371 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 20:44:01 +00:00
Dan Gohman
002e5d0a17
More APInt-ification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 22:13:53 +00:00
Evan Cheng
a56516ee08
New test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48338 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 08:05:02 +00:00
Evan Cheng
d99464d647
A test case I forgot to check in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48335 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 06:42:46 +00:00
Evan Cheng
875357d213
TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48333 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 06:37:55 +00:00
Evan Cheng
9e23336d0c
Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
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entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1028<def> = MOV32rr %EAX
%reg1029<def> = MOV32rr %EDX
%reg1030<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
%reg1025<def> = MOV32rr %reg1029
%reg1026<def> = MOV32rr %reg1030
%reg1024<def> = MOV32rr %reg1028
The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.
With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1024<def> = MOV32rr %EAX
%reg1025<def> = MOV32rr %EDX
%reg1026<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]
Much better!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 22:19:41 +00:00
Dan Gohman
89964b4ca1
Fix this test on hosts that don't have sse2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48296 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:40:51 +00:00
Dan Gohman
38459f01c0
Make this test x86-specific for now; targets that don't use
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the automated CallingConv code to handle return values typically
don't support multiple return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48265 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 00:25:14 +00:00
Dan Gohman
cb5b317890
Basic feature test for multiple return values in codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48260 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 23:53:16 +00:00
Anton Korobeynikov
f1765e8298
Testcase for PR2137
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 22:43:42 +00:00
Anton Korobeynikov
0fb2033f91
Update testcase for recent aliases change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:42:20 +00:00
Dan Gohman
6a6d27ac0b
Add a test to ensure that all-ones vectors are materialized with pcmpeqd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48247 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:37:00 +00:00
Dan Gohman
9736028d84
Use the correct value for InSignBit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:29:43 +00:00
Chris Lattner
e12ecf272d
Implement basic support for the 'f' register class constraint. This basically
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works, but probably won't if you mix it with 't' or 'u' yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48243 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 19:50:13 +00:00
Dale Johannesen
01c18a7275
The feature this is testing did not work in the general case,
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and has been removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48232 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 17:48:26 +00:00
Evan Cheng
9a8094159d
Learn how to xfail a test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48219 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:51:31 +00:00
Evan Cheng
676dd7c80b
When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:19:34 +00:00
Evan Cheng
de13acf862
XFAIL due to Dale's change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48216 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:15:44 +00:00
Dan Gohman
034f60ed24
Generalize ExpandIntToFP to handle the case where the operand is legal
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and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 01:59:03 +00:00
Scott Michel
405fba12ce
- Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.
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- Add test pattern matching in CellSPU's icmp32.ll test harness
- Fix CellSPU fcmp.ll-generated assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48197 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:49:09 +00:00
Chris Lattner
03fdec04d1
Don't emit FP_REG_KILL into a block that just returns. Nothing
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can be live out of the block anyway, so it isn't needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48192 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:34:12 +00:00
Dan Gohman
a2e9485e34
Implement more support for fp-to-i128 and i128-to-fp conversions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:03:31 +00:00
Bill Wendling
2b65c4e7cc
Update llc flags for PPC register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48187 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 22:59:08 +00:00
Dan Gohman
76c605b18e
Fix mul expansion to check the correct number of bits for
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zero extension when checking if an unsigned multiply is
safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 20:42:19 +00:00
Dale Johannesen
45bcbf491c
These tests don't work unless SSE2 is active.
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Judging from the checking comments this is intentional,
so add the flag (makes them pass on non-x86 host).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48157 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 17:33:57 +00:00
Dale Johannesen
ca765303fb
There is no "-mattr=+sse1" flag; fix test for non-x86 hosts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48156 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 17:13:37 +00:00
Scott Michel
78c47fa50b
Integer comparison tests for CellSPU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48152 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 16:58:52 +00:00
Evan Cheng
4ff3f1cc57
- Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy.
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If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.
A = or A, B
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B = A
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C = A<kill>
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= B
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48141 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 08:11:32 +00:00
Evan Cheng
f79e60649a
Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 07:19:13 +00:00
Chris Lattner
8d88dbcbae
remove an execution test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48135 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 06:53:14 +00:00
Evan Cheng
7a0690d1b6
Fix RUN line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48116 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 19:55:22 +00:00
Chris Lattner
f30e1cf9b7
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
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an RFP register class.
Teach ScheduleDAG how to handle CopyToReg with different src/dst
reg classes.
This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 09:15:31 +00:00
Chris Lattner
02b6d25a27
Add ScheduleDAG support for copytoreg where the src/dst register are
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in different register classes, e.g. copy of ST(0) to RFP*. This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 08:49:15 +00:00
Tanya Lattner
76806b6a43
Remove llvm-upgrade and update tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48103 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 08:16:40 +00:00
Chris Lattner
ce6e492997
reduce this testcase more
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 06:57:21 +00:00
Chris Lattner
67f453aae7
Finish implementing a readme entry: when inserting an i64 variable
...
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle. This allows us to compile
vec_set-B.ll into:
_test3:
movl $1234567, %eax
andl 4(%esp), %eax
movd %eax, %xmm0
ret
instead of:
_test3:
subl $28, %esp
movl $1234567, %eax
andl 32(%esp), %eax
movl %eax, (%esp)
movl $0, 4(%esp)
movq (%esp), %xmm0
addl $28, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 05:42:06 +00:00
Chris Lattner
62098040a1
Implement a readme entry, compiling
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#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}
into:
movl $1, %eax
movd %eax, %xmm0
ret
instead of a constant pool load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 01:05:04 +00:00
Chris Lattner
8aca4b13a8
upgrade this test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48062 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 00:32:10 +00:00
Chris Lattner
da8de316a8
make this test harder
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48061 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 00:30:06 +00:00
Chris Lattner
f3ba434781
Teach SD some vector identities, allowing us to compile vec_set-9 into:
...
_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret
instead of:
_test3:
#IMPLICIT_DEF %rax
movd %rax, %xmm0
movd %rdi, %xmm1
punpcklqdq %xmm1, %xmm0
ret
This is still not ideal. There is no reason to two xmm regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 23:43:36 +00:00
Evan Cheng
27b7db549e
Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 00:58:38 +00:00
Dan Gohman
a2fcff4d97
Add support for calls with i128 return values on ppc64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48041 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 00:19:12 +00:00
Dan Gohman
9ed06db5c8
Add support for lowering 128-bit shifts on ppc64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-07 20:36:53 +00:00
Evan Cheng
d68f47c6fd
Fixed a register scavenger bug. If a def is re-defining part of a super register, there must be an implicit def of the super-register on the MI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48024 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-07 20:12:54 +00:00
Chris Lattner
d1108222fd
mark frem as expand for all legal fp types on x86, regardless of whether
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we're using SSE or not. This fixes PR2122.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-07 06:36:32 +00:00
Bill Wendling
65bc122045
Add testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48005 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06 23:34:22 +00:00
Gabor Greif
2cf36e0772
some more spelling changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47996 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06 10:51:21 +00:00
Evan Cheng
433f6f62ca
Constant fold SIGN_EXTEND_INREG with ashr not lshr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47992 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06 08:20:51 +00:00
Scott Michel
4cb8bd8eff
Refine Cell's i64 constant generation code to cover more constants where the
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upper and lower 32-bits are the same (in addition to 0 and -1 previously.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47985 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06 04:02:54 +00:00
Scott Michel
53dec47f3b
- Expand tabs to spaces.
...
- select_bits.ll now fully functional now that PR1993 is closed. It was
previously broken by refactoring in SPUInstrInfo.td and using multiclasses.
- Same for eqv.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47972 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 23:00:19 +00:00
Evan Cheng
ecb2a8b9bc
Fix a coalescer bug wrt how dead copy interval is shortened.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47966 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 22:09:42 +00:00
Chris Lattner
ec4a5672f8
Generalize FP constant shrinking optimization to apply to any vt
...
except ppc long double. This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47938 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 06:48:13 +00:00
Evan Cheng
6fd599fa69
Add a target lowering hook to control whether it's worthwhile to compress fp constant.
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For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 01:30:59 +00:00
Bill Wendling
3fab77eb25
Use -enable-ppc-regscavenger flag for these checks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47916 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 23:16:26 +00:00
Evan Cheng
a26e0fe1b4
Really fix the test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47882 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 08:01:56 +00:00
Evan Cheng
6a2286a045
Fix broken test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47881 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 07:59:13 +00:00
Evan Cheng
f92dd28ab7
Add PR1501 test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47874 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 00:47:45 +00:00
Bill Wendling
7194aaf738
This is the initial check-in for adding register scavenging to PPC. (Currently,
...
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47863 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03 22:19:16 +00:00
Chris Lattner
767486b1d5
Evan implemented these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-02 18:05:14 +00:00
Chris Lattner
3be4893dce
Evan implemented this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47827 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-02 17:56:29 +00:00
Chris Lattner
a4239e7367
add a testcase for misc vector stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47826 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-02 08:57:59 +00:00
Bill Wendling
65201f5a43
DCE'ed this testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47760 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-29 19:28:11 +00:00
Bill Wendling
97e3c01eb4
If we reload a virtual register that's already been assigned, we want to mark
...
that instruction as its "last use". This fixes PR1925.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47758 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-29 18:52:01 +00:00
Lauro Ramos Venancio
9b80bd8ea2
Update testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47735 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 23:13:15 +00:00
Evan Cheng
e526d8a955
Set to default: x86 no longer fold and into test if it has more than one use.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47711 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 07:46:38 +00:00
Dale Johannesen
0154e47ed0
New test for misaligned Altivec laod/store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47698 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 23:14:50 +00:00
Dan Gohman
ec59b95a19
Don't hard-code the mask size to be 32, which is incorrect on ppc64
...
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 21:12:32 +00:00
Evan Cheng
21b3f31f8f
Fix a bug in dead spill slot elimination.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 19:57:11 +00:00
Chris Lattner
e416b7d407
actually run llc, thanks Dan :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 17:46:54 +00:00
Evan Cheng
be680dcea6
Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47668 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 10:04:56 +00:00
Chris Lattner
b09916bdfb
Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead
...
stack slot and store if the SINT_TO_FP is actually legal. This allows
us to compile:
double a(double b) {return (unsigned)b;}
to:
_a:
cvttsd2siq %xmm0, %rax
movl %eax, %eax
cvtsi2sdq %rax, %xmm0
ret
instead of:
_a:
subq $8, %rsp
cvttsd2siq %xmm0, %rax
movl %eax, %eax
cvtsi2sdq %rax, %xmm0
addq $8, %rsp
ret
crazy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47660 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 05:57:41 +00:00
Chris Lattner
d0ba2a9c14
Compile x86-64-and-mask.ll into:
...
_test:
movl %edi, %eax
ret
instead of:
_test:
movl $4294967295, %ecx
movq %rdi, %rax
andq %rcx, %rax
ret
It would be great to write this as a Pat pattern that used subregs
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47658 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 05:47:54 +00:00
Evan Cheng
d36531249a
Spiller now remove unused spill slots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47657 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 03:04:06 +00:00
Bill Wendling
cc4831849e
Upgrade testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47644 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 23:22:40 +00:00
Evan Cheng
4d535cadf1
Enable -coalescer-commute-instrs by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 20:40:22 +00:00
Dan Gohman
d4cf992230
Avoid aborting on invalid shift counts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47612 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 18:50:50 +00:00
Eli Friedman
9ec8095485
Fix for pr2093: direct operands aren't necessarily addresses, so don't
...
try to simplify them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47610 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 18:37:49 +00:00
Chris Lattner
aeecb6c73a
Fix PR2096, a regression introduced with my patch last night. This
...
also fixes cfrac, flops, and 175.vpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47605 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 17:09:59 +00:00
Gabor Greif
72c8f0d156
Really feed llvm-as with the testcase, do not let it read from stdin. This fixes the hangs seen on solaris10.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 13:37:13 +00:00
Evan Cheng
c886c460e4
This is possible:
...
vr1 = extract_subreg vr2, 3
...
vr3 = extract_subreg vr1, 2
The end result is vr3 is equal to vr2 with subidx 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47592 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 08:03:41 +00:00
Chris Lattner
0254e7033a
Fix isNegatibleForFree to not return true for ConstantFP nodes
...
after legalize. Just because a constant is legal (e.g. 0.0 in SSE)
doesn't mean that its negated value is legal (-0.0). We could make
this stronger by checking to see if the negated constant is actually
legal post negation, but it doesn't seem like a big deal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 07:04:54 +00:00
Evan Cheng
9bf12b5583
Fix PR2076. CodeGenPrepare now sinks address computation for inline asm memory
...
operands into inline asm block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47589 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 02:42:37 +00:00
Scott Michel
a59d469e9b
Merge current work back to tree to minimize diffs and drift. Major highlights
...
for CellSPU modifications:
- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
compiles and generates the right code. More work still needs to be done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47532 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 18:41:37 +00:00
Evan Cheng
249ded3fa8
Rematerialization logic was overly conservative when it comes to loads from fixed stack slots.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47529 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 03:38:34 +00:00
Evan Cheng
aaa1d4265e
Update test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47527 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 02:57:25 +00:00
Evan Cheng
18924f11c1
Remat of pic loads are now on by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47525 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 02:08:30 +00:00
Evan Cheng
28c9fc630c
Really. Why doesn't every arch support MMX?
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47513 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-23 00:56:14 +00:00
Evan Cheng
530d47f4f2
Test case for PR2082.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47501 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 20:38:49 +00:00
Evan Cheng
d8850a512e
Allow re-materialization of pic load (controlled by -remat-pic-load for now).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 09:25:47 +00:00
Chris Lattner
d2b1fb27df
copy mmx values from/to memory with GPRs on x86-32
...
instead of with mmx registers. This horribleness is apparently
done by gcc to avoid having to insert emms in places that really
should have it. This is the second half of rdar://5741668.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47474 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 05:18:04 +00:00
Chris Lattner
149a4e56fc
Start using GPR's to copy around mmx value instead of mmx regs.
...
GCC apparently does this, and code depends on not having to do
emms when this happens. This is x86-64 only so far, second half
should handle x86-32.
rdar://5741668
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47470 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 02:09:43 +00:00
Chris Lattner
0fe71e9bb1
Treat clobber operands like early clobbers: if we have
...
any, we force sdisel to do all regalloc for an asm. This
leads to gross but correct codegen.
This fixes the rest of PR2078.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47454 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 19:43:13 +00:00
Tanya Lattner
33eefffb2b
Remove llvm-upgrade and update tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47432 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 07:42:26 +00:00
Chris Lattner
2bedd7359c
testcase for PR1133
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47427 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 05:27:08 +00:00
Chris Lattner
7cbeb2431c
Fix a (harmless) but where vregs were added to the used reg lists for
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inline asms.
Fix PR2078 by marking aliases of registers used when a register is
marked used. This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 04:55:52 +00:00
Evan Cheng
359026e39a
XFAIL this for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47355 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-20 02:38:58 +00:00
Chris Lattner
b476f98ca9
this test requires sse2
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47331 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 18:07:46 +00:00
Chris Lattner
ce2bcc8839
Don't fold and's into test instructions if they have multiple uses.
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This compiles test-nofold.ll into:
_test:
movl $15, %ecx
andl 4(%esp), %ecx
testl %ecx, %ecx
movl $42, %eax
cmove %ecx, %eax
ret
instead of:
_test:
movl 4(%esp), %eax
movl %eax, %ecx
andl $15, %ecx
testl $15, %eax
movl $42, %eax
cmove %ecx, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47330 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 17:37:35 +00:00
Chris Lattner
22c31769fb
rename tests to avoid a test- prefix when they aren't related to the test instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 17:33:52 +00:00
Tanya Lattner
cfab3da46e
Remove llvm-upgrade and update tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47325 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 08:07:33 +00:00
Nick Lewycky
7ad3920e31
Don't spew stats to stderr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47308 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 03:11:47 +00:00
Nick Lewycky
9103ba1003
Fix up the run line for this new test.
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llc: for the -info-output-file option: requires a value!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47306 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 02:58:36 +00:00
Evan Cheng
acfab64631
New test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47302 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 02:09:58 +00:00
Tanya Lattner
53a66d10f0
Remove llvm-upgrade and update tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47296 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-19 01:41:04 +00:00
Evan Cheng
efec751a1b
- When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
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- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-18 23:04:32 +00:00
Dan Gohman
339ffedca9
Don't mark scalar integer multiplication as Expand on x86, since x86
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has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.
This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-18 17:55:26 +00:00
Tanya Lattner
6263f94674
Remove llvm-upgrade.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47238 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-17 20:02:20 +00:00
Andrew Lenharth
22c5c1b2df
llvm.memory.barrier, and impl for x86 and alpha
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-16 01:24:58 +00:00
Evan Cheng
de7f560744
This test is not interesting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-15 23:06:21 +00:00
Chris Lattner
423be627e6
Fix a miscompilation from Dan's recent apintification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 18:48:56 +00:00
Chris Lattner
8b0cb7bcc6
This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47106 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 05:39:46 +00:00