Commit Graph

64103 Commits

Author SHA1 Message Date
Eric Christopher
21a6a5013d Hoist section call out of loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190440 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 21:49:37 +00:00
Matt Arsenault
14807bd8c8 Teach ScalarEvolution about pointer address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190425 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 19:55:24 +00:00
Matt Arsenault
be5faa8a1e Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190424 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 19:54:54 +00:00
Rui Ueyama
f42d4247ae Add getenv() wrapper that works on multibyte environment variable.
On Windows, character encoding of multibyte environment variable varies
depending on settings. The only reliable way to handle it I think is to use
GetEnvironmentVariableW().

GetEnvironmentVariableW() works on wchar_t string, which is on Windows UTF16
string. That's not ideal because we use UTF-8 as the internal encoding in LLVM.
This patch defines a wrapper function which takes and returns UTF-8 string for
GetEnvironmentVariableW().

The wrapper function does not do any conversion and just forwards the argument
to getenv() on Unix.

Differential Revision: http://llvm-reviews.chandlerc.com/D1612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190423 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 19:45:51 +00:00
Benjamin Kramer
8e12d95d15 LoopVectorize: PHI nodes are always at the beginning of a block, no need to scan the whole block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190422 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 18:46:15 +00:00
Manman Ren
fd2210a78d Debug Info: create scope children DIEs when the scope DIE is not null.
We try to create the scope children DIEs after we create the scope DIE. But
to avoid emitting empty lexical block DIE, we first check whether a scope
DIE is going to be null, then create the scope children if it is not null.
From the number of children, we decide whether to actually create the scope DIE.

This patch also removes an early exit which checks for a special condition.
It also removes deletion of un-used children DIEs that are generated
because we used to generate children DIEs before the scope DIE.

Deletion of un-used children DIEs may cause problem because we sometimes keep
created DIEs in a member variable of a CU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190421 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 18:40:41 +00:00
Manman Ren
2c46deb1d0 Debug Info: define a DIRef template.
Specialize the constructors for DIRef<DIScope> and DIRef<DIType> to make sure
the Value is indeed a scope ref and a type ref.

Use DIScopeRef for DIScope::getContext and DIType::getContext and use DITypeRef
for getContainingType and getClassType.

DIScope::generateRef now returns a DIScopeRef instead of a "Value *" for
readability and type safety.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190418 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 18:30:07 +00:00
Jim Grosbach
1039e106d0 ARM: Use the PICADD opcode calculated.
We were figuring out whether to use tPICADD or PICADD, then just using
tPICADD unconditionally anyway. Oops.

A testcase from someone familiar enough with ELF to produce one would
be appreciated. The existing PIC testcase correctly verifies the .s
generated, but that doesn't catch this bug, which only showed up in
direct-to-object mode.

http://llvm.org/bugs/show_bug.cgi?id=17180

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190417 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 17:21:39 +00:00
Logan Chien
28823ec408 Remove unused private member in ARMAsmPrinter.cpp.
This commit removes the unused "AttributeItem" from
ObjectAttributeEmitter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190412 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 15:10:02 +00:00
Kostya Serebryany
f3d4b35f24 [asan] refactor the use-after-return API so that the size class is computed at compile time instead of at run-time. llvm part
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 13:16:56 +00:00
Richard Sandiford
4c708e586e [SystemZ] Update README.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190404 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 12:22:45 +00:00
Richard Sandiford
299fdd814f [SystemZ] Add TM and TMY
The main complication here is that TM and TMY (the memory forms) set
CC differently from the register forms.  When the tested bits contain
some 0s and some 1s, the register forms set CC to 1 or 2 based on the
value the uppermost bit.  The memory forms instead set CC to 1
regardless of the uppermost bit.

Until now, I've tried to make it so that a branch never tests for an
impossible CC value.  E.g. NR only sets CC to 0 or 1, so branches on the
result will only test for 0 or 1.  Originally I'd tried to do the same
thing for TM and TMY by using custom matching code in ISelDAGToDAG.
That ended up being very ugly though, and would have meant duplicating
some of the chain checks that the common isel code does.

I've therefore gone for the simpler alternative of adding an extra
operand to the TM DAG opcode to say whether a memory form would be OK.
This means that the inverse of a "TM;JE" is "TM;JNE" rather than the
more precise "TM;JNLE", just like the inverse of "TMLL;JE" is "TMLL;JNE".
I suppose that's arguably less confusing though...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190400 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 10:20:32 +00:00
Daniel Sanders
436f64567c [mips][msa] Removed unsupported dot product instructions (dotp_[su].b)
The dotp_[su].b instructions never existed in any revision of the MSA spec.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 09:51:43 +00:00
Vladimir Medic
b15da6dc09 Add test cases for Mips mthc1/mfhc1 instructions. Add check for odd value of register when PFU is 32 bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 09:50:01 +00:00
Vladimir Medic
798cdc6af1 Remove obsolete code from MipsAsmParser.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190396 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 09:39:55 +00:00
NAKAMURA Takumi
c3c9b9b7a8 MCObjectFileInfo.cpp: Fix a couple of possible typo(s), s/DwarfPub/DwarfGnuPub/, in r190344.
XFAIL can be removed. (in r190374)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 06:01:56 +00:00
Matt Arsenault
c6c08508ca Don't use getSetCCResultType for creating a vselect
The vselect mask isn't a setcc.

This breaks in the case when the result of getSetCCResultType
is larger than the vector operands

e.g. %tmp = select i1 %cmp <2 x i8> %a, <2 x i8> %b
when getSetCCResultType returns <2 x i32>, the assertion
that the (MaskTy.getSizeInBits() == Op1.getValueType().getSizeInBits())
is hit.

No test since I don't think I can hit this with any of the current
targets. The R600/SI implementation would break, since it returns a
vector of i1 for this, but it doesn't reach ExpandSELECT for other
reasons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190376 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 00:41:56 +00:00
Matt Arsenault
ffdee89a3c Use StringRef::npos for StringRef instead of std::string one
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 00:41:53 +00:00
Bill Wendling
9c7448c8d3 Revert r190366. It was breaking build bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190373 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-10 00:20:27 +00:00
Andrew Trick
fc7fd0992a Enable -misched-cyclicpath by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190367 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 23:31:14 +00:00
Bill Wendling
5ebe6ccf65 Use a default value for the prologue's debug location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190366 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 23:28:15 +00:00
Manman Ren
d4fc36f264 Debug Info: In DIBuilder, the context fields of a TAG_inheritance and a
TAG_friend are updated to use scope reference.

Added testing cases to verify that class with inheritance can be uniqued.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190364 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 23:07:58 +00:00
Manman Ren
e72aba9c0f Debug Info: move DIScope::getContext back from DwarfDebug.
This partially reverts r190330. DIScope::getContext now returns DIScopeRef
instead of DIScope. We construct a DIScopeRef from DIScope when we are
dealing with subprogram, lexical block or name space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 22:35:23 +00:00
Andrew Trick
ee50a46026 mi-sched: smooth out the cyclicpath heuristic.
Arnold's idea.

I generally try to avoid stateful heuristics because it can make
debugging harder. However, we need a way to prevent the latency
priority from dominating, and it somewhat makes sense to schedule
aggressively for latency only within an issue group.

Swift in particular likes this, and it doesn't hurt anyone else:
| Benchmarks/MiBench/consumer-lame              |  10.39% |
| Benchmarks/Misc/himenobmtxpa                  |   9.63% |

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190360 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 22:28:08 +00:00
Jack Carter
3af4d25067 white spaces and long lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 22:02:08 +00:00
Eli Friedman
b1c54930cb Don't shrink atomic ops to bool in GlobalOpt.
LLVM IR doesn't currently allow atomic bool load/store operations, and the
transformation is dubious anyway because it isn't profitable on all platforms.

PR17163.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190357 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 22:00:13 +00:00
Bill Wendling
1d5ad97531 Set the encoding to '0' if we don't have an MAB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 21:22:44 +00:00
Quentin Colombet
2c6ef1c433 [InstCombiner] Expose opportunities to merge subtract and comparison.
Several architectures use the same instruction to perform both a comparison and
a subtract. The instruction selection framework does not allow to consider
different basic blocks to expose such fusion opportunities.

Therefore, these instructions are “merged” by CSE at MI IR level.

To increase the likelihood of CSE to apply in such situation, we reorder the
operands of the comparison, when they have the same complexity, so that they
matches the order of the most frequent subtract.
E.g.,

icmp A, B
...
sub B, A

<rdar://problem/14514580>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 20:56:48 +00:00
Eric Christopher
28b020d373 Always add global names. We're adding them in the rest of the code
as well as types.

No functional change as they're not emitted unless the option
is true anyhow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190346 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 20:03:20 +00:00
Eric Christopher
5747932508 Rename for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190345 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 20:03:17 +00:00
Eric Christopher
328a20471d Add the gnu pubnames and pubtypes sections to the mc object file
handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190344 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 20:03:14 +00:00
Eric Christopher
d4ad5e32a6 Add constant defines for gnu pubnames and gnu pubtypes - they're used
for the gdb index as the names convey.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190343 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 20:03:11 +00:00
Bill Wendling
da11df0c22 Call generateCompactUnwindEncodings() right before we need to output the frame information.
There are more than one paths to where the frame information is emitted. Place
the call to generateCompactUnwindEncodings() into the method which outputs the
frame information, thus ensuring that the encoding is there for every path. This
involved threading the MCAsmBackend object through to this method.

<rdar://problem/13623355>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190335 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 19:48:37 +00:00
Manman Ren
2c9905a1f3 Debug Info: Use DIScopeRef for DIType::getContext.
In DIBuilder, the context field of a TAG_member is updated to use the
scope reference. Verifier is updated accordingly.
    
DebugInfoFinder now needs to generate a type identifier map to have
access to the actual scope. Same applies for BreakpointPrinter.
    
processModule of DebugInfoFinder is called during initialization phase
of the verifier to make sure the type identifier map is constructed early
enough.
    
We are now able to unique a simple class as demonstrated by the added
testing case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190334 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 19:47:11 +00:00
Manman Ren
18eb245a2e Debug Info: move DIScope::getContext to DwarfDebug.
DIScope::getContext is a wrapper function that calls the specific getContext
method on each subclass. When we switch DIType::getContext to return DIScopeRef
instead of DIScope, DIScope::getContext can no longer return a DIScope without
a type identifier map.
    
DIScope::getContext is only used by DwarfDebug, so we move it to DwarfDebug
to have easy access to the type identifier map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190330 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 19:23:58 +00:00
Bob Wilson
db3a9e64f8 Revert patches to add case-range support for PR1255.
The work on this project was left in an unfinished and inconsistent state.
Hopefully someone will eventually get a chance to implement this feature, but
in the meantime, it is better to put things back the way the were.  I have
left support in the bitcode reader to handle the case-range bitcode format,
so that we do not lose bitcode compatibility with the llvm 3.3 release.

This reverts the following commits: 155464, 156374, 156377, 156613, 156704,
156757, 156804 156808, 156985, 157046, 157112, 157183, 157315, 157384, 157575,
157576, 157586, 157612, 157810, 157814, 157815, 157880, 157881, 157882, 157884,
157887, 157901, 158979, 157987, 157989, 158986, 158997, 159076, 159101, 159100,
159200, 159201, 159207, 159527, 159532, 159540, 159583, 159618, 159658, 159659,
159660, 159661, 159703, 159704, 160076, 167356, 172025, 186736

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 19:14:35 +00:00
Manman Ren
02d296759c Debug Info: Move isSubprogramContext from DebugInfo to DwarfDebug.
This helper function needs the type identifier map when we switch
DIType::getContext to return DIScopeRef instead of DIScope.

Since isSubprogramContext is used by DwarfDebug only, We move it to DwarfDebug
to have easy access to the map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190325 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 19:05:21 +00:00
Manman Ren
c573305bce Debug Info: Rename DITypeRef to DIScopeRef.
A reference to a scope is more general than a reference to a type since
DIType is a subclass of DIScope.

A reference to a type can be either an identifier for the type or
the DIType itself, while a reference to a scope can be either an
identifier for the type (when the scope is indeed a type) or the
DIScope itself. A reference to a type and a reference to a scope
will be resolved in the same way. The only difference is in the
verifier when a field is a reference to a type (i.e. the containing
type field of a DICompositeType) or a field is a reference to a scope
(i.e. the context field of a DIType).

This is to get ready for switching DIType::getContext to return
DIScopeRef instead of DIScope.

Tighten up isTypeRef and isScopeRef to make sure the identifier is not
empty and the MDNode is DIType for TypeRef and DIScope for ScopeRef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190322 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 19:03:51 +00:00
Manman Ren
626a4b785b Debug Info: Update isScope to make sure DIType is a scope and
TAG_file_type is also a scope.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190321 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 19:00:55 +00:00
Akira Hatanaka
2dd3afc5e6 [mips] When double precision loads and stores are split into two i32 loads and
stores, make sure the load or store that accesses the higher half does not have
an alignment that is larger than the offset from the original address.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190318 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 17:59:32 +00:00
Benjamin Kramer
54cf1413ac [stackprotector] Modernize code with IRBuilder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190317 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 17:38:01 +00:00
Joey Gouly
b57d99694b [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.
IT blocks can only be one instruction lonf, and can only contain a subset of
the 16 instructions.

Patch by Artyom Skrobov!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190309 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 14:21:49 +00:00
Aaron Ballman
7b80d9233a A better way to silence the warning in MSVC (replaces r190304).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190308 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 14:17:30 +00:00
Aaron Ballman
4220bb24f5 Silencing a warning about control flow reaching the end of a non-void function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190304 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 13:22:45 +00:00
Robert Lytton
71537c1783 XCore handling of thread local lowering
Fix XCoreLowerThreadLocal trying to initialise globals
which have no initializer.

Add handling of const expressions containing thread local variables.
These need to be replaced with instructions, as the thread ID is
used to access the thread local variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190300 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 10:42:11 +00:00
Robert Lytton
7c739380ee XCore target: change to Sched::Source
This sidesteps a bug in PrescheduleNodesWithMultipleUses() which
does not check if callResources will be affected by the transformation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190299 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 10:42:05 +00:00
Robert Lytton
5c28673c3b XCore target: fix weak linkage attribute handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190298 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 10:41:57 +00:00
Bill Wendling
c3cee57f7d Generate compact unwind encoding from CFI directives.
We used to generate the compact unwind encoding from the machine
instructions. However, this had the problem that if the user used `-save-temps'
or compiled their hand-written `.s' file (with CFI directives), we wouldn't
generate the compact unwind encoding.

Move the algorithm that generates the compact unwind encoding into the
MCAsmBackend. This way we can generate the encoding whether the code is from a
`.ll' or `.s' file.

<rdar://problem/13623355>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190290 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 02:37:14 +00:00
Jiangning Liu
959cd8f49b Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions,
SADDL, UADDL, SADDW, UADDW, SSUBL, USUBL, SSUBW, USUBW, ADDHN, RADDHN, SABAL, UABAL, SUBHN, RSUBHN, SABDL, UABDL, SMLAL, UMLAL, SMLSL, UMLSL, SQDMLAL, SQDMLSL, SMULL, UMULL, SQDMULL, PMULL



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190288 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-09 02:20:27 +00:00
Manman Ren
c7a25acefa Revert r190269 to fix dragonegg failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190271 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-08 06:02:56 +00:00
Manman Ren
4fa214b2b9 Debug Info: use null instead of "i32 0" in DIBuilder.
For context field of subroutine_type and when creating artificial types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190270 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-08 06:00:42 +00:00
Manman Ren
d372889eab Debug Info: pass in DIScope instead of DIDescriptor in createMemberType.
Improve readability. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190269 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-08 04:07:59 +00:00
Craig Topper
704e8d41fe Add neverHasSideEffects=1 on a couple move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190259 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-08 00:50:45 +00:00
Craig Topper
89bf2e163c Using popcount should check the popcount feature flag not the SSE41 feature flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190258 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-08 00:47:31 +00:00
Akira Hatanaka
3e6758541b [mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double
precision loads and stores as well as reg+imm double precision loads and stores.

Previously, expansion of loads and stores was done after register allocation,
but now it takes place during legalization. As a result, users will see double
precision stores and loads being emitted to spill and restore 64-bit FP registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-07 00:52:30 +00:00
Akira Hatanaka
d65d2fde4e [mips] Place parentheses around && to silence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190234 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-07 00:26:26 +00:00
Richard Smith
9401181aed Remove verifier check that attribute 'builtin' is only applied to calls to
functions marked 'nobuiltin'. That approach doesn't play well with LTO, and
there's no harm in marking a call as 'builtin' if it was going to be a builtin
regardless.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190233 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-07 00:25:48 +00:00
Akira Hatanaka
1abf0afdd4 [mips] Add definition of instruction "drotr32" (double rotate right plus 32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190232 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-07 00:18:01 +00:00
Manman Ren
0e85f6e391 Debug Info: Use identifier to reference DIType in containing type field of
a DISubprogram.
    
Verifier is updated accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-07 00:04:05 +00:00
Akira Hatanaka
69f8e0935a [mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit
into a 5-bit or 6-bit field.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190226 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-07 00:02:02 +00:00
Manman Ren
8b56ca61e1 Debug Info: pass in VTableHolder as DIType instead of MDNode *.
Remove one cast and improve readability. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190225 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 23:54:23 +00:00
Akira Hatanaka
997c5dead8 [mips] Define "trap" as a pseudo instruction that turns into "break 0, 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 23:52:46 +00:00
Akira Hatanaka
cd3c1b9af9 [mips] Delete unused classes and defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190221 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 23:42:58 +00:00
Akira Hatanaka
1d04ca7987 [mips] Make "b" (unconditional branch) a pseudo. "b" is an assembly idiom, which is
equivalent to "beq $zero, $zero, offset".




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 23:40:15 +00:00
Akira Hatanaka
77e1ebd18f [mips] Set instruction itineraries of loads, stores and conditional moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190219 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 23:28:24 +00:00
Manman Ren
0b3d39235a TBAA: add isTBAAVtableAccess to MDNode so clients can call the function
instead of having its own implementation.

The implementation of isTBAAVtableAccess is in TypeBasedAliasAnalysis.cpp
since it is related to the format of TBAA metadata.

The path for struct-path tbaa will be exercised by
test/Instrumentation/ThreadSanitizer/read_from_global.ll, vptr_read.ll, and
vptr_update.ll when struct-path tbaa is on by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190216 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 22:47:05 +00:00
Aaron Watry
546dcc5ddc R600: Add support for LDS atomic subtract
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190200 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 20:17:42 +00:00
Manman Ren
e42279cda4 Debug Info: Use identifier to reference DIType in containing type field of
a DICompositeType.
    
Verifier is updated accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190190 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 18:46:00 +00:00
Manman Ren
5930eabe0f Debug Info: Move a helper function getTypeIdentifier from DIBuilder to be part
of DIType.
    
Implement DIType::generateRef to return a type reference. This function will be
used in setContaintingType and in DIBuilder to generete the type reference.
    
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190188 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 18:27:00 +00:00
Andrew Trick
fb386db636 mi-sched: cleanup register pressure update, remove a FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 17:32:47 +00:00
Andrew Trick
6bf0c6c535 mi-sched: improve regpressure tracing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190180 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 17:32:44 +00:00
Andrew Trick
fd30312c49 mi-sched: print tree size in -view-misched-dags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190179 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 17:32:42 +00:00
Andrew Trick
1251bcccc1 mi-sched: register pressure update tracing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190178 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 17:32:39 +00:00
Andrew Trick
f9c2fa8341 mi-sched: Reorder Cyclicpath (latency) and CriticalMax (pressure) heuristics.
The latency based scheduling could induce spills in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190177 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 17:32:36 +00:00
Andrew Trick
38e61122f2 Added MachineSchedPolicy.
Allow subtargets to customize the generic scheduling strategy.
This is convenient for targets that don't need to add new heuristics
by specializing the strategy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 17:32:34 +00:00
Matthias Braun
b63db85350 avoid unnecessary direct access to LiveInterval::ranges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190170 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 16:44:32 +00:00
Matthias Braun
1920156982 remove unused argument from LiveRanges::join()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190169 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 16:44:29 +00:00
Matthias Braun
2d5558cbae remove pointless assert
The if above it ensures the property anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190168 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 16:44:27 +00:00
Matthias Braun
c725865bbc fix comment
There's no 'B3' in the example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190167 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 16:44:25 +00:00
Daniel Sanders
a86062c4b1 [mips][msa] Indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 13:25:06 +00:00
Daniel Sanders
5cb39b22fb [mips][msa] Requires<[HasMSA]> is redundant, it is also supplied via inheritance
Tested with 'llvm-tblgen -print-records' which outputs identical records before
and after this patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190155 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 13:15:05 +00:00
Vladimir Medic
638382e6f1 This patch adds support for microMIPS Multiply and Add/Sub instructions. Test cases are included in patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190154 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 13:08:00 +00:00
Daniel Sanders
3aaa3e31aa [mips][msa] Made the operand register sets optional for the VEC formats
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190153 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 13:01:47 +00:00
Vladimir Medic
dadd1fba32 This patch adds support for microMIPS Move to/from HI/LO instructions. Test cases are included in patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190152 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:53:21 +00:00
Daniel Sanders
9e935a77a5 [mips][msa] Made the operand register sets optional for the ELM_INSVE formats
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190151 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:50:52 +00:00
Daniel Sanders
b9987d1aa1 [mips][msa] Made the operand register sets optional for the 3RF_4RF format
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190150 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:44:13 +00:00
Vladimir Medic
bf7f7b5e0e This patch adds support for microMIPS Move Conditional instructions. Test cases are included in patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190148 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:41:17 +00:00
Tim Northover
a5eeb9da05 SelectionDAG: create correct BooleanContent constants
Occasionally DAGCombiner can spot that a SETCC operation is completely
redundant and reduce it to "all true" or "all false". If this happens to a
vector, the value produced has to take account of what a normal comparison
would have produced, which may be an all-1s bitmask.

The fix in SelectionDAG.cpp is tested, however, as far as I can see the code in
TargetLowering.cpp is possibly unreachable and almost certainly irrelevant when
triggered so there are no tests. However, I believe it's still clearly the
right change and may save someone else some hassle if it suddenly becomes
reachable. So I'm doing it anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190147 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:38:12 +00:00
Daniel Sanders
888497d8a2 [mips][msa] Made the operand register sets optional for the 3RF formats
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190146 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:32:57 +00:00
Daniel Sanders
6976d75415 [mips][msa] Made the operand register sets optional for the 3R_4R format
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190145 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:30:43 +00:00
Vladimir Medic
a674463aac This patch adds support for microMIPS disassembler and disassembler make check tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190144 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:30:36 +00:00
Daniel Sanders
99d02d1325 [mips][msa] Made the operand register sets optional for the 2RF format
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190143 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:28:13 +00:00
Daniel Sanders
d31c238372 [mips][msa] Made the operand register sets optional for the I8 format
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190142 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:25:47 +00:00
Daniel Sanders
7d3da67611 [mips][msa] Made the operand register sets optional for the I5 and SI5 formats
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:23:19 +00:00
Daniel Sanders
bfb9bab243 [mips][msa] Made the operand register sets optional for the BIT_[BHWD] formats
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190140 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 12:10:24 +00:00
Richard Sandiford
aff1c6427c [SystemZ] Tweak integer comparison code
The architecture has many comparison instructions, including some that
extend one of the operands.  The signed comparison instructions use sign
extensions and the unsigned comparison instructions use zero extensions.
In cases where we had a free choice between signed or unsigned comparisons,
we were trying to decide at lowering time which would best fit the available
instructions, taking things like extension type into account.  The code
to do that was getting increasingly hairy and was also making some bad
decisions.  E.g. when comparing the result of two LLCs, it is better to use
CR rather than CLR, since CR can be fused with a branch while CLR can't.

This patch removes the lowering code and instead adds an operand to
integer comparisons to say whether signed comparison is required,
whether unsigned comparison is required, or whether either is OK.
We can then leave the choice of instruction up to the normal isel code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190138 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 11:51:39 +00:00
Daniel Sanders
e3273b3275 [mips][msa] Sorted MSA_BIT_[BHWD]_DESC_BASE into ascending order of element size
No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190134 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 11:01:38 +00:00
Daniel Sanders
cc538affd2 [mips][msa] Made the operand register sets optional for the 3R format
Their default is to be the same as the result register set.

No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190133 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 10:59:24 +00:00
Daniel Sanders
3f1acd55a8 [mips][msa] Made the InstrItinClass argument optional since it is always NoItinerary at the moment.
No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190131 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 10:55:15 +00:00
Richard Sandiford
867f9501f6 [SystemZ] Use XC for a memset of 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 10:25:07 +00:00
Matt Arsenault
4598bd53ab Use type helper functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 00:37:24 +00:00
Matt Arsenault
ce8e4647bf Teach CodeGenPrepare about address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190112 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 00:18:43 +00:00
Tom Stellard
c3b5c042a4 R600: Coding style
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190110 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 23:55:13 +00:00
Juergen Ributzka
d7174719a9 [X86] Perform VSELECT DAG combines also before DAG type legalization.
If the DAG already has only legal types, then the second round of DAG combines
is skipped. In this case VSELECT+SETCC patterns that match a more efficient
instruction (e.g. min/max) are never recognized.

This fix allows VSELECT+SETCC combines if the types are already legal before DAG
type legalization.

Reviewer: Nadav

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190105 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 23:02:56 +00:00
Kevin Enderby
d8e2f1757d Fixed a crash in the integrated assembler for Mach-O when a symbol difference
expression uses an assembler temporary symbol from an assignment.  In this case
the symbol does not have a fragment so the use of getFragment() would be NULL
and caused a crash. In the case of an assembler temporary symbol we want to use
the AliasedSymbol (if any) which will create a local relocation entry, but if
it is not an assembler temporary symbol then let it use that symbol with an
external relocation entry.

rdar://9356266


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190096 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 20:25:06 +00:00
Matt Arsenault
596aa123f4 Consistently use dbgs() in debug printing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190093 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 19:48:28 +00:00
Matt Arsenault
3987e532f7 R600: Fix i64 to i32 trunc on SI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190091 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 19:41:10 +00:00
Rafael Espindola
466fa17aba Remove unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190090 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 19:15:21 +00:00
Yunzhong Gao
ed119820f2 Improve handling of .file, .include and .incbin directives to
allow escaped octal character sequences.

The patch was discussed in Phabricator. See:
http://llvm-reviews.chandlerc.com/D1289



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190089 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 19:14:26 +00:00
Manman Ren
bc66071baa Debug Info: Use identifier to reference DIType in base type field of
ptr_to_member.

We introduce a new class DITypeRef that represents a reference to a DIType.
It wraps around a Value*, which can be either an identifier in MDString
or an actual MDNode. The class has a helper function "resolve" that
finds the actual MDNode for a given DITypeRef.

We specialize getFieldAs to return a field that is a reference to a
DIType. To correctly access the base type field of ptr_to_member,
getClassType now calls getFieldAs<DITypeRef> to return a DITypeRef.

Also add a typedef for DITypeIdentifierMap and a helper
generateDITypeIdentifierMap in DebugInfo.h. In DwarfDebug.cpp, we keep
a DITypeIdentifierMap and call generateDITypeIdentifierMap to actually
populate the map.

Verifier is updated accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190081 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 18:48:31 +00:00
Tom Stellard
79916948e1 R600: Add support for local memory atomic add
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190080 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 18:38:09 +00:00
Tom Stellard
756f382ac1 R600: Expand SELECT nodes rather than custom lowering them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190079 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 18:38:03 +00:00
Tom Stellard
470c451574 R600: Fix incorrect LDS size calculation
GlobalAdderss nodes that appeared in more than one basic block were
being counted twice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190078 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 18:37:57 +00:00
Tom Stellard
402b8e2175 R600/SI: Don't emit S_WQM_B64 instruction for compute shaders
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190077 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 18:37:52 +00:00
Tom Stellard
791cdd5fe0 R600: Fix segfault in R600TextureIntrinsicReplacer
This pass was segfaulting when it ran into a non-intrinsic function
call.  Function calls are not supported, so now instead of segfaulting,
we will get an assertion failure with a nice error message.

I'm not sure how to test this using lit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190076 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 18:37:45 +00:00
Eric Christopher
577056f89c Move accelerator table defines and constants to Dwarf.h since
we're proposing it for DWARF5.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190074 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 18:20:16 +00:00
Eric Christopher
5b9544b526 Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190064 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 16:46:43 +00:00
Joey Gouly
4897151df6 [ARMv8] Implement the new DMB/DSB operands.
This removes the custom ISD Node: MEMBARRIER and replaces it
with an intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 15:35:24 +00:00
Richard Barton
b5523ce1bb Add AArch32 DCPS{1,2,3} and HLT instructions.
These were pretty straightforward instructions, with some assembly support
required for HLT.

The ARM assembler is keen to split the instruction mnemonic into a
(non-existent) 'H' instruction with the LT condition code. An exception for
HLT is needed.

HLT follows the same rules as BKPT when in IT blocks, so the special BKPT
hadling code has been adapted to handle HLT also.

Regression tests added including diagnostic tests for out of range immediates
and illegal condition codes, as well as negative tests for pre-ARMv8.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190053 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 14:14:19 +00:00
Tilmann Scheller
8f3d54d057 Reverting 190043 for now.
Solution is not sufficient to prevent 'mov pc, lr' being emitted for jump table code.
Test case doesn't trigger the added functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190047 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 11:59:43 +00:00
Tilmann Scheller
10b5086e6e ARM: Add GPR register class excluding LR for use with the ADR instruction.
This improves code generation for jump tables by avoiding the emission of "mov pc, lr" which could fool the processor into believing this is a return from a function causing mispredicts. The code generation logic for jump tables uses ADR to materialize the address of the jump target.

Patch by Daniel Stewart!
   


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190043 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 11:10:31 +00:00
Richard Sandiford
16277c4698 [SystemZ] Add NC, OC and XC
For now these are just used to handle scalar ANDs, ORs and XORs in which
all operands are memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 10:36:45 +00:00
Nick Lewycky
a83aeae350 Declare missing dependency on AliasAnalysis. Patch by Liu Xin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190035 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 08:19:58 +00:00
Venkatraman Govindaraju
1b41835f02 [Sparc] Correctly handle call to functions with ReturnsTwice attribute.
In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores
the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7)
using the stored %fp and register windows. However, this does not guarantee that the longjmp
will restore the registers, as they were when the setjmp was called. This is because these
registers may be clobbered after returning from setjmp, but before calling longjmp.

This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190033 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 05:32:16 +00:00
Bill Wendling
d6d2ef1582 Fix comments to reflect reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190021 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 00:54:52 +00:00
Eric Christopher
edc8e7b4ff Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190019 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-05 00:22:35 +00:00
Andrew Trick
d4486ebd5f mi-sched: Force bottom up scheduling for generic targets.
Fast register pressure tracking currently only takes effect during
bottom up scheduling. Forcing this is a bit faster and simpler for
targets that don't have many scheduling constraints and don't need
top-down scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 23:54:00 +00:00
Nick Kledzik
a38c27be0f Add names for mach-o permissions bits and use the symbol names in place of magic numbers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190013 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 23:53:44 +00:00
Bill Wendling
19f066e0e0 Add missing header line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190004 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 22:35:41 +00:00
Bill Wendling
9e4bd87f47 Use ArrayRef instead of explicit container.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190003 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 22:35:29 +00:00
Eric Christopher
efc47ec528 Remove hack ensuring that darwin didn't produce dwarf > 3 for modules
without a limiting factor.

Update all testcases accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190002 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 22:21:24 +00:00
Eric Christopher
6509593cb6 Revert "Revert r189902 as the workaround shouldn't be necessary anymore."
Needs testcase updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190000 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:36:52 +00:00
Eric Christopher
a42c7d5db1 Revert r189902 as the workaround shouldn't be necessary anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:26:56 +00:00
Andrew Trick
3d6e70c857 comment typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189997 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:12:05 +00:00
Andrew Trick
ba9ec8ce80 Remove dead subtree limit code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189995 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:00:20 +00:00
Andrew Trick
da9f441854 -view-misched-dags, better pruning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189994 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:00:18 +00:00
Andrew Trick
ee5fd9cf10 mi-sched: DEBUG cleanup, call tracePick for unidirectional scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189993 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:00:16 +00:00
Andrew Trick
85d7f0be78 80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189992 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:00:13 +00:00
Andrew Trick
16bb45c5c8 mi-sched: Suppress register pressure tracking when the scheduling window is too small.
If the instruction window is < NumRegs/2, pressure tracking is not
likely to be effective. The scheduler has to process a very large
number of tiny blocks. We want this to be fast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:00:11 +00:00
Andrew Trick
d1d0d37a19 mi-sched: Load clustering is a bit to expensive to enable unconditionally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189990 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:00:08 +00:00
Andrew Trick
00b5fa4c28 mi-sched: Reuse an invalid HazardRecognizer to save compile time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189989 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:00:05 +00:00
Andrew Trick
40b52bb8f2 mi-sched: bypass heuristic checks when regpressure tracking is disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 21:00:02 +00:00
Andrew Trick
42ebb3ad41 Added -misched-regpressure option.
Register pressure tracking is half the complexity of the
scheduler. It's useful to be able to turn it off for compile time and
performance comparisons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189987 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 20:59:59 +00:00
Rafael Espindola
775079c227 Rename some variables to match the style guide.
I am about to patch this code, and this makes the diff far more readable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189982 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 20:08:46 +00:00
Vincent Lejeune
f94eea9e11 R600: Use shared op optimization when checking cycle compatibility
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189981 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 19:53:54 +00:00
Vincent Lejeune
bb25a01d23 R600: Non vector only instruction can be scheduled on trans unit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189980 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 19:53:46 +00:00
Vincent Lejeune
b3df27d440 R600: Use SchedModel enum for is{Trans,Vector}Only functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189979 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 19:53:30 +00:00
Eric Christopher
4dc211ae39 Unify and clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189977 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 19:53:21 +00:00
Jim Grosbach
1bfa80359e ARM: Teach A15 SDOptimizer to properly handle D-reg by-lane.
These instructions, such as vmul.f32, require the second source operand to
be in D0-D15 rather than the full D0-D31. When optimizing, make sure to
account for that by constraining the register class of a replacement virtual
register to be compatible with the virtual register(s) it's replacing.

I've been unsuccessful in creating a non-fragile regression test. This issue
was detected by the LLVM nightly test suite running on an A15 (Bullet).

PR17093: http://llvm.org/bugs/show_bug.cgi?id=17093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189972 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 19:08:44 +00:00
Rafael Espindola
1d7df349ab Small simplification given that insert of an empty range is a nop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189971 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 18:53:21 +00:00
Rafael Espindola
0fb771667e Refactor duplicated logic to a helper function.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189969 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 18:37:36 +00:00
Rafael Espindola
8b08904e6c Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 18:16:02 +00:00
Arnold Schwaighofer
3d476a80e9 Swift: Only build vldm/vstm with q register aligned register lists
Unaligned vldm/vstm need more uops and therefore are slower in general on swift.

radar://14522102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189961 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 17:41:16 +00:00
Silviu Baranga
87b120690b Fix scheduling for vldm/vstm instructions that load/store more than 32 bytes on Cortex-A9. This also makes the existing code more compact.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189958 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 17:05:18 +00:00
Rafael Espindola
9718158222 Revert "Add r159136 back now that pr13124 has been fixed."
This reverts commit r189886.

I found a corner case where this optimization is not valid:

Say we have a "linkonce_odr unnamed_addr" in two translation units:
* In TU 1 this optimization kicks in and makes it hidden.
* In TU 2 it gets const merged with a constant that is *not* unnamed_addr,
  resulting in a non unnamed_addr constant with default visibility.
* The static linker rules for combining visibility them produce a hidden
  symbol, which is incorrect from the point of view of the non unnamed_addr
  constant.

The one place we can do this is when we know that the symbol is not used from
another TU in the same shared object, i.e., during LTO. I will move it there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189954 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 16:09:01 +00:00
Alexander Kornienko
280e5eef43 Move generic isPrint and columnWidth implementations to a separate header/source to allow using both generic and system-dependent versions on win32.
Summary:
This is needed so we can use generic columnWidthUTF8 in clang-format on
win32 simultaneously with a separate system-dependent implementations of
isPrint/columnWidth in TextDiagnostic.cpp to avoid attempts to print Unicode
characters using narrow-character interfaces (which is not supported on Windows,
and we'll have to figure out how to handle this).

Reviewers: jordan_rose

Reviewed By: jordan_rose

CC: llvm-commits, klimek

Differential Revision: http://llvm-reviews.chandlerc.com/D1559

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189952 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 16:00:12 +00:00
Rafael Espindola
9127334dad Error on linking appending globals with different unnamed_addr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189950 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 15:33:34 +00:00
Venkatraman Govindaraju
bf34f34642 [Sparc] Fix an assertion failure while lowering fcmp on long double.
This assertion is triggered because an integer constant is created with wrong
  type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189948 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 15:15:20 +00:00
Rafael Espindola
6947f10ec4 Fix linking of unnamed_addr in functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189945 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 14:59:03 +00:00
NAKAMURA Takumi
16eedf0ba0 Support/Process: Add comments about PageSize and AllocationGranularity on Cygwin and Win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 14:12:26 +00:00
NAKAMURA Takumi
81b135cc1e MemoryBuffer.cpp: Don't peek the next page if file is multiple of *physical* pagesize(4k) but is not multiple of AllocationGranularity(64k), when a null terminator is required, on cygwin and win32.
For example, r189780's SparcISelLowering.cpp has the size 98304. It crashed clang to touch a null terminator on cygwin.

FIXME: It's not good to hardcode 4096 here. dwPageSize shows 4096.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 14:12:19 +00:00
NAKAMURA Takumi
a53ee67e5e Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189938 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 14:12:12 +00:00
Rafael Espindola
3acfb58b17 Fix linking of unnamed_addr.
This was regression from r134829. When linking we have to be conservative. If
one of the symbols has a significant address, then the result should have it
too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189935 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 14:05:09 +00:00
Tim Northover
0415b1810b InstCombine: allow unmasked icmps to be combined with logical ops
"(icmp op i8 A, B)" is equivalent to "(icmp op i8 (A & 0xff), B)" as a
degenerate case. Allowing this as a "masked" comparison when analysing "(icmp)
&/| (icmp)" allows us to combine them in more cases.

rdar://problem/7625728

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189931 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 11:57:17 +00:00
Tim Northover
7bfabdac4e InstCombine: look for masked compares with subset relation
Even in cases which aren't universally optimisable like "(A & B) != 0 && (A &
C) != 0", the masks can make one of the comparisons completely redundant. In
this case, since we've gone to the effort of spotting masked comparisons we
should combine them.

rdar://problem/7625728

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189930 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 11:57:13 +00:00
Hao Liu
19fdc268c3 Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:
sshr,ushr,ssra,usra,srshr,urshr,srsra,ursra,sri,shl,sli,sqshlu,sqshl,uqshl,shrn,sqrshrun,sqshrn,uqshr,sqrshrn,uqrshrn,sshll,ushll
 and 4 convert instructions:
      scvtf,ucvtf,fcvtzs,fcvtzu


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189925 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 09:28:24 +00:00
Michael Gottesman
dc42d031fb Revert "Revert "Remove the darwin gdb option, that version of gdb is now dead and the rest of the compatibility should be done on a dwarf-N level.""
This reverts commit r189913.

Talked with Eric on IRC. I am going to XFAIL the failing test since it
is using what Eric described as "the member hack" which was needed on
that old GDB.

Sorry for the noise!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 04:39:38 +00:00
Michael Gottesman
14ce9f1d25 Revert "Remove the darwin gdb option, that version of gdb is now dead and the rest of the compatibility should be done on a dwarf-N level."
This reverts commit r189903.

This commit broke the phase 1 buildbot for a while.

http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-nobootstrap-RAincremental/builds/6684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189913 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 04:31:56 +00:00
Michael Gottesman
c15c64fbeb Add llvm namespace to llvm::next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 04:26:09 +00:00
Michael Gottesman
30955e9afb Use llvm::next() instead of incrementing begin iterators of std::vector.
Iterator of std::vector may be implemented as a raw pointer. In
this case begin iterators are rvalues and cannot be incremented.
For example, this is the case with STDCXX implementation of vector.

Patch by Konstantin Tokarev <annulen@yandex.ru>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 04:19:01 +00:00
Eric Christopher
0a69049b62 Remove the darwin gdb option, that version of gdb is now dead and
the rest of the compatibility should be done on a dwarf-N level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189903 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 02:02:10 +00:00
Eric Christopher
04031a6c22 Make the default dwarf version 3 for darwin when we can't find one
in the module. Add a FIXME with a comment about darwin's ld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189902 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-04 01:38:30 +00:00
Rafael Espindola
79869ee59a Add r159136 back now that pr13124 has been fixed.
Original message:
If a constant or a function has linkonce_odr linkage and unnamed_addr, mark
hidden. Being linkonce_odr guarantees that it is available in every dso that
needs it. Being a constant/function with unnamed_addr guarantees that the
copies don't have to be merged.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 23:34:36 +00:00
Jim Grosbach
36b00f394f X86: Mark non-crashing report_fatal_errors() as such.
Previously, the clang crash handling code would kick in and give a crash
report for these, even though they're not that sort of error.

rdar://14882264

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189878 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 23:02:00 +00:00
Michael Gottesman
be0857051f [objc-arc] Remove dead code from previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 22:40:56 +00:00
Michael Gottesman
72196ab082 [objc-arc] Turn off the objc_retainBlock -> objc_retain optimization.
The reason that I am turning off this optimization is that there is an
additional case where a block can escape that has come up. Specifically, this
occurs when a block is used in a scope outside of its current scope.

This can cause a captured retainable object pointer whose life is preserved by
the objc_retainBlock to be deallocated before the block is invoked.

An example of the code needed to trigger the bug is:

----
\#import <Foundation/Foundation.h>
int main(int argc, const char * argv[]) {
  void (^somethingToDoLater)();

  {
    NSObject *obj = [NSObject new];

    somethingToDoLater = ^{
      [obj self]; // Crashes here
    };
  }

  NSLog(@"test.");

  somethingToDoLater();
  return 0;
}
----

In the next commit, I remove all the dead code that results from this.

Once I put in the fixing commit I will bring back the tests that I deleted in
this commit.

rdar://14802782.
rdar://14868830.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189869 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 22:40:54 +00:00
Eric Christopher
800a876128 Add a hashing routine that handles hashing types. Add a test for
hashing the contents of DW_FORM_data1 on top of a type with attributes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189862 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 21:57:57 +00:00
Eric Christopher
41627cf813 Sentences end with periods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189861 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 21:57:50 +00:00
Nadav Rotem
7b15c0afc1 Enable late-vectorization by default.
This patch changes the default setting for the LateVectorization flag that controls where the loop-vectorizer is ran.

Perf gains:
SingleSource/Benchmarks/Shootout/matrix -37.33%
MultiSource/Benchmarks/PAQ8p/paq8p  -22.83%
SingleSource/Benchmarks/Linpack/linpack-pc  -16.22%
SingleSource/Benchmarks/Shootout-C++/ary3 -15.16%
MultiSource/Benchmarks/TSVC/NodeSplitting-flt/NodeSplitting-flt -10.34%
MultiSource/Benchmarks/TSVC/NodeSplitting-dbl/NodeSplitting-dbl -7.12%

Regressions:
SingleSource/Benchmarks/Misc/lowercase  15.10%
MultiSource/Benchmarks/TSVC/Equivalencing-flt/Equivalencing-flt 13.18%
SingleSource/Benchmarks/Shootout-C++/matrix 8.27%
SingleSource/Benchmarks/CoyoteBench/lpbench 7.30%



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189858 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 21:33:17 +00:00
Matt Arsenault
330943afb7 Teach InstCombineLoadCast about address spaces.
This is another one that doesn't matter much,
but uses the right GEP index types in the first
place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189854 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 21:05:48 +00:00
Matt Arsenault
aa31d35dc7 Use type form of getIntPtrType in alloca visitor.
This doesn't actually matter, since alloca is always
0 address space, but this is more consistent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 21:05:15 +00:00
Bill Wendling
b9daaa02a2 WIP: Refactor some code so that it can be called by more than just one method. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189849 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 20:59:07 +00:00
Jim Grosbach
b81d7a8912 Revert "Revert "ARM: Improve pattern for isel mul of vector by scalar.""
This reverts commit r189648.

Fixes for the previously failing clang-side arm_neon_intrinsics test
cases will be checked in separately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189841 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 20:08:17 +00:00
Eric Christopher
bd18c8d090 Add the rest of the stock attributes to the attribute table.
This won't affect the kinds of hashes we test for as we actually
do hashing based on form and attribute. Change the fission-hash
testcase one last time to handle DW_AT_comp_dir.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189840 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 20:00:20 +00:00
Yi Jiang
89008539a3 In this patch we are trying to do two things:
1) If the width of vectorization list candidate is bigger than vector reg width, we will break it down to fit the vector reg.
2) We do not vectorize the width which is not power of two.

The performance result shows it will help some spec benchmarks. mesa improved 6.97% and ammp improved 1.54%. 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189830 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 17:26:04 +00:00
Richard Sandiford
8bce43648b [SystemZ] Add support for TMHH, TMHL, TMLH and TMLL
For now this just handles simple comparisons of an ANDed value with zero.
The CC value provides enough information to do any comparison for a
2-bit mask, and some nonzero comparisons with more populated masks,
but that's all future work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189819 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 15:38:35 +00:00
Evgeniy Stepanov
69086b2962 [msan] Fix handling of select with struct arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189796 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 13:05:29 +00:00
Evgeniy Stepanov
6a9b29ec9b [msan] Fix select instrumentation.
Select condition shadow was being ignored resulting in false negatives.
This change OR-s sign-extended condition shadow into the result shadow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189785 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 10:04:11 +00:00
Venkatraman Govindaraju
75ddb2bb34 [Sparc] Add support for soft long double (fp128).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189780 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 04:11:59 +00:00
Craig Topper
4ccfbedaed Add hadSideEffects=0 to some instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189779 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-03 03:56:17 +00:00
Venkatraman Govindaraju
6ee0857bd7 [Sparc] Implement spill and load for long double(f128) registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189768 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 18:32:45 +00:00
Tilmann Scheller
195dd8a1ce ARM: Default to the Swift CPU when targeting armv7s/thumbv7s.
Test cases adjusted accordingly.

This fixes rdar://14871821.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189766 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 17:09:01 +00:00
Tilmann Scheller
5bed440eb1 Revert 189756 for now, it doesn't match what rdar://14871821 really wants.
What we really want is to enable Swift by default for *v7s triples (and there already seems to be some logic which attempts to do that). In that case the iOS version doesn't matter. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189763 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 15:48:17 +00:00
Tilmann Scheller
024e76b69b ARM: Default to Swift when compiling for iOS 6 or later.
Test cases adjusted accordingly.

This fixes rdar://14871821.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189756 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 12:01:58 +00:00
Craig Topper
69c474ffa8 Create BEXTR instructions for (and ((sra or srl) x, imm), (2**size - 1)). Fixes PR17028.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189742 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 07:53:17 +00:00
Elena Demikhovsky
da0ce6eb8b AVX-512: updated the list of high-latency instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189740 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 07:41:01 +00:00
Elena Demikhovsky
cafcc99857 AVX-512: gather-scatter tests; added foldable instructions;
Specify GATHER/SCATTER as heavy instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189736 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 07:12:29 +00:00
Elena Demikhovsky
4ca0ce2594 llvm interpreter: select, shuffle and insertelement instructions.
This patch implements vector support for  select instruction and adds specific vector instructions : shuffle and insertelement. (tests are also included)
and functions lle_X_memset, lle_X_memcpy added.

Done by Veselov, Yuri (mailto:Yuri.Veselov@intel.com)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189735 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 06:40:09 +00:00
Chandler Carruth
ca6ead9f3f Fix some rather confusing indentation and control flow in the errno
printing routine. This is made harder to see due to the surprising
formatting, inconsistent brace usage, and repeated conditions that all
test the same thing.

The only "consequence" of this bug is re-assigning 'str' to an empty
string when computing the error string for an error number of 0 in the
event of a non-GNU strerror_r routine. So, nothing to see here other
than cleanup. It did help me find PR17055 in clang-format though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189734 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-02 05:55:10 +00:00
Elena Demikhovsky
6adcd58d3c AVX-512: Added GATHER and SCATTER instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189729 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-01 14:24:41 +00:00