6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-04 06:09:05 +00:00
Code Issues Projects Releases Wiki Activity
76,900 Commits 39 Branches 0 Tags 277 MiB
d0851aae51
Commit Graph

76900 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Eric Christopher
d0851aae51 Make this use a public accessor too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141752 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 00:38:05 +00:00
Nick Lewycky
865703e53a Add missing space. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141750 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 00:14:31 +00:00
Nick Lewycky
1f9c6860bf Fix indent in comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141749 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 00:14:12 +00:00
Evan Cheng
7efba85d41 Fix r141744. 
1. The speculation check may not have been performed if the BB hasn't had a load
   LICM candidate.
2. If the candidate would be CSE'ed, then go ahead and speculatively LICM the
   instruction even if it's in high register pressure situation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 00:09:14 +00:00
Jakob Stoklund Olesen
1c062c24ab Fix -widen-vmovs liveness issues. 
When widening a copy, we are reading a larger register that may not be
live.  Use an <undef> flag to tell the register scavenger and machine
code verifier that we know the value isn't defined.

We now widen:

  %S6<def> = COPY %S4<kill>, %D3<imp-def>

into:

  %D3<def> = VMOVD %D2<undef>, pred:14, pred:%noreg, %S4<imp-use,kill>

This also keeps the <kill> flag on %S4 so we don't inadvertently kill a
live value in %S5.

Finally, ensure that ARMBaseInstrInfo::setExecutionDomain() preserves
the <undef> flag when converting VMOVD to VORR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141746 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 00:06:23 +00:00
Evan Cheng
fad6287488 Refine r141689 with a tri-state variable. 
Also teach MachineLICM to avoid "speculation" when register pressure is high.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141744 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:48:44 +00:00
Akira Hatanaka
80eb994929 Change name of class to ArithOverflowR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141743 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:43:48 +00:00
Akira Hatanaka
2dfd3a9789 Define class ArithLogicI. Make 32-bit and 64-bit arithmetic and logical 
instructions with two register operands derive from it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141742 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:38:52 +00:00
Bob Wilson
b75e5d96dd Make this test more specific. There are 3 stats that matched "machine-licm". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141741 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:34:31 +00:00
Eric Christopher
3c43b48fa9 Use public accessors on the scope that is returned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:19:35 +00:00
Akira Hatanaka
76d9f1c022 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141737 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:12:12 +00:00
Akira Hatanaka
c2f3ac9de2 Define classes ArithLogicR and ArithLogicOfR and make 32-bit and 64-bit 
arithmetic and logical instructions with three register operands derive from
them. Fix instruction encoding too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141736 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:05:46 +00:00
Chris Lattner
e4617b0280 target data is a contract with the code generator, not the "processor" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141734 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:02:17 +00:00
Chris Lattner
6509f50c69 improve some of the documentation around target data layout strings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141733 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 23:01:39 +00:00
Eric Christopher
6618a241f7 Add a new wrapper node for a DILexicalBlock that encapsulates it and a 
file. Since it should only be used when necessary propagate it through
the backend code generation and tweak testcases accordingly.

This helps with code like in clang's test/CodeGen/debug-info-line.c where
we have multiple #line directives within a single lexical block and want
to generate only a single block that contains each file change.

Part of rdar://10246360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141729 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 22:59:11 +00:00
Eric Christopher
5ba7b501fd Formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141728 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 22:59:04 +00:00
Eric Christopher
0f691977d7 Spacing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141727 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 22:58:58 +00:00
Bill Wendling
c83693f5b0 N.B. This is with the new EH scheme: 
The blocks with invokes have branches to the dispatch block, because that more
correctly models the behavior of the CFG. The dispatch of course has edges to
the landing pads. Those landing pads could contain invokes, which then have
branches back to the dispatch. This creates a loop. The machine LICM pass looks
at this loop and thinks it can hoist elements out of it. But because the
dispatch is an alternate entry point into the program, the hoisted instructions
won't be executed.

I wasn't able to get a testcase which was small and could reproduce all of the
time. The function_try_block.cpp in llvm-test was where this showed up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141726 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 22:42:31 +00:00
Akira Hatanaka
68ad5673e8 Fix function isUnalignedLoadStore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 22:04:01 +00:00
Jim Grosbach
2bd0118472 ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions. 
Fill out the rest of the encoding information, update to properly mark
the LDC/STC instructions as predicable while the LDC2/STC2 instructions are
not, and adjust the parser accordingly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141721 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:55:36 +00:00
Akira Hatanaka
d8212b2916 Remove unused PatLeaf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141720 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:53:08 +00:00
Akira Hatanaka
7cc037a137 Change the names of 64-bit logical instructions so that they match the names of 
the real instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141718 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:48:01 +00:00
Bill Wendling
e575499d83 Revert r141529. This is causing failures in the test-suite, like bigstack and ReedSolomon. Boo... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141716 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:40:47 +00:00
Akira Hatanaka
395d76c5a3 Remove redundancy in setcc patterns using multiclass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141715 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:40:01 +00:00
Cameron Zwarich
c055a8782e Fix PR11106 by correcting a typo that has been in the code for over a year. This 
would have never worked, since the element type of a vector type is never a
vector type. Also fix the conditional to be more direct in checking whether
EltTy is a vector type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141713 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 21:26:40 +00:00
Akira Hatanaka
b07a3d6897 Use sltiu instead of sltu when a register operand and immediate are compared. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141708 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 20:44:43 +00:00
Jim Grosbach
fbab2206cf Update test for r141704. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 20:18:50 +00:00
Jim Grosbach
2cf8dd384e ARM addressing mode cleanup for LDC/STC. 
We parse at least some forms of the instructions now. Encoding is
pretty screwed up, still, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141704 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 20:17:35 +00:00
Daniel Dunbar
2c607b665d Clean up a few references to System/. We still have docs/SystemLibrary.html 
lying around...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141703 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 20:02:52 +00:00
Daniel Dunbar
b5e8bc1fac Support/DataTypes.h: Clean up some types and add matching (but presumably 
unused) code from .cmake to DataTypes.h.in so that the files are essentially in
sync module differences in autoconf/cmake replacement syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141702 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 20:02:49 +00:00
Eli Friedman
830378f662 Remove extra semicolon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141699 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 19:53:40 +00:00
Akira Hatanaka
06f8231bfb Add patterns for conditional branches with 64-bit register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141696 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 19:09:09 +00:00
Akira Hatanaka
8191f34797 Add support for 64-bit set-on-less-than instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141695 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 18:53:46 +00:00
Akira Hatanaka
3e3427a5c3 Add support for conditional branch instructions with 64-bit register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141694 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 18:49:17 +00:00
Devang Patel
2e35047947 Add dominance check for the instruction being hoisted. 
For example, MachineLICM should not hoist a load that is not guaranteed to be executed.
Radar 10254254.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141689 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 18:09:58 +00:00
Lang Hames
5f119a6237 Fixed docs to reflect the proper default value and behaviour of the natural stack alignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141687 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 17:50:14 +00:00
Owen Anderson
f7c93a3867 Expose MachOObjectFile externally, like we do for COFF. First step in reducing the amount of special-purpose code needed for llvm-objdump. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141684 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 17:32:27 +00:00
Jim Grosbach
57dcb85a30 ARM parse alignment specifier for NEON load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141682 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 17:29:55 +00:00
Duncan Sands
32ee5c2921 Mention the cmake build guide on the main docs page. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141674 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 16:35:07 +00:00
Jim Grosbach
e53c87b302 ARM Rename operand sub-structure 'Mem' to 'Memory' for a bit more clarity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141671 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 15:59:20 +00:00
Nadav Rotem
6fe4e51547 Add support for legalization of vector SHL/SRA/SRL instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141667 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 14:36:35 +00:00
Richard Osborne
6c6f28ffe4 Implement the emitFrameIndexDebugValue and getDebugValueLocation hooks. 
This fixes an assert due to the operands of the DBG_VALUE instruction not
being as expected (PR11105).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141666 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 12:55:35 +00:00
Kalle Raiskila
56354d48bb Fix a iterator out of bounds error, that triggers rarely. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141665 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 12:55:18 +00:00
NAKAMURA Takumi
f048c3fe24 llvm-objdump.cpp: Use PRIx64 as format specifier for int64_t. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141664 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 12:51:50 +00:00
NAKAMURA Takumi
e2aa5d53db Add -D__STDC_FORMAT_MACROS to use PRIx64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141663 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 12:51:44 +00:00
NAKAMURA Takumi
11b8a00a26 cmake/modules/HandleLLVMOptions.cmake: Reorder __STDC_CONSTANT_MACROS and __STDC_LIMIT_MACROS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141662 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 12:51:36 +00:00
Nadav Rotem
884b918c2d Add support for legalization of vector trunc-store where the saved scalar type is illegal (for example, v2i16 on systems where the smallest store size is i32) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141661 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 11:25:16 +00:00
Nadav Rotem
c2b2e1333d Cleanup the trunc-store legalization code and add asserts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141659 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 10:04:25 +00:00
Bill Wendling
eb13b61d3d Update to a newer doxygen version. PR8214. Patch by Jeremy Huddleston. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141657 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 07:25:38 +00:00
Craig Topper
c48b301fb0 Add HasPOPCNT predicate to the POPCNT instructions. Also mark POPCNT as modifying EFLAGS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141656 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 07:13:09 +00:00