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3404 Commits

Author SHA1 Message Date
Devang Patel
e4f3ca4a66 Remove scripts used by TEST=dbg from here. They now live inside llvm test suite. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128425 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-28 20:28:30 +00:00
Duncan Sands
f0bf9dfc1f Partially revert commit 127155: I think it is much more convenient 
to have structured log files rather than one big file produced by
piping output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-27 13:52:32 +00:00
Douglas Gregor
32ce3f944d Extend Clang's TableGen emitter for attributes to support bool arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128330 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-26 03:40:01 +00:00
Duncan Sands
067e2e2adb Useful script for finding regressions in the nightly testsuite. 
I think it was written by Pawel Worach.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128268 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 07:17:44 +00:00
Johnny Chen
ef74e9ab40 delegate the disassembly of t2ADR to the more generic t2ADDri12/t2SUBri12 instructions, and add a test case for that. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128249 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-25 00:17:42 +00:00
Johnny Chen
8c13335c9a The opcode names ("tLDM", "tLDM_UPD") used for conflict resolution have been stale since 
the change to ("tLDMIA", "tLDMIA_UPD").  Update the conflict resolution code and add
test cases for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128247 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 23:42:31 +00:00
Johnny Chen
1090d7711b The ARM disassembler was confused with the 16-bit tSTMIA instruction. 
According to A8.6.189 STM/STMIA/STMEA (Encoding T1), there's only tSTMIA_UPD available.
Ignore tSTMIA for the decoder emitter and add a test case for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128246 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 23:21:14 +00:00
Bruno Cardoso Lopes
505f3cd296 Add asm parsing support w/ testcases for strex/ldrex family of instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128236 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 21:04:58 +00:00
Johnny Chen
e6d69e7dbe ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder was fooled. 
Set the encoding bits to {0,?,?,0}, not 0.  Plus delegate the disassembly of ADR to
the more generic ADDri/SUBri instructions, and add a test case for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128234 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-24 20:42:48 +00:00
Douglas Gregor
095a3f3d30 Update the Clang attribute emitter to handle attributes of 'version' 
kind, and fix serialization/deserialization of IdentifierInfo
attributes. These are requires for the new 'availability' attribute.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128130 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-23 01:05:46 +00:00
Bill Wendling
8a77af8eac Call static functions so that they aren't left unused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128020 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-21 21:08:27 +00:00
Bill Wendling
3ce1b7d514 A WIP commit of the InstAlias printing cleanup. This code will soon replace the 
code below it. Even though it looks very similar, it will match more precisely
and geneate better functions in the long run.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127991 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-21 08:59:17 +00:00
Bill Wendling
4962e61431 Add the IAPrinter class. 
This is a helper class that will make it easier to say which InstAliases can be
printed and which cannot (because of ambiguity).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127990 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-21 08:40:31 +00:00
Bill Wendling
2cf6fc6857 * Add classes that support the "feature" information. 
* Move the code that emits the reg in reg class matching into its own function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127988 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-21 08:31:53 +00:00
Owen Anderson
c9bd496aa2 Thumb2 PC-relative loads require a fixup rather than just an immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127888 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-18 17:42:55 +00:00
NAKAMURA Takumi
d4f4e6ee2c raw_ostream: [PR6745] Tweak formatting (double)%e for Windows hosts. 
On MSVCRT and compatible, output of %e is incompatible to Posix by default. Number of exponent digits should be at least 2. "%+03d"

FIXME: Implement our formatter in future!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127872 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-18 09:30:10 +00:00
NAKAMURA Takumi
8ea2649fda lit/ProgressBar.py: [PR7919] Improve line wrap for XN-incapable terminals. 
On Win32 console, emitting char to col#79 causes linefeed, and the cursor will not return to col#79 upper line with backspace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127696 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 21:07:44 +00:00
Evan Cheng
0f040a258f - Add "Bitcast" target instruction property for instructions which perform 
nothing more than a bitcast.
- Teach tablegen to automatically infer "Bitcast" property.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127667 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 05:09:26 +00:00
Sean Callanan
a21e2eae3d X86 table-generator and disassembler support for the AVX 
instruction set.  This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures.  Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127644 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 01:23:15 +00:00
Owen Anderson
4dd27ebcc2 Ignore isCodeGenOnly instructions when generating diassembly tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127619 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-14 20:58:49 +00:00
Jim Grosbach
0c4d44aa7a Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127592 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-14 17:32:49 +00:00
Francois Pichet
606957fdd6 Correct small comment order typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127575 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-14 02:30:32 +00:00
Jim Grosbach
7d3a16a6f8 Remove no-longer-correct special case for disasm of ARM BL instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127517 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-12 01:05:29 +00:00
Jim Grosbach
72422d38ba Pseudo-ize the ARM 'B' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127510 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 23:24:15 +00:00
Jim Grosbach
3c5edaaf59 Remove dead code. These ARM instruction definitions no longer exist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127509 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 23:15:02 +00:00
Jim Grosbach
5380bbf606 Remove dead code. These ARM instruction definitions no longer exist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127508 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 23:11:41 +00:00
Jim Grosbach
f219f3135d Pseudo-ize VMOVDcc and VMOVScc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127506 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 23:09:50 +00:00
Jim Grosbach
b9cf5f8763 Remove dead code. These ARM instruction definitions don't exist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127491 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:51:07 +00:00
Jim Grosbach
958108ad14 ARM VDUPfd and VDUPfq can just be patterns. The instruction is the same 
as for VDUP32d and VDUP32q, respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127489 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:44:08 +00:00
Jim Grosbach
81bb6551e6 Remove dead code. These ARM instruction definitions don't exist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127488 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:38:18 +00:00
Jim Grosbach
8b8515c225 ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q 
and VDUPLN32d, respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:31:17 +00:00
Jim Grosbach
1558df79b4 ARM VREV64df and VREV64qf can just be patterns. The instruction is the same 
as for VREV64d32 and VREV64q32, respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127485 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:18:05 +00:00
Jim Grosbach
6a44adade2 Add missing 'return on failure'. Previously we'd crash after emitting 
the diagnostic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127480 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 19:52:52 +00:00
Jim Grosbach
4a6d735105 Teach TableGen to pre-calculate register enum values when creating the 
CodeGenRegister entries. Use this information to more intelligently build
the literal register entires in the DAGISel matcher table. Specifically,
use a single-byte OPC_EmitRegister entry for registers with a value of
less than 256 and OPC_EmitRegister2 entry for registers with a larger value.

rdar://9066491



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127456 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 02:19:02 +00:00
Jim Grosbach
17fad045cc Make the register enum value part of the CodeGenRegister struct. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127448 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:33:54 +00:00
Jim Grosbach
510207cb1e Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127447 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:27:24 +00:00
Jim Grosbach
5d4314ef72 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127446 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:19:05 +00:00
Jim Grosbach
7e0e82dcd5 Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127445 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:16:49 +00:00
Jim Grosbach
d4a16ad85d Properly pseudo-ize MOVCCr and MOVCCs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127434 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 23:56:09 +00:00
Jim Grosbach
5e97338c8d Memory barrier instructions don't need special handling in tblgen anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127419 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 19:05:48 +00:00
Stuart Hastings
4cdcb36289 Stop building PPC parts on OSX. Radar 8637926. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127262 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-08 19:28:28 +00:00
NAKAMURA Takumi
78a8295146 Use $(ECHOPATH) to make llvm-lit from llvm-lit.in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127240 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-08 12:25:19 +00:00
Bill Wendling
38e1f88db4 Don't show commands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127224 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-08 08:34:49 +00:00
Bill Wendling
3116dce338 Rename the narrow shift right immediate operands to "shr_imm*" operands. Also 
expand the testing of the narrowing shift right instructions.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127193 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-07 23:38:41 +00:00
Bill Wendling
e7e9a60df6 Don't keep the log files around. Just pipe to a log file instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127155 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-07 07:37:37 +00:00
Jakob Stoklund Olesen
7cefa640de Revert r127073: "Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for alternative of $(ECHO)." 
It broke the llvm-gcc-native-mingw32 buildbot, and we need all of them to be green for the 2.9 branch.

Takumi, please reapply after we branch, preferably with a fix ;-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127107 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-05 18:55:06 +00:00
NAKAMURA Takumi
9869c2f717 utils/lit/lit/TestRunner.py: bash is available with MSYS on Python/W32. Then we can execute "bash tests". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127074 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-05 09:46:53 +00:00
NAKAMURA Takumi
0c3ed6b046 Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for alternative of $(ECHO). 
On mingw and python/w32, lit would not be expected to understand MSYS-style path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127073 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-05 09:46:45 +00:00
NAKAMURA Takumi
2f017cb7f3 On Windows hosts, Python scripts in test/Scripts did not accept binary files from stdin. The environment variable "PYTHONUNBUFFERED" makes stdin as binary. Thanks to Danil Malyshev! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127072 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-05 09:46:36 +00:00
David Greene
b1939d5db6 Fix the case where the number of jobs is less than the 
number of threads.  In that case make the number of threads
equal to the number of jobs and launch one jobs on each
thread.  This makes things work like make -j.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127045 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-04 23:02:52 +00:00