Craig Topper
9564c1e9b8
Remove some errant space charcters in mnemonic strings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-23 06:45:34 +00:00
Craig Topper
1011c13f15
More Intel syntax alias fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186814 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-22 09:58:07 +00:00
Craig Topper
5e08ce288a
Change %xmm0 to XMM0 in Intel side of asm strings for PBLENDVB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186812 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-22 09:22:49 +00:00
Elena Demikhovsky
40e071c1eb
Removed PackedDouble domain from scalar instructions. Added more formats for the scalar stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183626 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-09 07:37:10 +00:00
Michael Liao
9a508ef64a
[PATCH] Fix VGATHER* operand constraints
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Add earlyclobber constaints to prevent input register being allocated as
the output register because, according to Intel spec [1], "If any pair
of the index, mask, or destination registers are the same, this
instruction results a UD fault."
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[1] http://software.intel.com/sites/default/files/319433-014.pdf
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183327 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 18:12:26 +00:00
Elena Demikhovsky
f8cd1ee516
Removed SSEPacked domain from all forms (AVX, SSE, signed, unsigned) scalar compare instructions, like COMISS, COMISD.
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No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182371 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-21 12:04:22 +00:00
Preston Gurd
acccd2edc8
Corrected Atom latencies for SSE SQRT instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181346 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-07 19:57:34 +00:00
Rafael Espindola
dc0981d3e0
Put VMOVPQIto64rr in the VRPDI class.
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Patch by Joshua Magee.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180842 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-01 13:00:16 +00:00
Benjamin Kramer
753981784f
X86: Now that we have a canonical form for vector integer abs, match it into pabs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180600 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26 12:05:21 +00:00
Jakob Stoklund Olesen
b4f60e9f77
Annotate the remaining x86 instructions with SchedRW lists.
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Now all x86 instructions that have itinerary classes also have SchedRW
lists. This is required before the new scheduling models can be used.
There are still unannotated instructions remaining, but they don't have
itinerary classes either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178051 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-26 18:24:22 +00:00
Jakob Stoklund Olesen
68d832a04d
Remove IIC_DEFAULT from X86Schedule.td
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All the instructions tagged with IIC_DEFAULT had nothing in common, and
we already have a NoItineraries class to represent untagged
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177937 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-25 23:12:41 +00:00
Jakob Stoklund Olesen
3c987aead2
Model prefetches and barriers as loads.
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It's not yet clear if these instructions need a more careful model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177599 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-20 23:09:53 +00:00
Jakob Stoklund Olesen
eab5f7678b
Add a catch-all WriteSystem SchedWrite type.
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This is used for all the expensive system instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177598 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-20 23:09:50 +00:00
Jakob Stoklund Olesen
dcb4d349b6
Annotate the remaining SSE MOV instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177592 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-20 22:37:16 +00:00
Jakob Stoklund Olesen
2e9aadda63
Annotate SSE horizontal and integer instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177591 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-20 22:37:13 +00:00
Jakob Stoklund Olesen
279ad470b6
Add some missing SSE annotations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177540 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-20 16:56:39 +00:00
Jakob Stoklund Olesen
361706a718
Annotate various null idioms with SchedRW lists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177461 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-19 23:23:31 +00:00
Jakob Stoklund Olesen
f2914c3b2b
Annotate SSE float conversions with SchedRW lists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177460 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-19 23:23:29 +00:00
Jakob Stoklund Olesen
9beae49622
Add SchedRW annotations to most of X86InstrSSE.td.
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We hitch a ride with the existing OpndItins class that was used to add
instruction itinerary classes in the many multiclasses in this file.
Use the link provided by the X86FoldableSchedWrite.Folded to find the
right SchedWrite for folded loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177326 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-18 22:01:35 +00:00
Nadav Rotem
dd7a300c10
Unaligned loads should use the VMOVUPS opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14 23:49:44 +00:00
Craig Topper
4aee1bb222
Fix inconsistent usage of PALIGN and PALIGNR when referring to the same instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173667 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-28 06:48:25 +00:00
Craig Topper
c2cbcc3acf
Combine AVX and SSE forms of MOVSS and MOVSD into the same multiclasses so they get instantiated together.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172704 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 06:59:42 +00:00
Craig Topper
29344a6349
Simplify nested strconcats in X86 td files since strconcat can take more than 2 arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172379 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-14 07:46:34 +00:00
Craig Topper
33160cf376
Create a single multiclass for SSE and AVX version of MOVL/MOVH. Prevents needing to specify everything twice. No functional change intended
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-14 07:26:58 +00:00
Benjamin Kramer
08219ea2b4
X86: Add patterns for X86ISD::VSEXT in registers.
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Those can occur when something between the sextload and the store is on the same
chain and blocks isel. Fixes PR14887.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172353 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-13 11:37:04 +00:00
Craig Topper
df3bf55d49
Remove unnecessary # tokens at the beginning and end of defm names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171694 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-07 05:04:39 +00:00
Craig Topper
f564a9389d
Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior.
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cvtsi2* should parse with an 'l' or 'q' suffix or no suffix at all. No suffix should be treated the same as 'l' suffix. Printing should always print a suffix. Previously we didn't parse or print an 'l' suffix.
cvtt*2si/cvt*2si should parse with an 'l' or 'q' suffix or not suffix at all. No suffix should use the destination register size to choose encoding. Printing should not print a suffix.
Original 'l' suffix issue with cvtsi2* pointed out by Michael Kuperstein.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171668 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-06 20:39:29 +00:00
Craig Topper
3af9323228
Merge SSE and AVX instruction definitions for scalar forms of SQRT, RSQRT, and RCP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 08:00:39 +00:00
Craig Topper
3cca7df7c7
Merge SSE and AVX instruction definitions for PSHUFD/PSHUFHW/PSHUFLW.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 07:27:49 +00:00
Rafael Espindola
9478673ce0
Revert 171351. It broke MC/X86/x86-32-avx.s.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-02 01:35:11 +00:00
Craig Topper
b511048cd0
Merge SSE and AVX instruction definitions for scalar forms of SQRT, RSQRT, and RCP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171351 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-01 20:53:20 +00:00
Craig Topper
117e4d2e19
Remove unused argument from a multiclass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171340 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-01 03:42:44 +00:00
Craig Topper
76f94fd361
Merge intrinsic instruction definitions for SSE and AVX versions of RCPPS and RSQRTPS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171339 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-01 03:30:21 +00:00
Craig Topper
42ab0d75ab
Remove 2 unused multiclasses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171338 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-01 02:02:45 +00:00
Craig Topper
5284f97632
Merge AVX/SSE instruction definitions for SQRTPS/PD, RSQRTPS, RCPPS. No funcitonal change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171337 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-01 00:11:07 +00:00
Craig Topper
dd9ccdb050
Use packed instead of scalar itineraries for SSE1/2 SQRTPS/PD, RCPPS, and RSQRTPS. VEX-encoded forms already use packed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-31 23:49:05 +00:00
Craig Topper
22d8f0d685
Remove intrinsic specific instructions for (V)SQRTPS/PD. Instead lower to target-independent ISD nodes and use the existing patterns for those.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 18:18:20 +00:00
Craig Topper
6d183e4007
Remove intrinsic specific instructions for SSE/SSE2/AVX floating point max/min instructions. Lower them to target specific nodes and use those patterns instead. This also allows them to be commuted if UnsafeFPMath is enabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29 16:44:25 +00:00
Craig Topper
cccccabd07
Merge basic_sse12_fp_binop_p_int and basic_sse12_fp_binop_p_y_int multiclasses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 22:53:47 +00:00
Craig Topper
d5fc507ff1
Merge basic_sse12_fp_binop_p and basic_sse12_fp_binop_p_y multiclasses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 18:51:50 +00:00
Craig Topper
068aec586d
Add hasSideEffects=0 to some forms of ROUND, RCP, and RSQRT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 07:16:08 +00:00
Craig Topper
d0f28c0958
Move single letter 'P' prefix out of multiclass now that tablegen allows defm to start with #NAME. This makes instruction names more searchable again.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171141 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27 06:34:54 +00:00
Craig Topper
37cb8398c8
Mark all the _REV instructions as not having side effects. They aren't really emitted by the backend, but it reduces the number of instructions in the output files with unmodelled side effects to make auditing easier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 21:30:22 +00:00
Craig Topper
a85cbfeba7
Remove a special conditional setting of neverHasSideEffects if the instruction didn't have a pattern. This was leftover from when tablegen used to complain if things were already inferred from patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 21:04:30 +00:00
Craig Topper
0a5ead92ff
Merge still more SSE/AVX instruction definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 07:54:43 +00:00
Craig Topper
07555fc640
Merge more SSE/AVX instruction definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 07:20:35 +00:00
Craig Topper
755841d9d7
Fix 80 column violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:15:53 +00:00
Craig Topper
6f9d44e072
Fix class name in comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171096 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:15:09 +00:00
Craig Topper
219bc2db1f
Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:14:15 +00:00
Craig Topper
02082efaab
Remove 'v' from mnemonic to fix asm matching failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26 06:02:15 +00:00