Commit Graph

2842 Commits

Author SHA1 Message Date
Evan Cheng
2bd122c4d9 Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free.
e.g.
Turns this loop:
LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
        movw    %dx, %si
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %edi
        movw    %si, (%edi)
        movl    L_Y$non_lazy_ptr, %edi
        movw    %dx, (%edi)
		addw    $4, %dx
		incw    %si
		incl    %ecx
		cmpl    %eax, %ecx
		jne     LBB1_2  # bb
	
into

LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %esi
        movw    %cx, (%esi)
        movl    L_Y$non_lazy_ptr, %esi
        movw    %dx, (%esi)
        addw    $4, %dx
		incl    %ecx
        cmpl    %eax, %ecx
        jne     LBB1_2  # bb


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43375 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-26 01:56:11 +00:00
Dan Gohman
8368805e25 Fix the folding of multiplication into addresses on x86, which was broken
by the recent {U,S}MUL_LOHI changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43230 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 20:22:24 +00:00
Evan Cheng
42b08be973 Fix an unfolding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43212 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 03:03:20 +00:00
Dale Johannesen
61c7ef34e3 Allow for copysign having f80 second argument.
Fixes 5550319.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43205 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-21 01:07:44 +00:00
Evan Cheng
f7c9695a38 Resolve unfold tables ambiguity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43194 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 23:50:58 +00:00
Evan Cheng
66f7163545 Local spiller optimization:
Turn a store folding instruction into a load folding instruction. e.g.
     xorl  %edi, %eax
     movl  %eax, -32(%ebp)
     movl  -36(%ebp), %eax
     orl   %eax, -32(%ebp)
=>
     xorl  %edi, %eax
     orl   -36(%ebp), %eax
     mov   %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 21:23:22 +00:00
Rafael Espindola
5c0d6ed325 Add support for byval function whose argument is not 32 bit aligned.
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset.  I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43172 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 10:41:11 +00:00
Evan Cheng
f0a0cddbcd - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
- Fix some copy+paste bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 21:29:24 +00:00
Christopher Lamb
91ee18c1f7 Fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43144 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 19:28:55 +00:00
Chris Lattner
7ef1a4bf04 Change fp to sint legalization on x86-32 to do 2 x i32
loads instead of 1 x i64 loads.  This doesn't change any functionality yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43068 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-17 06:17:29 +00:00
Chris Lattner
2ff75ee9ab fix some funny indentation, add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43066 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-17 06:02:13 +00:00
Dale Johannesen
c274f54ed8 Check for invalid cc's in f80 select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-16 18:09:08 +00:00
Arnold Schwaighofer
448175fd02 Correction to tail call optimization code. The new return address
was stored to the acutal stack slot before the parameters were
lowered to their stack slot. This could cause arguments to be
overwritten by the return address if the called function had less
parameters than the caller function. The update should remove the
last failing test case of llc-beta: SPASS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43027 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-16 09:05:00 +00:00
Evan Cheng
87c8935fd5 LowerFP_TO_SINT must not create a stack object if it's not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43004 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 20:11:21 +00:00
Evan Cheng
3644601563 Unbreak x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 10:09:39 +00:00
Evan Cheng
347d39f1fd Revert 42908 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 05:57:21 +00:00
Duncan Sands
7fef59f7e5 Clarify that fastcc has a problem with nested function
trampolines, rather than with nested functions themselves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42955 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 07:38:37 +00:00
Evan Cheng
106e8020bd Change unfoldMemoryOperand(). User is now responsible for passing in the
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42946 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 02:35:06 +00:00
Arnold Schwaighofer
92226dd19f Correcting the corrections. Bad bad baaad emacs!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42935 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:53:12 +00:00
Arnold Schwaighofer
48abc5cf6b Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:30:57 +00:00
Duncan Sands
2e4d675d93 Due to the new tail call optimization, trampolines can no
longer be created for fastcc functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42925 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 19:37:31 +00:00
Evan Cheng
1c5d83c14e Update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42922 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 18:22:55 +00:00
Dan Gohman
8ddde0a151 Change the names used for internal labels to use the current
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:53:36 +00:00
Dan Gohman
f0d0089340 Mark vector ctpop, cttz, and ctlz as Expand on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42905 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:09:42 +00:00
Evan Cheng
f4a9c69ff6 Fold load / store into MOV32to32_ and MOV16to16_.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42895 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:38:01 +00:00
Evan Cheng
96aaa54529 Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42894 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 07:55:53 +00:00
Dan Gohman
f96e4de403 Set ISD::FPOW to Expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:21:31 +00:00
Dale Johannesen
83e105c600 Add missing argument to PALIGNR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42874 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 20:58:37 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 19:40:01 +00:00
Dan Gohman
6d60cac029 LowerIntegerDivOrRem no longer exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42787 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 15:45:13 +00:00
Dan Gohman
74f87a63b6 Fix grammar in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42786 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 15:44:37 +00:00
Dan Gohman
5bf88ebab9 This is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42785 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 15:42:21 +00:00
Evan Cheng
b76143cf8f Under 64-bit mode use LEA64_32r instead of LEA64r to save a byte.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42783 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 07:14:53 +00:00
Evan Cheng
3f41d66d75 Bug fix. X86 was emitting redundant setcc and test instructions before a conditional move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42774 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 22:16:29 +00:00
Dan Gohman
525178cdbf Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 18:33:35 +00:00
Evan Cheng
d47c84c1c9 Allow x86 compare to be commutable by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42761 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 18:27:46 +00:00
Chris Lattner
f443ba7f97 disable this entirely: it is causing use of invalidated iterators and infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42739 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07 22:00:31 +00:00
Chris Lattner
eac9385f09 Fix many regressions on x86 by avoiding dereferencing the end iterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42738 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07 21:53:12 +00:00
Anton Korobeynikov
2508372746 Oops, I really wanted to commit this part also :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 16:39:43 +00:00
Anton Korobeynikov
4f1c33f7c8 Move merge code into new helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42699 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 16:17:49 +00:00
Evan Cheng
c231e8c8a5 Added DAG xforms. e.g.
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) 
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 02:46:29 +00:00
Evan Cheng
7ad42d9ec0 Commute x86 cmove instructions by swapping the operands and change the condition
to its inverse.
Testing this as llcbeta


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42661 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 23:13:21 +00:00
Evan Cheng
57cce6c466 This is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 22:34:59 +00:00
Evan Cheng
ecf80ac68a Enable convertToThreeAddress for X86 by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42655 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 22:31:10 +00:00
Evan Cheng
b75ed322c4 INC64_32r -> LEA64_32r is better than INC64_32r -> LEA32r, but it still can
cause performance degradation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42653 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 21:55:32 +00:00
Evan Cheng
559dc46d46 In 64-bit mode, avoid using leal with 32-bit 32-bit address size, e.g.
leal 1(%ecx), %edi, which requires 67H prefix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42647 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 20:34:26 +00:00
Evan Cheng
b952d1f5be Add support to convert more 64-bit instructions to 3-address instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42642 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 18:20:36 +00:00
Evan Cheng
3154cb67d1 ADC and SBB uses EFLAGS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42640 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 17:59:57 +00:00
Dan Gohman
52c0253f04 Change a few more spaces to tabs in assembly output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42638 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 15:58:41 +00:00
Dan Gohman
4e8e831a4e Change a space to a tab in the assembly output of a .globl directive
for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42637 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 15:54:58 +00:00
Evan Cheng
3f411c7627 Testing convertToThreeeAddress as X86 llcbeta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42630 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 08:04:01 +00:00
Evan Cheng
75b4e46b8a Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42624 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:34:55 +00:00
Evan Cheng
afa98bcf3d Not needed any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42623 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:34:14 +00:00
Chris Lattner
87b77b9079 add a note.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42607 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-04 15:47:27 +00:00
Dan Gohman
cb406c2597 Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 19:26:29 +00:00
Chris Lattner
fce5cfe190 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42579 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 17:10:03 +00:00
Chris Lattner
67a1af9709 Bill's example is still not enough to repro this, but it has other issues that
seem significant as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42564 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 03:40:24 +00:00
Bill Wendling
7687bd0b2b Another micro-opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42554 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 21:49:31 +00:00
Bill Wendling
2bb6d459e6 Another missed optimization with LICM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42552 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 21:43:06 +00:00
Bill Wendling
892d392905 Small label changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42549 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 21:02:53 +00:00
Bill Wendling
6dbb1b59ae Now with source code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42548 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 21:01:16 +00:00
Bill Wendling
8d1c8ce3d8 Now with LL code!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42547 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 20:54:32 +00:00
Bill Wendling
6aab4910cd Another missed optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42546 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 20:42:59 +00:00
Bill Wendling
c720279ac7 Micro-optimization -- missed LICM opportunity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42542 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 19:55:05 +00:00
Evan Cheng
7f3394f379 Refactor code to add load / store folded instructions -> register only
instructions reverse map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42509 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-01 23:44:33 +00:00
Evan Cheng
fef922a4d5 Typo. X86comi doesn't read / write chain's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42492 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-01 18:12:48 +00:00
Gordon Henriksen
cd8bc05102 AsmPrinters overriding getAnalysisUsage should call super.
And not super's super, either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-30 13:39:29 +00:00
Evan Cheng
e5f6204cd5 Enabling new condition code modeling scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-29 00:00:36 +00:00
Rafael Espindola
068317bfa3 Refactor the memcpy lowering for the x86 target.
The only generated code difference is that now we call memcpy when
the size of the array is unknown. This matches GCC behavior and is
better since the run time value can be arbitrarily large.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42433 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 12:53:01 +00:00
Evan Cheng
fa00feb7f8 Stop inventing new words. :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42429 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 01:35:02 +00:00
Evan Cheng
8decf6bc18 Pessimisively assume ADJCALLSTACKDOWN / ADJCALLSTACKUP (which becomes sub / add) clobbers EFLAGS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42426 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 01:19:48 +00:00
Dan Gohman
82482944ed TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42419 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-27 23:12:31 +00:00
Evan Cheng
3f2d9ec186 Use GR64 in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42417 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-27 21:50:05 +00:00
Evan Cheng
1ed37fdb3b Doh. Calls clobber EFLAGS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42413 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-27 19:01:55 +00:00
Evan Cheng
ff11026575 - Added MRegisterInfo::getCrossCopyRegClass() hook. For register classes where reg to reg copies are not possible, this returns another register class which registers in the specified register class can be copied to (and copy back from).
- X86 copyRegToReg() now supports copying between EFLAGS and GR32 / GR64 registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42372 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 21:31:07 +00:00
Evan Cheng
bf4f89dc00 Some assemblers do not recognize aliases pushfd, pushfq, popfd, and popfq. Just emit them as pushf and popf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42371 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 21:28:00 +00:00
Dale Johannesen
2f42901dff Enable codegen for long double abs, sin, cos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42368 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 21:10:55 +00:00
Evan Cheng
8d5562be30 Typos: POPQ -> POPFQ, POPD -> POPFD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42348 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:38:29 +00:00
Chris Lattner
1efa1696e3 move PR1160 here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42347 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:29:31 +00:00
Evan Cheng
9efce638d3 Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:25:56 +00:00
Chris Lattner
61001b8bd4 move PR1264 here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42345 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:15:48 +00:00
Evan Cheng
2f245ba572 Add pushf{d|q}, popf{d|q} to push and pop EFLAGS register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42335 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 01:29:06 +00:00
Evan Cheng
1a35edba13 translateX86CC updates the last two operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42333 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 00:45:55 +00:00
Anton Korobeynikov
29be8486e3 Correctly restore stack pointer after realignment in main() on Cygwin/Mingw32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42332 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 00:13:34 +00:00
Evan Cheng
fdd0837448 Missing load / store folding entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42323 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 22:10:43 +00:00
Anton Korobeynikov
2fe1259d0a Partly revert invalid r41774
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 21:52:30 +00:00
Dan Gohman
677ccc6e8b More explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42316 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 20:27:06 +00:00
Dan Gohman
b94fc1bcb2 Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42313 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 19:37:26 +00:00
Evan Cheng
4e4d2d7d9a New style x87 cmp instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42312 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 19:08:02 +00:00
Dan Gohman
a37c9f7506 When both x/y and x%y are needed (x and y both scalar integer), compute
both results with a single div or idiv instruction. This uses new X86ISD
nodes for DIV and IDIV which are introduced during the legalize phase
so that the SelectionDAG's CSE can automatically eliminate redundant
computations.


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2007-09-25 18:23:27 +00:00
Dan Gohman
c3b0b5ca1d Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 15:10:49 +00:00
Evan Cheng
0488db9b99 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
all the kinks are worked out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:57:46 +00:00
Dale Johannesen
48d1e4517e When mixing SSE and x87 codegen, it's possible to
have situations where an SSE instruction turns into
multiple blocks, with the live range of an x87
register crossing them.  To do this correctly make
sure we examine all blocks when inserting
FP_REG_KILL.  PR 1697.  (This was exposed by my
fix for PR 1681, but the same thing could happen
mixing x87 long double with SSE.)



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2007-09-24 22:52:39 +00:00
Dan Gohman
a5a403d766 Add support on x86 for having Legalize lower ISD::LOCATION to ISD::DEBUG_LOC
instead of ISD::LABEL with a manual .debug_line entry when the assembler
supports .file and .loc directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42278 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 21:54:14 +00:00
Dan Gohman
6b5766e27c Fix the syntax for the .loc directive in preparation for using it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42268 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 19:25:06 +00:00
Dan Gohman
5e6e93ecdc The code that used the StartLabelId label was removed, so remove the
code that creates the label too.


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2007-09-24 16:44:26 +00:00
Chris Lattner
9b4baf1692 claim that "st" is from the 80-bit register file. This causes x87-using inline
asm to die with:

ScheduleDAG.cpp:269: failed assertion `false && "Couldn't find the register class"'

instead of:
failed assertion `RegMap->getRegClass(VReg) == RC && "Register class of operand and regclass of use don't agree!"'

yay.



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2007-09-24 05:27:37 +00:00
Dale Johannesen
f1fc3a8fa6 Fix PR 1681. When X86 target uses +sse -sse2,
keep f32 in SSE registers and f64 in x87.  This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42246 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-23 14:52:20 +00:00
Rafael Espindola
a37ac9ff53 Don't add a default STACK_ALIGN (use the generic ABI alignment)
Implement calls to functions with byval arguments on X86


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 15:50:22 +00:00