Commit Graph

34155 Commits

Author SHA1 Message Date
Eli Bendersky
e933e5bd08 Cosmetic cleanups - NFC
Remove commented lines, trailing whitespace, etc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 16:33:21 +00:00
James Y Knight
8eb1aaac9c [SPARC] Cleanup handling of the Y/ASR registers.
- Implement copying ASR to/from GPR regs.
- Mark ASRs as non-allocatable, so it won't try to arbitrarily use
  them inappropriately.
- Instead of inserting explicit WRASR/RDASR nodes in the MUL/DIV
  routines, just do normal register copies.
- Also...mark div as using Y, not just writing it.

Added a test case with some code which previously died with an
assertion failure (with -O0), or produced wrong code (otherwise).

(Third time's the charm?)

Differential Revision: http://reviews.llvm.org/D10401

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241686 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 16:25:12 +00:00
Krzysztof Parzyszek
e7f45f66a7 [Hexagon] Generate "insert" instructions more aggressively
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241683 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 14:47:34 +00:00
Krzysztof Parzyszek
5d447e9c2a Revert 241681: causes Windows builds to fail
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 14:34:13 +00:00
Krzysztof Parzyszek
ea2273d00c [Hexagon] Generate "insert" instructions more aggressively
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241681 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 14:22:27 +00:00
Simon Pilgrim
796a06d4eb [X86][SSE] Added (V)ROUNDSD + (V)ROUNDSS stack folding support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241671 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 08:07:57 +00:00
Mehdi Amini
7bcdaa6978 Remove IsLittleEndian from TargetLowering and redirect to DataLayout
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: llvm-commits, rafael, yaron.keren

Differential Revision: http://reviews.llvm.org/D11017

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241655 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 01:00:38 +00:00
Reid Kleckner
39ee70ca76 [WinEH] Make llvm.x86.seh.restoreframe work for stack realignment prologues
The incoming EBP value points to the end of a local stack allocation, so
we can use that to restore ESI, the base pointer. Once we do that, we
can use local stack allocations. If we know we need stack realignment,
spill the original frame pointer in the prologue and reload it after
restoring ESI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241648 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 23:45:58 +00:00
Reid Kleckner
4fe74caa61 [WinEH] Add localaddress intrinsic instead of using frameaddress
Clang uses this for SEH finally. The new intrinsic will produce the
right value when stack realignment is required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241643 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 23:23:03 +00:00
Arnold Schwaighofer
39fe55270a Add more nvcasts
Tim Northover has told me that they can occur when the compiler cleverly
constructs constants - as demonstrated in the test case.

rdar://21703486

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241641 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 23:13:18 +00:00
Dan Gohman
8ef6f1e24b [WebAssembly] Set the scheduling preference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241637 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 22:38:06 +00:00
Reid Kleckner
8f32e5f0d6 Rename llvm.frameescape and llvm.framerecover to localescape and localrecover
Summary:
Initially, these intrinsics seemed like part of a family of "frame"
related intrinsics, but now I think that's more confusing than helpful.
Initially, the LangRef specified that this would create a new kind of
allocation that would be allocated at a fixed offset from the frame
pointer (EBP/RBP). We ended up dropping that design, and leaving the
stack frame layout alone.

These intrinsics are really about sharing local stack allocations, not
frame pointers. I intend to go further and add an `llvm.localaddress()`
intrinsic that returns whatever register (EBP, ESI, ESP, RBX) is being
used to address locals, which should not be confused with the frame
pointer.

Naming suggestions at this point are welcome, I'm happy to re-run sed.

Reviewers: majnemer, nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11011

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241633 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 22:25:32 +00:00
Sanjay Patel
dd5fd545b1 fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241629 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 21:31:54 +00:00
Arnold Schwaighofer
f869ca86f1 Add a pattern for a nvcast from v2f64 -> v4f32
Since the NvCast is generated by the selection process the concerns about
endianess and bit reversal don't apply.

rdar://21703486

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241611 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 18:31:55 +00:00
Reid Kleckner
d0c71cfdf6 Use default member initializers to deduplicate code in X86MachineFunctionInfo, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241609 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 18:12:06 +00:00
Krzysztof Parzyszek
70bb40bd17 [Hexagon] Fix unused variable warnings in NDEBUG build caused by r241595
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241600 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 16:02:11 +00:00
Reid Kleckner
db38d7657a [WinEH] Add a report_fatal_error for 32-bit stack realignment
This type of prologue isn't supported yet. Implementing it should be a
matter of copying the adjusted incoming EBP into ESI (the base pointer)
instead of EBP.  The original EBP can be saved and restored from other
memory afterwards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241597 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 15:47:29 +00:00
Krzysztof Parzyszek
41e59a6d7b [Hexagon] Implement bit-tracking facility with specifics for Hexagon
This includes code that is intended to be target-independent as well
as the Hexagon-specific details. This is just the framework without
any users.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 15:16:42 +00:00
Sanjay Patel
08c4cbeeae use range-based for loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241592 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 15:03:53 +00:00
Denis Protivensky
2b4a535b70 Fix gcc warnings of different enum and non-enum types in ternaries
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 07:48:48 +00:00
Akira Hatanaka
a744879a65 [ARM] Define a subtarget feature and use it to decide whether long calls should
be emitted.

This is needed to enable ARM long calls for LTO and enable and disable it on a
per-function basis.

Out-of-tree projects currently using EnableARMLongCalls to emit long calls
should start passing "+long-calls" to the feature string (see the changes made
to clang in r241565).

rdar://problem/21529937

Differential Revision: http://reviews.llvm.org/D9364


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241566 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 06:54:42 +00:00
Simon Pilgrim
315fd86400 [X86][AVX] Add support for shuffle decoding of vperm2f128/vperm2i128 with zero'd lanes
The vperm2f128/vperm2i128 shuffle mask decoding was not attempting to deal with shuffles that give zero lanes. This patch fixes this so that the assembly printer can provide shuffle comments.

As this decoder is also used in X86ISelLowering for shuffle combining, I've added an early-out to match existing behaviour. The hope is that we can add zero support in the future, this would allow other ops' decodes (e.g. insertps) to be combined as well.

Differential Revision: http://reviews.llvm.org/D10593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241516 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 22:46:46 +00:00
Sanjay Patel
75a2ce3271 [x86] extend machine combiner reassociation optimization to SSE scalar adds
Extend the reassociation optimization of http://reviews.llvm.org/rL240361 (D10460)
to SSE scalar FP SP adds in addition to AVX scalar FP SP adds.

With the 'switch' in place, we can trivially add other opcodes and test cases in
future patches.

Differential Revision: http://reviews.llvm.org/D10975



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241515 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 22:35:29 +00:00
Simon Pilgrim
6970be03d1 [X86][SSE] Vectorized i64 uniform constant SRA shifts
This patch adds vectorization support for uniform constant i64 arithmetic shift right operators.

Differential Revision: http://reviews.llvm.org/D9645

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241514 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 22:35:19 +00:00
JF Bastien
610992baca WebAssembly: add some TODO
Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D10971

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241513 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 21:41:59 +00:00
Simon Pilgrim
3ecdd44e5d [X86][SSE4A] Shuffle lowering using SSE4A EXTRQ/INSERTQ instructions
This patch adds support for v8i16 and v16i8 shuffle lowering using the immediate versions of the SSE4A EXTRQ and INSERTQ instructions. Although rather limited (they can only act on the lower 64-bits of the source vectors, leave the upper 64-bits of the result vector undefined and don't have VEX encoded variants), the instructions are still useful for the zero extension of any lane (EXTRQ) or inserting a lane into another vector (INSERTQ). Testing demonstrated that it wasn't typically worth it to use these instructions for v2i64 or v4i32 vector shuffles although they are capable of it.

As well as adding specific pattern matching for the shuffles, the patch uses EXTRQ for zero extension cases where SSE41 isn't available and its more efficient than the SSE2 'unpack' default approach. It also adds shuffle decode support for the EXTRQ / INSERTQ cases when the instructions are handling full byte-sized extractions / insertions.

From this foundation, future patches will be able to make use of the instructions for situations that use their ability to extract/insert at the bit level.

Differential Revision: http://reviews.llvm.org/D10146

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 20:46:41 +00:00
Simon Pilgrim
ecb00f403c [X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN opcodes and remove the X86 implementation
With the completion of D9746 there is now a common implementation of integer signed/unsigned min/max nodes, removing the need for the equivalent X86 specific implementations.

This patch removes the old X86ISD nodes, legalizes the relevant SSE2/SSE41/AVX2/AVX512 instructions for the ISD versions and converts the small amount of existing X86 code.

Differential Revision: http://reviews.llvm.org/D10947

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241506 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 20:30:47 +00:00
Alex Lorenz
edfa571cbd llc: Add a 'run-pass' option.
This commit adds a 'run-pass' option to llc, which instructs the compiler to run
one specific code generation pass only.

Llc already has the 'start-after' and the 'stop-after' options, and this new
option complements the other two by making it easier to write tests that want
to invoke a single pass only.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10776


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241476 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 17:44:26 +00:00
Matt Arsenault
b560f9ca2f AMDGPU: Run SIInsertWaits as pre-emit pass
Running this after the scheduler enables scheduling
waits later so other ALU instructions can run while
this would be waiting.

When combined with enabling the post-RA scheduler, this
gives about a ~20% improvement on sgemm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241473 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 17:02:20 +00:00
Daniel Sanders
96fe9196e9 Change the last few internal StringRef triples into Triple objects.
Summary:
This concludes the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

At this point, the StringRef-form of GNU Triples should only be used in the
public API (including IR serialization) and a couple objects that directly
interact with the API (most notably the Module class). The next step is to
replace these Triple objects with the TargetTuple object that will represent
our authoratative/unambiguous internal equivalent to GNU Triples.

Reviewers: rengolin

Subscribers: llvm-commits, jholewinski, ted, rengolin

Differential Revision: http://reviews.llvm.org/D10962

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:56:07 +00:00
Daniel Sanders
24a1fec2a7 Where Triple has a suitable predicate, use it rather than the enum values. NFC.
Reviewers: mcrosier

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10960

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241469 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:33:18 +00:00
Matt Arsenault
6fe7acaaf8 AMDGPU/SI: Add debugging subtarget feature for DS offsets
We don't have a good way to detect most situations where
DS offsets are usable on SI, so add an option to force using
them even if unsafe for debugging performance problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241462 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:01:58 +00:00
James Y Knight
067b86fcab [Sparc] Add more instruction aliases.
These are mostly from the chart in the SparcV8 spec, section "A.3
Synthetic Instructions".

Differential Revision: http://reviews.llvm.org/D9834

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241461 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:01:07 +00:00
James Y Knight
d32974f9dc [Sparc] Add support for flush instruction.
Differential Revision: http://reviews.llvm.org/D9833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241460 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:01:04 +00:00
Chad Rosier
ac244651b2 Fix a bug in the A57FPLoadBalancing register tracking/scavenger.
The code in AArch64A57FPLoadBalancing::scavengeRegister() to handle dead defs
was not correctly handling aliased registers.  E.g. if the dead def was of D2,
then S2 was not being marked as unavailable, so it could potentially be used
across a live-range in which it would be clobbered.

Patch by Geoff Berry <gberry@codeaurora.org>!
Phabricator: http://reviews.llvm.org/D10900


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241449 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 14:46:34 +00:00
Asaf Badouh
169ee3383c [X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale
pmulhrsw

review:
http://reviews.llvm.org/D10948

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241443 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 14:03:40 +00:00
Peter Collingbourne
ce2b45bd7d IR: Do not consider available_externally linkage to be linker-weak.
From the linker's perspective, an available_externally global is equivalent
to an external declaration (per isDeclarationForLinker()), so it is incorrect
to consider it to be a weak definition.

Also clean up some logic in the dead argument elimination pass and clarify
its comments to better explain how its behavior depends on linkage,
introduce GlobalValue::isStrongDefinitionForLinker() and start using
it throughout the optimizers and backend.

Differential Revision: http://reviews.llvm.org/D10941

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241413 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 20:52:35 +00:00
Benjamin Kramer
54b3b4c15e [TargetLowering] StringRefize asm constraint getters.
There is some functional change here because it changes target code from
atoi(3) to StringRef::getAsInteger which has error checking. For valid
constraints there should be no difference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241411 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 19:29:18 +00:00
Asaf Badouh
5047893c31 [x86][AVX512] add Multiply High Op
include encoding and intrinsics tests.

review
http://reviews.llvm.org/D10896

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241406 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 12:23:20 +00:00
Michael Kuperstein
bb803fd76e [X86] Fix incorrect/inefficient pushw encodings for x86-64 targets
Correctly support assembling "pushw $imm8" on x86-64 targets. 
Also some cleanup of the PUSH instructions (PUSH64i16 and PUSHi16 actually
represent the same instruction)

This fixes PR23996

Patch by: david.l.kreitzer@intel.com
Differential Revision: http://reviews.llvm.org/D10878

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241404 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 10:25:41 +00:00
Nemanja Ivanovic
8be316bf23 Add missing builtins to the PPC back end for ABI compliance (vol. 2)
This patch corresponds to review:
http://reviews.llvm.org/D10874

Back end portion of the second round of additions to altivec.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241398 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 06:03:51 +00:00
Simon Pilgrim
4606f6d8da [X86][SSE] Improved i8/i16 to f64 uint2fp vector conversions
Followup to D10433 and D10589 that fixes i8/i16 uint2fp vector conversions by zero extending to i32 and using the sint2fp path (unless the target does actually support uint2fp).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241394 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-04 15:33:34 +00:00
Craig Topper
9a9ee6f550 [X86] Add proper 64-bit mode checks to jrcxz and jcxz.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241381 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-04 00:01:07 +00:00
Matt Arsenault
11528555b1 AMDGPU: Fix indentation of switch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241380 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-03 23:33:38 +00:00
Rafael Espindola
5954faae4d Return ErrorOr from getSymbolAddress.
It can fail trying to get the section on ELF and COFF. This makes sure the
error is handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241366 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-03 18:19:00 +00:00
Rafael Espindola
115b2eb8bf Replace a few more MachO only uses of getSymbolAddress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241365 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-03 18:02:36 +00:00
Simon Pilgrim
339c530319 [X86][SSE] Sign extension for target vector sizes less than 128 bits (pt2)
Add support for v2i8/v2i16 to v2f64 by using a sign extension to v2i32 before conversion to v2f64.

Differential Revision: http://reviews.llvm.org/D10589

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241325 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-03 08:01:36 +00:00
Simon Pilgrim
e3c6222c76 [X86][SSE] Sign extension for target vector sizes less than 128 bits (pt1)
This patch adds support for sign extension for sub 128-bit vectors, such as to v2i32. It concatenates with UNDEF subvectors up to 128-bits, performs the sign extension (i.e. as v4i32) and then extracts the target subvector.

Patch 1/2 of D10589 - the second patch covers the conversion of v2i8/v2i16 to v2f64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241323 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-03 07:51:01 +00:00
Dan Gohman
44bc052f4d [WebAssembly] Set the HasFloatingPointExceptions flag for WebAssembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-02 21:36:25 +00:00
Rafael Espindola
8a80641a85 Return ErrorOr from SymbolRef::getName.
This function can really fail since the string table offset can be out of
bounds.

Using ErrorOr makes sure the error is checked.

Hopefully a lot of the boilerplate code in tools/* can go away once we have
a diagnostic manager in Object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241297 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-02 20:55:21 +00:00