Commit Graph

7546 Commits

Author SHA1 Message Date
Anton Korobeynikov
f4ef8c9045 Add testcases for reg-mem arithemtics added recently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78214 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 17:04:32 +00:00
Anton Korobeynikov
9e155d61da Convert bswap test to filecheck, add more test entries & convert stuff to filecheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:50:53 +00:00
Dan Gohman
22f7d57dde Fix a bug in the PIC16 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:46:43 +00:00
Dan Gohman
c61954b57c Change these tests to use function attributes rather than special llc
command-line options.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:37:27 +00:00
Chris Lattner
299a8141e3 checking in broken testcases is not such a good idea.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 16:04:18 +00:00
Sanjiv Gupta
96a0a02119 Quite a few tests crashed in llc after 78142. This is just one of them. I hope to add a few more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 15:52:14 +00:00
Evan Cheng
6248fa4529 Disable stack coloring with register for now. It's not able to set kill markers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 07:26:17 +00:00
Evan Cheng
9cd1632814 Another nasty coalescer bug (is there another kind):
After coalescing reg1027's def and kill are both at the same point:
 %reg1027,0.000000e+00 = [56,814:0)  0@70-(814)

bb5:
60   %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0
68   %reg1027<def> = t2LDRi12 %reg1027<kill>, 8, 14, %reg0
76   t2CMPzri %reg1038<kill,undef>, 0, 14, %reg0, %CPSR<imp-def>
84   %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0
96   t2Bcc mbb<bb5,0x2030910>, 1, %CPSR<kill>

Do not remove the kill marker on t2LDRi12.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78178 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 07:05:41 +00:00
Dan Gohman
40a0b2c305 Revert changes accidentally committed along with r78163.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78165 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 05:38:13 +00:00
Dan Gohman
c3c9c486e4 Teach X86FastISel how to handle CCValAssign::BCvt, which is used for
MMX arguments. This fixes PR4684.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78163 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 05:33:42 +00:00
Andreas Bolka
831f6f6d2a ZIV tester for LDA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78157 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 04:26:05 +00:00
Andreas Bolka
7cf85030f4 Fix LDA testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78153 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 04:03:29 +00:00
Evan Cheng
6ade93bbdc Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78151 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 03:53:14 +00:00
Evan Cheng
b018a1e5a7 One more. Transfer kill of the larger register when lowering an EXTRACT_SUBREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78145 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 02:25:11 +00:00
Evan Cheng
a72dfb522d One more place where subreg lowering forgot to transfer undefness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:57:22 +00:00
Dan Gohman
98ca4f2a32 Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78142 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:28 +00:00
Evan Cheng
518ad1a880 If the insert_subreg source is <undef>, insert an implicit_def instead of a copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78141 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-05 01:29:24 +00:00
Evan Cheng
35d6c41fde Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78126 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 23:47:55 +00:00
Evan Cheng
57035994f7 Fix test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78113 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 22:22:58 +00:00
Bob Wilson
42cdcb9a86 Convert more Neon tests to use FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78111 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 22:01:41 +00:00
Bob Wilson
ad5312ad70 Convert a few Neon tests to use FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:33:22 +00:00
Jakob Stoklund Olesen
323e7d32ab Clean up the handling of two-address operands in RegScavenger.
This fixes PR4528.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78107 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:30:30 +00:00
Evan Cheng
9e7a312391 Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 21:12:13 +00:00
David Goodwin
53e4471adc Add NEON single-precision FP support for fabs and fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:39:05 +00:00
Jakob Stoklund Olesen
ded2e3b0d0 LowerSubregsInstructionPass::LowerExtract should not extend the live range of registers.
When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the
kill flag to the place where the sub-register is killed. This can accidentally
overlap with the use of a sibling sub-register, and we have trouble.

In the test case we have this code:

Live Ins: %R0 %R1 %R2
	%R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
	%R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
	%R1L<def> = EXTRACT_SUBREG %R1<kill>, 1
	%R0L<def> = EXTRACT_SUBREG %R0<kill>, 1
	%R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: eliminated!
subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H:

*** Bad machine code: Redefining a live physical register ***
- function:    f
- basic block:  0x18358c0 (#0)
- instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
Register R2H was defined but already live.

The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating
it completely:

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill>

Note that these IMPLICIT_DEF instructions survive to the asm output. It is
necessary to fix the stack-color-with-reg test case because of that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 20:01:11 +00:00
Evan Cheng
3425df44b5 In thumb mode, r7 is used as frame register. This fixes pr4681.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:46:17 +00:00
David Goodwin
b84f3d427c Match common pattern for FNMAC. Add NEON SP support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:44:29 +00:00
David Goodwin
831b500ec1 Improve tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 18:11:59 +00:00
David Goodwin
42a83f2d15 Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 17:53:06 +00:00
Evan Cheng
7d35249e89 Fix PR4528. This scavenger assertion is too strict. The two-address value is
killed by another operand.

There is probably a better fix. Either 1) scavenger can look at other operands, or
2) livevariables can be smarter about kill markers. Patches welcome.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78072 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:52:44 +00:00
Chris Lattner
ec409759e9 enhance codegen to put 16-bit character strings into the
__TEXT,__ustring section on darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:27:13 +00:00
Chris Lattner
1850e5add1 Add support emiting for 2/4 byte mergable strings to the ".rodata.str*"
section on ELF targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78066 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 16:13:09 +00:00
Devang Patel
d5ac40457b Use separate ValueList for metadata.
This fixes PR4666.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 06:00:18 +00:00
Devang Patel
912538beca Revert recent bitcode writer patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 05:01:35 +00:00
Bill Wendling
27d703b30f llvm-gcc checks the static asm variable is valid in ValidateRegisterVariable. Make this work for PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 04:48:31 +00:00
Bill Wendling
2822e174f6 Fixed now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 03:46:54 +00:00
Rafael Espindola
c4f8861af3 Add test for PR4678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78040 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 03:44:37 +00:00
Bill Wendling
d9a05eb97e XFAIL for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78038 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 03:40:47 +00:00
Devang Patel
d701aa7bed Constants and Metadata share ValueList. This means they must be emitted interleaved (using appropriate BLOCK_IDs) otherwise ValuePtrs index gets out of sync.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78033 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 02:26:56 +00:00
Evan Cheng
fa2ea1a8cf Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78030 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-04 01:41:15 +00:00
Dan Gohman
8bb9c92892 Add -disable-output. Thanks Bill!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:24:22 +00:00
Dan Gohman
43ee5f7c08 Add a new Constant::getIntegerValue helper function, and convert a
few places in InstCombine to use it, to fix problems handling pointer
types. This fixes the recent llvm-gcc bootstrap error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78005 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 22:07:33 +00:00
Bob Wilson
a6d658620f Lower CONCAT_VECTOR during legalization instead of matching it during isel.
Add a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 20:36:38 +00:00
Jakob Stoklund Olesen
980daea857 Fix Bug 4657: register scavenger asserts with subreg lowering
When LowerSubregsInstructionPass::LowerInsert eliminates an INSERT_SUBREG
instriction because it is an identity copy, make sure that the same registers
are alive before and after the elimination.

When the super-register is marked <undef> this requires inserting an
IMPLICIT_DEF instruction to make sure the super register is live.

Fix a related bug where a kill flag on the inserted sub-register was not transferred properly.

Finally, clear the undef flag in MachineInstr::addRegisterKilled. Undef implies dead and kill implies live, so they cant both be valid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77989 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 20:08:18 +00:00
Evan Cheng
eed0ff147c Fix a coaelescer bug. If a copy val# is extended to eliminate a non-trivially coalesced copy, and the copy kills its source register. Trim the source register's live range to the last use if possible. This fixes up kill marker to make the scavenger happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:41:59 +00:00
Anton Korobeynikov
cf6b739d3d Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 08:12:53 +00:00
Rafael Espindola
8d632c1e98 Use movd instead of movq
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77956 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 05:21:05 +00:00
Daniel Dunbar
3c2d4bf97f Pass target triple string in to TargetMachine constructor.
This is not just a matter of passing in the target triple from the module;
currently backends are making decisions based on the build and host
architecture. The goal is to migrate to making these decisions based off of the
triple (in conjunction with the feature string). Thus most clients pass in the
target triple, or the host triple if that is empty.

This has one important change in the way behavior of the JIT and llc.

For the JIT, it was previously selecting the Target based on the host
(naturally), but it was setting the target machine features based on the triple
from the module. Now it is setting the target machine features based on the
triple of the host.

For LLC, -march was previously only used to select the target, the target
machine features were initialized from the module's triple (which may have been
empty). Now the target triple is taken from the module, or the host's triple is
used if that is empty. Then the triple is adjusted to match -march.

The take away is that -march for llc is now used in conjunction with the host
triple to initialize the subtarget. If users want more deterministic behavior
from llc, they should use -mtriple, or set the triple in the input module.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 04:03:51 +00:00
Rafael Espindola
def390a30a Use movq to move 64 bits in and out of mmx registers.
Fixes PR4669



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:45:34 +00:00
Evan Cheng
a8e8984ee4 Use the i12 variant of load / store opcodes if offset is zero. Now we pass all of multisource as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77939 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-03 02:38:06 +00:00