Commit Graph

1440 Commits

Author SHA1 Message Date
Bill Wendling
8c3befd76e This test is failing. Revert for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 19:10:56 +00:00
Bill Wendling
f88f21c5d4 Add another testcase for r71478.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 18:36:34 +00:00
Arnold Schwaighofer
5d2c01e48a CheckTailCallReturnConstraints is missing a check on the
incomming chain of the RETURN node. The incomming chain must
be the outgoing chain of the CALL node. This causes the
backend to identify tail calls that are not tail calls. This
patch fixes this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 14:43:36 +00:00
Arnold Schwaighofer
bbd8c33ee6 Fix Bug 4278: X86-64 with -tailcallopt calling convention
out of sync with regular cc.

The only difference between the tail call cc and the normal
cc was that one parameter register - R9 - was reserved for
calling functions through a function pointer. After time the
tail call cc has gotten out of sync with the regular cc. 

We can use R11 which is also caller saved but not used as
parameter register for potential function pointers and
remove the special tail call cc on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73233 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-12 16:26:57 +00:00
Eli Friedman
faeedf1254 Fix the run-line for this test to work correctly outside of x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-07 09:44:19 +00:00
Eli Friedman
f10d3a7bcd Tweak the expansion code for BIT_CONVERT to generate better code
converting from an MMX vector to an i64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-07 09:41:57 +00:00
Eli Friedman
7a5e55509b Slightly generalize the code that handles shuffles of consecutive loads
on x86 to handle more cases.  Fix a bug in said code that would cause it 
to read past the end of an object.  Rewrite the code in 
SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general. 
Remove PerformBuildVectorCombine, which is no longer necessary with 
these changes.  In addition to simplifying the code, with this change, 
we can now catch a few more cases of consecutive loads.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73012 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-07 06:52:44 +00:00
Eli Friedman
5257106c4d Fix the expansion for CONCAT_VECTORS so that it doesn't create illegal
types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72993 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 07:08:26 +00:00
Eli Friedman
30e71eb61b Avoid crashing on a variable-index insertelement with element type i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 06:32:50 +00:00
Eli Friedman
1041553424 Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL
nodes for vectors with an i16 element type.  Add an optimization for 
building a vector which is all zeros/undef except for the bottom 
element, where the bottom element is an i8 or i16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 06:05:10 +00:00
Eli Friedman
9d47b8d8ea Fix an obvious typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72987 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 05:55:37 +00:00
Eli Friedman
1762c1439e Get rid of a bogus pattern that interferes with optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 04:17:04 +00:00
Eli Friedman
23ef105580 PR2598: make sure to expand illegal forms of integer/floating-point
conversions for x86, like <2 x i32> -> <2 x float> and <4 x i16> -> 
<4 x float>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 03:57:58 +00:00
Nate Begeman
abc0199680 Adapt the x86 build_vector dagcombine to the current state of the legalizer.
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector 
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.

Teach the build_vector dag combine in x86 back end to recognize consecutive 
loads producing the low part of the vector.

Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.

Add a testcase for the transform.

Old:
	subl	$28, %esp
	movl	32(%esp), %eax
	movl	4(%eax), %ecx
	movl	%ecx, 4(%esp)
	movl	(%eax), %eax
	movl	%eax, (%esp)
	movaps	(%esp), %xmm0
	pmovzxwd	%xmm0, %xmm0
	movl	36(%esp), %eax
	movaps	%xmm0, (%eax)
	addl	$28, %esp
	ret

New:
	movl	4(%esp), %eax
	pmovzxwd	(%eax), %xmm0
	movl	8(%esp), %eax
	movaps	%xmm0, (%eax)
	ret




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 21:37:30 +00:00
Dan Gohman
ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
Devang Patel
d18e31ae17 Add new function attribute - noredzone.
Update code generator to use this attribute and remove DisableRedZone target option.
Update llc to set this attribute when -disable-red-zone command line option is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:05:33 +00:00
Evan Cheng
073e7e5807 RALinScan::attemptTrivialCoalescing() was returning a virtual register instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72890 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 20:53:36 +00:00
Dan Gohman
0e19a3f89e Check in test changes that I accidentally left out of r72872.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72875 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 18:22:31 +00:00
Eli Friedman
bccf4b3050 PR3739, part 2: Use an explicit store to spill XMM registers. (Previously,
the code tried to use "push", which doesn't exist for XMM registers.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 02:32:04 +00:00
Eli Friedman
9a41712122 PR3739, part 1: Disable the red zone on Win64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72830 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 02:02:01 +00:00
Evan Cheng
424f8f339a For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
I view this as a temporary workaround until the assembler / linker changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72806 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 21:13:54 +00:00
Evan Cheng
2c48fe6757 Fix for PR4225: When rewriter reuse a value in a physical register , it clear the register kill operand marker and its kill ops information. However, the cleared operand may be a def of a super-register. Clear the kill ops info for the super-register's sub-registers as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72758 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 09:00:27 +00:00
Dan Gohman
6ecc2602a6 Revert r72734. The Darwin assembler doesn't support the static
relocation model on x86-64. Higher level logic should override
the relocation model to PIC on x86_64-apple-darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-03 00:37:20 +00:00
Dan Gohman
8b0d4f61bb Fix CodeGenPrepare's address-mode sinking to handle unusual
addresses, involving Base values which do not have Pointer type.
This fixes PR4297.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-02 21:29:13 +00:00
Evan Cheng
da9863fa41 On Darwin x86_64 small code model doesn't guarantee code address fits in 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-02 20:09:31 +00:00
Evan Cheng
cf7895ff8b (i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72618 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-30 08:43:27 +00:00
Evan Cheng
8e610a7784 Remove an accidental commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-29 05:28:52 +00:00
Evan Cheng
cb219f0ef6 More h-registers tricks: folding zext nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-29 01:44:43 +00:00
Evan Cheng
d3c76bb6fc Do not try to create a MVT type of width 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 23:52:18 +00:00
Eli Friedman
b999a7056e Add a testcase which got fixed by recent legalization work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 05:10:20 +00:00
Evan Cheng
8b944d39b3 Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
e.g.
orl     $65536, 8(%rax)
=>
orb     $1, 10(%rax)

Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-28 00:35:15 +00:00
Torok Edwin
6bb4958543 Fix PR4254.
The DAGCombiner created a negative shiftamount, stored in an
unsigned variable. Later the optimizer eliminated the shift entirely as being
undefined.
Example: (srl (shl X, 56) 48). ShiftAmt is 4294967288.
Fix it by checking that the shiftamount is positive, and storing in a signed
variable.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72331 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-23 17:29:48 +00:00
Torok Edwin
f5ff1d335b available_externall linkage is not local, this was confusing the codegenerator,
and it wasn't generating calls through @PLT for these functions.
hasLocalLinkage() is now false for available_externally,
I attempted to fix the inliner and dce to handle available_externally properly.
It passed make check.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-23 14:06:57 +00:00
Eli Friedman
d14ce2f1fc Fix test to account for legalization changes; I think this ends up
running an extra DAGCombine pass which improves the code a bit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-23 13:15:11 +00:00
Evan Cheng
c7d167d62f Fix test on non-darwin hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72161 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-20 05:45:36 +00:00
Evan Cheng
d7f666a869 Try again. Allow call to immediate address for ELF or when in static relocation mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72160 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-20 04:53:57 +00:00
Evan Cheng
65cdee3fd4 Cannot use immediate as call absolute target in PIC mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72154 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-20 01:11:00 +00:00
Dan Gohman
04623272d2 Add nounwind to a few tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72002 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-18 15:16:49 +00:00
Jakob Stoklund Olesen
f8eac02fc1 Help DejaGnu avoid pipe-jam by producing less output from certain test cases.
When a test fails with more than a pipeful of output on stdout AND stderr, one
of the DejaGnu programs blocks. The problem can be avoided by redirecting
stdout to a file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-16 00:34:42 +00:00
Dan Gohman
ebde0c55ce Add nounwind to this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13 22:29:12 +00:00
Evan Cheng
9d3094b38e If header of inner loop is aligned, do not align the outer loop header. We don't want to add nops in the outer loop for the sake of aligning the inner loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71609 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 23:58:14 +00:00
Evan Cheng
eca24fba3f Teach TransferDeadness to delete truly dead instructions if they do not produce side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71606 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 23:07:00 +00:00
Evan Cheng
17114249fc Add nounwind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71575 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 18:35:43 +00:00
Evan Cheng
1ea7327845 Fixed a stack slot coloring with reg bug: do not update implicit use / def when doing forward / backward propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 18:31:57 +00:00
Dan Gohman
81db61a2e6 Factor the code for collecting IV users out of LSR into an IVUsers class,
and generalize it so that it can be used by IndVarSimplify. Implement the
base IndVarSimplify transformation code using IVUsers. This removes
TestOrigIVForWrap and associated code, as ScalarEvolution now has enough
builtin overflow detection and folding logic to handle all the same cases,
and more. Run "opt -iv-users -analyze -disable-output" on your favorite
loop for an example of what IVUsers does.

This lets IndVarSimplify eliminate IV casts and compute trip counts in
more cases. Also, this happens to finally fix the remaining testcases
in PR1301.

Now that IndVarSimplify is being more aggressive, it occasionally runs
into the problem where ScalarEvolutionExpander's code for avoiding
duplicate expansions makes it difficult to ensure that all expanded
instructions dominate all the instructions that will use them. As a
temporary measure, IndVarSimplify now uses a FixUsesBeforeDefs function
to fix up instructions inserted by SCEVExpander. Fortunately, this code
is contained, and can be easily removed once a more comprehensive
solution is available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-12 02:17:14 +00:00
Evan Cheng
5792f51e12 Teach LSR to optimize more loop exit compares, i.e. change them to use postinc iv value. Previously LSR would only optimize those which are in the loop latch block. However, if LSR can prove it is safe (and profitable), it's now possible to change those not in the latch blocks to use postinc values.
Also, if the compare is the only use, LSR would place the iv increment instruction before the compare instead in the latch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 22:33:01 +00:00
Dale Johannesen
bf06f6a6f1 Fix PR4188. TailMerging can't tolerate inexact
sucessor info.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 21:54:13 +00:00
Dan Gohman
a96f119803 Make this grep line a little more specific so that it doesn't
accidentally match something unrelated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71458 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 18:49:56 +00:00
Dan Gohman
4e3fdf2c0f When scalarizing a vector BITCAST, check whether the operand has vector
type, rather than assume that it does. If the operand is not vector, it
shouldn't be run through ScalarizeVectorOp. This fixes one of the
testcases in PR3886.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71453 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 18:30:42 +00:00
Dan Gohman
3cd90a18bb Convert a subtract into a negate and an add when it helps x86
address folding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71446 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-11 18:02:53 +00:00