Jim Grosbach 91c655736e ARM64: Improve diagnostics for malformed reg+reg addressing mode. ... Make sure only general purpose registers are valid for offset regs and that 32-bit regs are only valid for sxtw and uxtw extends. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206799 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-21 21:45:57 +00:00
..
AsmParser	ARM64: Improve diagnostics for malformed reg+reg addressing mode.	2014-04-21 21:45:57 +00:00
Disassembler	ARM64: Extended addressing mode source reg is 64-bit.	2014-04-21 21:45:44 +00:00
InstPrinter	ARM64: [su]xtw use W regs as inputs, not X regs.	2014-04-17 20:47:31 +00:00
MCTargetDesc	AArch64/ARM64: produce correct relocation for conditional branches.	2014-04-16 15:27:52 +00:00
TargetInfo	ARM64/*/LLVMBuild.txt: Prune redundant deps.	2014-04-10 12:46:13 +00:00
Utils	Simple fix for build failures resulting from r205867.	2014-04-09 18:34:45 +00:00
ARM64.h	[ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. These files are required in the decoder, disassembler and parser, and a layering violation was imminent.	2014-04-09 14:42:27 +00:00
ARM64.td	[ARM64] Ports the Cortex-A53 Machine Model description from AArch64.	2014-04-18 21:22:04 +00:00
ARM64AddressTypePromotion.cpp	[ARM64,C++11] Range'ify use-lists iterators in address type promotion.	2014-04-11 01:13:10 +00:00
ARM64AdvSIMDScalarPass.cpp	Fix some doc and comment typos	2014-04-09 14:47:27 +00:00
ARM64AsmPrinter.cpp	ARM64: don't emit .subsections_via_symbols on ELF.	2014-04-18 14:54:41 +00:00
ARM64BranchRelaxation.cpp	[ARM64,C++11] Tidy up branch relaxation a bit w/ c++11.	2014-04-16 00:42:46 +00:00
ARM64CallingConv.h	Make consistent use of MCPhysReg instead of uint16_t throughout the tree.	2014-04-04 05:16:06 +00:00
ARM64CallingConvention.td	AArch64/ARM64: copy byval implementation from AArch64.	2014-04-18 09:30:52 +00:00
ARM64CleanupLocalDynamicTLSPass.cpp	Make a few more range-based loops use explicit types.	2014-04-02 20:21:22 +00:00
ARM64CollectLOH.cpp	Fixing a compile error in debug versions of MSVC. It seems that the range-based for loop is confused by the DEBUG macro expansion unless a compound statement is used.	2014-04-16 11:15:57 +00:00
ARM64ConditionalCompares.cpp	Implement depth_first and inverse_depth_first range factory functions.	2014-04-11 01:50:01 +00:00
ARM64DeadRegisterDefinitionsPass.cpp	ARM64: use 32-bit moves for constants where possible.	2014-04-16 11:52:51 +00:00
ARM64ExpandPseudoInsts.cpp	[C++11,ARM64] Range based for loops in pseudo expansion.	2014-04-02 18:00:46 +00:00
ARM64FastISel.cpp	Replacing a non-ASCII character in a comment with an ASCII character. Fixes a C4819 warning in MSVC.	2014-04-16 17:09:20 +00:00
ARM64FrameLowering.cpp	Make consistent use of MCPhysReg instead of uint16_t throughout the tree.	2014-04-04 05:16:06 +00:00
ARM64FrameLowering.h
ARM64InstrAtomics.td	ARM64: switch to IR-based atomic operations.	2014-04-17 20:00:33 +00:00
ARM64InstrFormats.td	AArch64/ARM64: add half as a storage type on ARM64.	2014-04-15 14:00:03 +00:00
ARM64InstrInfo.cpp	AArch64/ARM64: enable directcond.ll test on ARM64.	2014-04-14 12:51:06 +00:00
ARM64InstrInfo.h	ARM64: override all the things.	2014-03-30 07:25:18 +00:00
ARM64InstrInfo.td	ARM64: add extra NEG pattern.	2014-04-18 14:54:35 +00:00
ARM64ISelDAGToDAG.cpp	ARM64: Combine shifts and uses from different basic block to bit-extract instruction	2014-04-21 19:34:27 +00:00
ARM64ISelLowering.cpp	ARM64: Combine shifts and uses from different basic block to bit-extract instruction	2014-04-21 19:34:27 +00:00
ARM64ISelLowering.h	AArch64/ARM64: port BSL logic from AArch64 & enable test.	2014-04-18 09:31:01 +00:00
ARM64LoadStoreOptimizer.cpp	Fix typo.	2014-04-03 23:43:12 +00:00
ARM64MachineFunctionInfo.h	Detemplatize LOHDirective.	2014-03-29 19:21:20 +00:00
ARM64MCInstLower.cpp	[ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. These files are required in the decoder, disassembler and parser, and a layering violation was imminent.	2014-04-09 14:42:27 +00:00
ARM64MCInstLower.h
ARM64PerfectShuffle.h
ARM64PromoteConstant.cpp	[ARM64,C++11] Range'ify another loop.	2014-04-17 23:41:57 +00:00
ARM64RegisterInfo.cpp	Fix some doc and comment typos	2014-04-09 14:47:27 +00:00
ARM64RegisterInfo.h	Make consistent use of MCPhysReg instead of uint16_t throughout the tree.	2014-04-04 05:16:06 +00:00
ARM64RegisterInfo.td	AArch64/ARM64: add half as a storage type on ARM64.	2014-04-15 14:00:03 +00:00
ARM64SchedA53.td	[ARM64] Ports the Cortex-A53 Machine Model description from AArch64.	2014-04-18 21:22:04 +00:00
ARM64SchedCyclone.td	[ARM64] Ports the Cortex-A53 Machine Model description from AArch64.	2014-04-18 21:22:04 +00:00
ARM64Schedule.td
ARM64SelectionDAGInfo.cpp
ARM64SelectionDAGInfo.h	ARM64: override all the things.	2014-03-30 07:25:18 +00:00
ARM64StorePairSuppress.cpp	Tidy up. Space before ':' in range-based for loops.	2014-04-03 23:43:26 +00:00
ARM64Subtarget.cpp	[ARM64] Set default CPU to generic instead of cyclone.	2014-04-15 19:08:46 +00:00
ARM64Subtarget.h	[ARM64] Port over missing subtarget features, and CPU definitions from AArch64.	2014-04-14 17:38:00 +00:00
ARM64TargetMachine.cpp	ARM64: disable generation of .loh directives outside MachO.	2014-04-18 14:54:46 +00:00
ARM64TargetMachine.h	ARM64: override all the things.	2014-03-30 07:25:18 +00:00
ARM64TargetObjectFile.cpp
ARM64TargetObjectFile.h	ARM64: override all the things.	2014-03-30 07:25:18 +00:00
ARM64TargetTransformInfo.cpp	AArch64/ARM64: add non-scalar lowering for more FCVT operations.	2014-04-18 13:16:42 +00:00
CMakeLists.txt	[ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. These files are required in the decoder, disassembler and parser, and a layering violation was imminent.	2014-04-09 14:42:27 +00:00
LLVMBuild.txt	ARM64/*/LLVMBuild.txt: Prune redundant deps.	2014-04-10 12:46:13 +00:00
Makefile	[ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. These files are required in the decoder, disassembler and parser, and a layering violation was imminent.	2014-04-09 14:42:27 +00:00