Michel Danzer 311ea66db1 R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers. ... The modifiers don't seem to have any effect with V_MOV_B32, supposedly it's meant to just move bits untouched. Fixes 46 piglit tests with radeonsi, though unfortunately 11 of those had just regressed because they started using the clamp modifier. NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174890 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-11 15:58:21 +00:00
..
InstPrinter
MCTargetDesc	R600/SI: cleanup VGPR encoding	2013-02-07 19:39:45 +00:00
TargetInfo
AMDGPU.h
AMDGPU.td
AMDGPUAsmPrinter.cpp	R600/SI: cleanup VGPR encoding	2013-02-07 19:39:45 +00:00
AMDGPUAsmPrinter.h
AMDGPUCodeEmitter.h	R600/SI: simplify and fix SMRD encoding	2013-02-07 19:39:40 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUIndirectAddressing.cpp
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPUInstructions.td	R600/SI: Add basic support for more integer vector types.	2013-02-07 17:02:09 +00:00
AMDGPUIntrinsics.td
AMDGPUISelLowering.cpp
AMDGPUISelLowering.h	R600: Dump the function name when TargetLowering::LowerCall() fails	2013-02-08 22:24:40 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp	R600: Consolidate sub register indices.	2013-02-07 14:02:37 +00:00
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td	R600: Consolidate sub register indices.	2013-02-07 14:02:37 +00:00
AMDGPUStructurizeCFG.cpp	R600: rework flow creation in the structurizer v2	2013-02-08 22:24:38 +00:00
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp
AMDGPUTargetMachine.h
AMDIL7XXDevice.cpp
AMDIL7XXDevice.h
AMDIL.h
AMDILBase.td
AMDILCFGStructurizer.cpp
AMDILDevice.cpp
AMDILDevice.h
AMDILDeviceInfo.cpp
AMDILDeviceInfo.h
AMDILDevices.h
AMDILEvergreenDevice.cpp
AMDILEvergreenDevice.h
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelDAGToDAG.cpp	R600/SI: simplify and fix SMRD encoding	2013-02-07 19:39:40 +00:00
AMDILISelLowering.cpp
AMDILNIDevice.cpp
AMDILNIDevice.h
AMDILPeepholeOptimizer.cpp
AMDILRegisterInfo.td
AMDILSIDevice.cpp
AMDILSIDevice.h
CMakeLists.txt
LLVMBuild.txt
Makefile
Processors.td	R600: Add an explicit default processor	2013-02-07 19:39:34 +00:00
R600Defines.h
R600ExpandSpecialInstrs.cpp
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td	Test Commit - Remove some trailing whitespace in R600Instructions.td	2013-02-10 17:57:33 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	R600: Add support for SET*_DX10 instructions	2013-02-07 14:02:35 +00:00
R600ISelLowering.h
R600LowerConstCopy.cpp
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600RegisterInfo.cpp	R600: Consolidate sub register indices.	2013-02-07 14:02:37 +00:00
R600RegisterInfo.h
R600RegisterInfo.td	R600: Consolidate sub register indices.	2013-02-07 14:02:37 +00:00
R600Schedule.td
SIAnnotateControlFlow.cpp
SIAssignInterpRegs.cpp
SIInsertWaits.cpp
SIInstrFormats.td
SIInstrInfo.cpp	R600/SI: Handle VGPR64 destination in copyPhysReg().	2013-02-07 19:39:43 +00:00
SIInstrInfo.h	R600/SI: cleanup VGPR encoding	2013-02-07 19:39:45 +00:00
SIInstrInfo.td	R600/SI: cleanup VGPR encoding	2013-02-07 19:39:45 +00:00
SIInstructions.td	R600/SI: Add pattern for mul.	2013-02-07 19:39:42 +00:00
SIIntrinsics.td	R600/SI: Make sample intrinsic address parameter type overloaded.	2013-02-07 17:02:13 +00:00
SIISelLowering.cpp	R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.	2013-02-11 15:58:21 +00:00
SIISelLowering.h
SILowerControlFlow.cpp
SILowerLiteralConstants.cpp	R600/SI: add proper 64bit immediate support v2	2013-02-07 19:39:38 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td	R600/SI: cleanup VGPR encoding	2013-02-07 19:39:45 +00:00
SISchedule.td