Matt Arsenault 9a0e12a6ed Remove unused DwarfSectionOffsetDirective string ... The value isn't actually used, and setting it emits a COFF specific directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180064 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-22 22:49:11 +00:00
..
InstPrinter	R600/SI: add all the other missing asm operands v2	2013-02-21 15:17:22 +00:00
MCTargetDesc	Remove unused DwarfSectionOffsetDirective string	2013-04-22 22:49:11 +00:00
TargetInfo
AMDGPU.h	R600: Add support for native control flow	2013-04-01 21:48:05 +00:00
AMDGPU.td	R600/SI: add proper formal parameter handling for SI	2013-03-07 09:03:52 +00:00
AMDGPUAsmPrinter.cpp	R600: Emit used GPRs count	2013-04-17 15:17:25 +00:00
AMDGPUAsmPrinter.h	R600: Emit used GPRs count	2013-04-17 15:17:25 +00:00
AMDGPUCallingConv.td	R600/SI: Add support for buffer stores v2	2013-04-05 23:31:51 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUIndirectAddressing.cpp	R600/SI: fix unused variable warning	2013-03-07 09:03:30 +00:00
AMDGPUInstrInfo.cpp	R600/SI: add VOP mapping functions	2013-02-26 17:52:42 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPUInstructions.td	R600: Add pattern for the BFI_INT instruction	2013-04-19 02:11:06 +00:00
AMDGPUIntrinsics.td	R600/SI: remove shader type intrinsic	2013-03-07 09:03:46 +00:00
AMDGPUISelLowering.cpp	R600/SI: add mulhu/mulhs patterns	2013-03-27 09:12:51 +00:00
AMDGPUISelLowering.h	R600/SI: Add support for buffer stores v2	2013-04-05 23:31:51 +00:00
AMDGPUMachineFunction.cpp	R600/SI: Share code recording ShaderTypeAttribute between generations	2013-04-01 21:47:53 +00:00
AMDGPUMachineFunction.h	R600/SI: Share code recording ShaderTypeAttribute between generations	2013-04-01 21:47:53 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUStructurizeCFG.cpp	R600: fix DenseMap with pointer key iteration in the structurizer	2013-03-26 10:24:20 +00:00
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp	R600: Add support for native control flow	2013-04-01 21:48:05 +00:00
AMDGPUTargetMachine.h
AMDIL7XXDevice.cpp
AMDIL7XXDevice.h
AMDIL.h	R600/SI: remove SGPR address space v2	2013-03-07 09:03:59 +00:00
AMDILBase.td
AMDILCFGStructurizer.cpp	R600: Fix JUMP handling so that MachineInstr verification can occur	2013-03-11 18:15:06 +00:00
AMDILDevice.cpp	R600: Clean up datalayout strings so they better match hardware capabilities	2013-03-04 17:40:28 +00:00
AMDILDevice.h
AMDILDeviceInfo.cpp	R600/SI: Add processor types for each SI variant	2013-04-05 23:31:35 +00:00
AMDILDeviceInfo.h
AMDILDevices.h
AMDILEvergreenDevice.cpp
AMDILEvergreenDevice.h
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelDAGToDAG.cpp	ArrayRefize getMachineNode(). No functionality change.	2013-04-19 22:22:57 +00:00
AMDILISelLowering.cpp	R600/SI: add proper formal parameter handling for SI	2013-03-07 09:03:52 +00:00
AMDILNIDevice.cpp
AMDILNIDevice.h
AMDILPeepholeOptimizer.cpp
AMDILRegisterInfo.td
AMDILSIDevice.cpp	R600: Clean up datalayout strings so they better match hardware capabilities	2013-03-04 17:40:28 +00:00
AMDILSIDevice.h
CMakeLists.txt	Target/R600: Fix CMake build to add missing files.	2013-04-01 22:05:58 +00:00
LLVMBuild.txt
Makefile
Processors.td	R600: Add RV670 processor	2013-04-05 23:31:40 +00:00
R600ControlFlowFinalizer.cpp	R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable]	2013-04-11 04:16:27 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp	R600: Fix last ALU of a clause being emitted in a separate clause	2013-04-03 18:24:47 +00:00
R600ExpandSpecialInstrs.cpp
R600InstrInfo.cpp	R600: Factorize maximum alu per clause in a single location	2013-04-03 16:49:34 +00:00
R600InstrInfo.h	R600: Factorize maximum alu per clause in a single location	2013-04-03 16:49:34 +00:00
R600Instructions.td	R600: Add pattern for the BFI_INT instruction	2013-04-19 02:11:06 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	R600/SI: add mulhu/mulhs patterns	2013-03-27 09:12:51 +00:00
R600ISelLowering.h	R600: Use legacy (0 * anything = 0) MUL instructions for pow intrinsics	2013-03-22 14:09:10 +00:00
R600MachineFunctionInfo.cpp	R600/SI: Share code recording ShaderTypeAttribute between generations	2013-04-01 21:47:53 +00:00
R600MachineFunctionInfo.h	R600/SI: Share code recording ShaderTypeAttribute between generations	2013-04-01 21:47:53 +00:00
R600MachineScheduler.cpp	R600: Factorize maximum alu per clause in a single location	2013-04-03 16:49:34 +00:00
R600MachineScheduler.h	R600: Factorize code handling Const Read Port limitation	2013-03-14 15:50:45 +00:00
R600RegisterInfo.cpp	R600: Mark all members of the TRegMem register class as reserved	2013-02-19 15:22:45 +00:00
R600RegisterInfo.h
R600RegisterInfo.td	R600: Emit CF_ALU and use true kcache register.	2013-04-01 21:47:42 +00:00
R600Schedule.td
SIAnnotateControlFlow.cpp
SIDefines.h	R600/SI: Emit config values in register value pairs.	2013-04-15 17:51:35 +00:00
SIInsertWaits.cpp	R600/SI: fix inserting waits for all defines	2013-03-18 11:33:45 +00:00
SIInstrFormats.td	R600/SI: Use same names for corresponding MUBUF operands and encoding fields	2013-04-05 23:31:44 +00:00
SIInstrInfo.cpp	R600/SI: dynamical figure out the reg class of MIMG	2013-04-10 08:39:16 +00:00
SIInstrInfo.h	R600/SI: adjust writemask to only the used components	2013-04-10 08:39:08 +00:00
SIInstrInfo.td	R600/SI: Use InstFlag for VOP3 modifier operands	2013-04-19 02:11:00 +00:00
SIInstructions.td	R600: Add pattern for the BFI_INT instruction	2013-04-19 02:11:06 +00:00
SIIntrinsics.td	R600/SI: remove image sample writemask	2013-04-10 08:39:01 +00:00
SIISelLowering.cpp	ArrayRefize getMachineNode(). No functionality change.	2013-04-19 22:22:57 +00:00
SIISelLowering.h	R600/SI: dynamical figure out the reg class of MIMG	2013-04-10 08:39:16 +00:00
SILowerControlFlow.cpp	R600/SI: replace WQM intrinsic	2013-03-26 14:03:50 +00:00
SIMachineFunctionInfo.cpp	R600/SI: Share code recording ShaderTypeAttribute between generations	2013-04-01 21:47:53 +00:00
SIMachineFunctionInfo.h	R600/SI: Share code recording ShaderTypeAttribute between generations	2013-04-01 21:47:53 +00:00
SIRegisterInfo.cpp	R600/SI: switch back to RegPressure scheduling	2013-03-26 14:04:02 +00:00
SIRegisterInfo.h	R600/SI: switch back to RegPressure scheduling	2013-03-26 14:04:02 +00:00
SIRegisterInfo.td	R600/SI: dynamical figure out the reg class of MIMG	2013-04-10 08:39:16 +00:00
SISchedule.td