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InstPrinter
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R600: improve dump of S_WAITCNT
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2013-10-13 17:56:28 +00:00 |
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MCTargetDesc
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Remove unused flag.
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2013-10-31 15:49:39 +00:00 |
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TargetInfo
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R600: Remove unnecessary include
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2013-06-07 20:28:43 +00:00 |
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AMDGPU.h
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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AMDGPU.td
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R600/SI: Add compute support for CI v2
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2013-10-29 16:37:28 +00:00 |
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AMDGPUAsmPrinter.cpp
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R600/SI: Add compute support for CI v2
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2013-10-29 16:37:28 +00:00 |
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AMDGPUAsmPrinter.h
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R600: Store disassembly in a special ELF section when feature +DumpCode is enabled.
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2013-10-12 05:02:51 +00:00 |
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AMDGPUCallingConv.td
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R600/SI: Add compute support for CI v2
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2013-10-29 16:37:28 +00:00 |
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AMDGPUConvertToISA.cpp
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AMDGPUFrameLowering.cpp
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R600: Fix calculation of stack offset in AMDGPUFrameLowering
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2013-06-07 20:52:05 +00:00 |
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AMDGPUFrameLowering.h
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R600: Support for indirect addressing v4
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2013-02-06 17:32:29 +00:00 |
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AMDGPUInstrInfo.cpp
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Removing a switch statement that contains only a default label. This resolves an MSVC warning. No functional change intended.
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2013-10-29 20:40:52 +00:00 |
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AMDGPUInstrInfo.h
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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AMDGPUInstrInfo.td
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R600: Add support for i8 and i16 local memory stores
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2013-08-26 15:05:49 +00:00 |
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AMDGPUInstructions.td
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Target/R600: Un-tab-ify.
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2013-10-28 04:07:23 +00:00 |
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AMDGPUIntrinsics.td
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R600: Add support for GROUP_BARRIER instruction
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2013-06-28 15:46:59 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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ISelDAG: spot chain cycles involving MachineNodes
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2013-09-22 08:21:56 +00:00 |
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AMDGPUISelLowering.cpp
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R600: Custom lower f32 = uint_to_fp i64
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2013-10-30 17:22:05 +00:00 |
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AMDGPUISelLowering.h
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R600: Custom lower f32 = uint_to_fp i64
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2013-10-30 17:22:05 +00:00 |
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AMDGPUMachineFunction.cpp
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Move string pointer from being a static class member to just a static global in the one file its needed in.
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2013-07-17 00:31:35 +00:00 |
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AMDGPUMachineFunction.h
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R600: Fix incorrect LDS size calculation
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2013-09-05 18:37:57 +00:00 |
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AMDGPUMCInstLower.cpp
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R600: Store disassembly in a special ELF section when feature +DumpCode is enabled.
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2013-10-12 05:02:51 +00:00 |
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AMDGPUMCInstLower.h
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R600: BB operand support for SI
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2012-12-17 15:14:54 +00:00 |
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AMDGPURegisterInfo.cpp
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R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 23:24:32 +00:00 |
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AMDGPURegisterInfo.h
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R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 23:24:32 +00:00 |
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AMDGPURegisterInfo.td
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Make SubRegIndex size mandatory, following r183020.
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2013-05-31 23:45:26 +00:00 |
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AMDGPUSubtarget.cpp
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R600: Use StructurizeCFGPass for non SI targets
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2013-10-10 17:11:12 +00:00 |
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AMDGPUSubtarget.h
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R600/SI: Add compute support for CI v2
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2013-10-29 16:37:28 +00:00 |
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AMDGPUTargetMachine.cpp
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R600: Fix handling of vector kernel arguments
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2013-10-23 00:44:32 +00:00 |
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AMDGPUTargetMachine.h
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SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
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2013-07-27 00:01:07 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
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2013-07-27 00:01:07 +00:00 |
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AMDILBase.td
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R600: Move Subtarget feature definitions into AMDGPU.td
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2013-06-07 20:28:49 +00:00 |
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AMDILCFGStructurizer.cpp
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R600: Remove \ at EOL from ascii art comments.
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2013-10-18 14:12:50 +00:00 |
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AMDILInstrInfo.td
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R600: Enable -verify-machineinstrs in some tests.
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2013-10-01 19:32:38 +00:00 |
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AMDILIntrinsicInfo.cpp
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R600: Rework subtarget info and remove AMDILDevice classes
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2013-06-07 20:37:48 +00:00 |
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AMDILIntrinsicInfo.h
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
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AMDILIntrinsics.td
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R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern
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2013-02-18 14:11:28 +00:00 |
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AMDILISelLowering.cpp
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Make some arrays 'static const'
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2013-07-15 06:39:13 +00:00 |
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AMDILRegisterInfo.td
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CMakeLists.txt
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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LLVMBuild.txt
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Makefile
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Processors.td
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R600/SI: Add compute support for CI v2
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2013-10-29 16:37:28 +00:00 |
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R600ClauseMergePass.cpp
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R600: add a pass that merges clauses.
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2013-10-01 19:32:58 +00:00 |
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R600ControlFlowFinalizer.cpp
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
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R600Defines.h
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R600: Add support for i8 and i16 local memory stores
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2013-08-26 15:05:49 +00:00 |
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R600EmitClauseMarkers.cpp
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R600: Use StructurizeCFGPass for non SI targets
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2013-10-10 17:11:12 +00:00 |
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R600ExpandSpecialInstrs.cpp
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R600: Remove predicated_break inst
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2013-07-31 19:31:14 +00:00 |
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R600InstrFormats.td
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R600: Use SchedModel enum for is{Trans,Vector}Only functions
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2013-09-04 19:53:30 +00:00 |
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R600InstrInfo.cpp
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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R600InstrInfo.h
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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R600Instructions.td
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R600: Clear the VPM bit of export instructions.
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2013-10-13 17:55:57 +00:00 |
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R600Intrinsics.td
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R600: Add a ldptr intrinsic to support MSAA.
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2013-10-02 16:00:33 +00:00 |
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R600ISelLowering.cpp
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Fix a few typos
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2013-10-30 23:43:29 +00:00 |
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R600ISelLowering.h
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R600: Move fabs/fneg/sel folding logic into PostProcessIsel
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2013-09-12 23:44:44 +00:00 |
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R600MachineFunctionInfo.cpp
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R600/SI: Share code recording ShaderTypeAttribute between generations
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2013-04-01 21:47:53 +00:00 |
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R600MachineFunctionInfo.h
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Move passes from namespace llvm into anonymous namespaces. Sort includes while there.
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2013-05-23 17:10:37 +00:00 |
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R600MachineScheduler.cpp
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R600: Don't use trans slot for instructions that read LDS source registers
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2013-09-12 02:55:06 +00:00 |
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R600MachineScheduler.h
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R600: Non vector only instruction can be scheduled on trans unit
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2013-09-04 19:53:46 +00:00 |
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R600OptimizeVectorRegisters.cpp
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R600: Enable folding of inline literals into REQ_SEQUENCE instructions
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2013-08-16 01:11:55 +00:00 |
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R600Packetizer.cpp
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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R600RegisterInfo.cpp
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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R600RegisterInfo.h
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R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
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2013-08-14 23:24:32 +00:00 |
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R600RegisterInfo.td
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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R600Schedule.td
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R600: Add local memory support via LDS
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2013-06-28 15:47:08 +00:00 |
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R600TextureIntrinsicsReplacer.cpp
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R600: Coding style
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2013-09-05 23:55:13 +00:00 |
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SIAnnotateControlFlow.cpp
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Add 'const' qualifiers to static const char* variables.
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2013-07-16 01:17:10 +00:00 |
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SIDefines.h
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R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*
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2013-10-10 17:11:55 +00:00 |
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SIFixSGPRCopies.cpp
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R600/SI: Fix another case of illegal VGPR to SGPR copy
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2013-08-22 20:21:02 +00:00 |
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SIInsertWaits.cpp
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R600/SI: Fix broken encoding of DS_WRITE_B32
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2013-08-16 16:19:24 +00:00 |
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SIInstrFormats.td
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R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*
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2013-10-10 17:11:55 +00:00 |
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SIInstrInfo.cpp
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Target/R600: Un-tab-ify.
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2013-10-28 04:07:23 +00:00 |
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SIInstrInfo.h
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R600: Simplify handling of private address space
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2013-10-22 18:19:10 +00:00 |
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SIInstrInfo.td
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R600/SI: Define a separate MIMG instruction for each possible output value type
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2013-10-10 17:11:24 +00:00 |
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SIInstructions.td
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R600/SI: Add compute support for CI v2
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2013-10-29 16:37:28 +00:00 |
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SIIntrinsics.td
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R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback
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2013-09-12 02:55:14 +00:00 |
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SIISelLowering.cpp
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R600/SI: Replace ffs(x) - 1 with countTrailingZeros(x)
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2013-10-23 03:50:25 +00:00 |
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SIISelLowering.h
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R600: Fix handling of vector kernel arguments
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2013-10-23 00:44:32 +00:00 |
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SILowerControlFlow.cpp
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R600: Add support for local memory atomic add
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2013-09-05 18:38:09 +00:00 |
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SIMachineFunctionInfo.cpp
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R600/SI: Share code recording ShaderTypeAttribute between generations
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2013-04-01 21:47:53 +00:00 |
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SIMachineFunctionInfo.h
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R600/SI: Share code recording ShaderTypeAttribute between generations
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2013-04-01 21:47:53 +00:00 |
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SIRegisterInfo.cpp
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R600/SI: Mark the EXEC register as reserved
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2013-10-10 17:11:19 +00:00 |
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SIRegisterInfo.h
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R600/SI: Choose the correct MOV instruction for copying immediates
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2013-08-14 23:24:24 +00:00 |
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SIRegisterInfo.td
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R600: Fix handling of vector kernel arguments
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2013-10-23 00:44:32 +00:00 |
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SISchedule.td
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SITypeRewriter.cpp
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R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics
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2013-08-14 23:24:53 +00:00 |
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