llvm-6502/test/CodeGen/ARM
Evan Cheng 8239daf7c8 Two sets of changes. Sorry they are intermingled.
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
   "optimize for latency". Call instructions don't have the right latency and
   this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
   not # of micro-ops since multi-latency instructions is completely executed
   even when the predicate is false. Also, some instruction will be "slower"
   when they are predicated due to the register def becoming implicit input.
   rdar://8598427


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 00:45:17 +00:00
..
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll Two sets of changes. Sorry they are intermingled. 2010-11-03 00:45:17 +00:00
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-26-RegScavengerAssert.ll Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-07-jumptoentry.ll
2007-05-07-tailmerge-1.ll
2007-05-09-tailmerge-2.ll
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll
2007-05-23-BadPreIndexedStore.ll
2007-05-31-RegScavengerInfiniteLoop.ll Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll
2008-02-29-RegAllocLocal.ll
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-14-CoalescerBug.ll
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll
2009-05-07-RegAllocLocal.ll
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-12-RegScavengerAssert.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll
2009-06-30-RegScavengerAssert2.ll
2009-06-30-RegScavengerAssert3.ll
2009-06-30-RegScavengerAssert4.ll
2009-06-30-RegScavengerAssert5.ll
2009-06-30-RegScavengerAssert.ll
2009-07-01-CommuteBug.ll
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll
2009-07-22-ScavengerAssert.ll
2009-07-22-SchedulerAssert.ll
2009-07-29-VFP3Registers.ll
2009-08-02-RegScavengerAssert-Neon.ll
2009-08-04-RegScavengerAssert-2.ll
2009-08-04-RegScavengerAssert.ll
2009-08-15-RegScavenger-EarlyClobber.ll
2009-08-15-RegScavengerAssert.ll
2009-08-21-PostRAKill2.ll
2009-08-21-PostRAKill3.ll
2009-08-21-PostRAKill.ll
2009-08-23-linkerprivate.ll
2009-08-26-ScalarToVector.ll
2009-08-27-ScalarToVector.ll
2009-08-29-ExtractEltf32.ll
2009-08-29-TooLongSplat.ll
2009-08-31-LSDA-Name.ll
2009-08-31-TwoRegShuffle.ll
2009-09-09-AllOnes.ll
2009-09-09-fpcmp-ole.ll
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll
2009-09-22-LiveVariablesBug.ll
2009-09-23-LiveVariablesBug.ll
2009-09-24-spill-align.ll
2009-09-27-CoalescerBug.ll
2009-09-28-LdStOptiBug.ll User proper libcall names & condcodes while compiling for ARM EABI. 2010-09-28 21:39:26 +00:00
2009-10-02-NEONSubregsBug.ll
2009-10-21-InvalidFNeg.ll
2009-10-27-double-align.ll
2009-10-30.ll
2009-11-01-NeonMoves.ll
2009-11-02-NegativeLane.ll
2009-11-07-SubRegAsmPrinting.ll
2009-11-13-CoalescerCrash.ll
2009-11-13-ScavengerAssert2.ll
2009-11-13-ScavengerAssert.ll
2009-11-13-VRRewriterCrash.ll
2009-11-30-LiveVariablesBug.ll
2009-12-02-vtrn-undef.ll Add a testcase for svn 111208. 2010-08-16 23:44:29 +00:00
2010-03-04-eabi-fp-spill.ll
2010-03-04-stm-undef-addr.ll
2010-03-18-ldm-rtrn.ll
2010-04-07-DbgValueOtherTargets.ll
2010-04-09-NeonSelect.ll
2010-04-13-v2f64SplitArg.ll
2010-04-14-SplitVector.ll
2010-04-15-ScavengerDebugValue.ll
2010-05-14-IllegalType.ll
2010-05-17-DAGCombineAssert.ll
2010-05-17-FastAllocCrash.ll
2010-05-18-LocalAllocCrash.ll
2010-05-18-PostIndexBug.ll
2010-05-19-Shuffles.ll
2010-05-20-NEONSpillCrash.ll Add alignment arguments to all the NEON load/store intrinsics. 2010-08-27 17:13:24 +00:00
2010-05-21-BuildVector.ll Add alignment arguments to all the NEON load/store intrinsics. 2010-08-27 17:13:24 +00:00
2010-06-11-vmovdrr-bitcast.ll Add alignment arguments to all the NEON load/store intrinsics. 2010-08-27 17:13:24 +00:00
2010-06-21-LdStMultipleBug.ll
2010-06-21-nondarwin-tc.ll Temporarily disable tail calls on ARM to work around some linker problems. 2010-08-13 22:43:33 +00:00
2010-06-25-Thumb2ITInvalidIterator.ll
2010-06-28-DAGCombineUndef.ll
2010-06-29-PartialRedefFastAlloc.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
2010-06-29-SubregImpDefs.ll
2010-07-26-GlobalMerge.ll Currently EH lowering code expects typeinfo to be global only. 2010-07-26 18:45:39 +00:00
2010-08-04-EHCrash.ll Testcase for r110248. 2010-08-04 21:56:30 +00:00
2010-09-17-vmovrrd-combine.ll Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64 2010-09-17 22:59:05 +00:00
2010-09-21-OptCmpBug.ll OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison. 2010-09-21 23:49:07 +00:00
2010-09-29-mc-asm-header-test.ll Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() 2010-09-30 02:45:56 +00:00
2010-10-19-mc-elf-objheader.ll Add support for emitting ARM file attributes. 2010-10-25 17:50:35 +00:00
2010-10-25-ifcvt-ldm.ll When the "true" and "false" blocks of a diamond if-conversion are the same, 2010-10-26 00:02:24 +00:00
addrmode.ll
aliases.ll
align.ll Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits. 2010-09-29 17:54:10 +00:00
alloca.ll
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll
arguments8.ll
arguments_f64_backfill.ll
arguments-nosplit-double.ll
arguments-nosplit-i64.ll
arguments.ll - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This 2010-10-06 06:27:31 +00:00
arm-and-tst-peephole.ll When we look at instructions to convert to setting the 's' flag, we need to look 2010-11-01 20:41:43 +00:00
arm-asm.ll
arm-frameaddr.ll
arm-negative-stride.ll
arm-returnaddr.ll
armv4.ll
bfc.ll
bfi.ll Update tests to handle MC-inst instruction printing of shift operations. The 2010-09-17 21:58:46 +00:00
bfx.ll
bic.ll
bits.ll FileCheck-ize 2010-09-17 21:46:16 +00:00
bx_fold.ll
call_nolink.ll
call-tc.ll Temporarily disable tail calls on ARM to work around some linker problems. 2010-08-13 22:43:33 +00:00
call.ll
carry.ll
clz.ll FileCheck-ize a few tests. 2010-10-22 21:55:03 +00:00
code-placement.ll Explicitly disable CGP critical edge splitting for this test so it won't break 2010-09-27 18:43:43 +00:00
compare-call.ll
constants.ll tidy up 2010-10-22 23:46:04 +00:00
crash-O0.ll
crash.ll Simplify test and move into a generic "crash" ll file. 2010-10-09 00:29:04 +00:00
cse-libcalls.ll
ctors_dtors.ll
ctz.ll
dg.exp
div.ll Report error if codegen tries to instantiate a ARM target when the cpu does support it. e.g. cortex-m* processors. 2010-08-11 07:17:46 +00:00
dyn-stackalloc.ll
extloadi1.ll
fabss.ll Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 2010-10-28 06:47:08 +00:00
fadds.ll Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 2010-10-28 06:47:08 +00:00
fast-isel.ll Revert r116220 - thus turning arm fast isel back on by default. 2010-10-18 22:53:53 +00:00
fcopysign.ll
fdivs.ll Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 2010-10-28 06:47:08 +00:00
fixunsdfdi.ll
flag-crash.ll
fmacs.ll Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 2010-10-28 06:47:08 +00:00
fmdrr-fmrrd.ll
fmscs.ll Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 2010-10-28 06:47:08 +00:00
fmuls.ll Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 2010-10-28 06:47:08 +00:00
fnegs.ll
fnmacs.ll
fnmscs.ll
fnmul.ll
fnmuls.ll Fix an unnecessary XFAIL 2010-09-02 20:19:24 +00:00
formal.ll
fp16.ll
fp_convert.ll
fp.ll tweak test to check instructions rather than relying on the comment string 2010-09-17 20:21:03 +00:00
fparith.ll
fpcmp_ueq.ll Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857. 2010-10-29 23:36:03 +00:00
fpcmp-opt.ll Split -enable-finite-only-fp-math to two options: 2010-07-15 22:07:12 +00:00
fpcmp.ll
fpconsts.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
fpconv.ll
fpmem.ll
fpow.ll
fpowi.ll Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
fptoint.ll
fsubs.ll
globals.ll
hardfloat_neon.ll
hello.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis.ll
iabs.ll
ifcvt1.ll
ifcvt2.ll
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll
ifcvt6.ll
ifcvt7.ll
ifcvt8.ll
ifcvt9.ll
ifcvt10.ll Two sets of changes. Sorry they are intermingled. 2010-11-03 00:45:17 +00:00
ifcvt11.ll Two sets of changes. Sorry they are intermingled. 2010-11-03 00:45:17 +00:00
illegal-vector-bitcast.ll
imm.ll
indirectbr.ll
inlineasm2.ll
inlineasm3.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
inlineasm-imm-arm.ll
inlineasm.ll
insn-sched1.ll
ispositive.ll Update tests to handle MC-inst instruction printing of shift operations. The 2010-09-17 21:58:46 +00:00
large-stack.ll
ldm.ll
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd.ll
load.ll
long_shift.ll When we look at instructions to convert to setting the 's' flag, we need to look 2010-11-01 20:41:43 +00:00
long-setcc.ll
long.ll tweak test to check instructions rather than relying on the comment string 2010-09-17 20:27:26 +00:00
lsr-code-insertion.ll Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke 2010-11-02 17:35:25 +00:00
lsr-on-unrolled-loops.ll Two sets of changes. Sorry they are intermingled. 2010-11-03 00:45:17 +00:00
lsr-scale-addr-mode.ll
machine-cse-cmp.ll
mem.ll
memcpy-inline.ll
memfunc.ll
mls.ll
movt-movw-global.ll
movt.ll
mul_const.ll Update tests to handle MC-inst instruction printing of shift operations. The 2010-09-17 21:58:46 +00:00
mul.ll
mulhi.ll
mult-alt-generic-arm.ll Inline asm mult-alt constraint tests. 2010-11-02 23:01:44 +00:00
mvn.ll
neon_arith1.ll
neon_ld1.ll
neon_ld2.ll
neon_minmax.ll
pack.ll Remove duplicate test. 2010-10-22 22:04:28 +00:00
pr3502.ll
private.ll
reg_sequence.ll Two sets of changes. Sorry they are intermingled. 2010-11-03 00:45:17 +00:00
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_void.ll
rev.ll FileCheck-ize a few tests. 2010-10-22 21:55:03 +00:00
sbfx.ll
section.ll
select_xform.ll
select-imm.ll Allow use of the 16-bit literal move instruction in CMOVs for ARM mode. 2010-10-07 00:42:42 +00:00
select.ll - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This 2010-10-06 06:27:31 +00:00
shifter_operand.ll Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 2010-10-28 06:47:08 +00:00
smul.ll
spill-q.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
stack-frame.ll
stm.ll Teach the (non-MC) instruction printer to use the cannonical names for push/pop, 2010-09-17 22:36:38 +00:00
str_post.ll
str_pre-2.ll FileCheck'ize 2010-10-26 21:26:47 +00:00
str_pre.ll
str_trunc.ll
sub.ll Improve 64-subtraction of immediates when parts of the immediate can fit 2010-07-14 17:45:16 +00:00
sxt_rot.ll
t2-imm.ll Fix borken test 2010-08-30 23:41:49 +00:00
tail-opts.ll
thread_pointer.ll
tls1.ll
tls2.ll
tls3.ll
trap.ll
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
uint64tof64.ll
unaligned_load_store.ll Add a command line option "-arm-strict-align" to disallow unaligned memory 2010-09-28 04:09:35 +00:00
unord.ll
uxt_rot.ll
uxtb.ll
va_arg.ll
vaba.ll Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the 2010-09-03 01:35:08 +00:00
vabd.ll Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the 2010-09-03 01:35:08 +00:00
vabs.ll
vadd.ll Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm 2010-08-29 05:57:34 +00:00
vargs_align.ll
vargs.ll
vbits.ll
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vcnt.ll
vcombine.ll
vcvt.ll
vdup.ll
vext.ll Allow more cases of undef shuffle indices and add tests for them. 2010-08-17 05:54:34 +00:00
vfcmp.ll
vfp.ll
vget_lane.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vhadd.ll
vhsub.ll
vicmp.ll
vld1.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vld2.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vld3.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vld4.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vldlane.ll Add support for alignment operands on VLD1-lane instructions. 2010-11-01 23:40:51 +00:00
vminmax.ll
vmla.ll Remove DAG combiner patch to fold vector splats. Instcombiner does it now. 2010-10-29 22:03:02 +00:00
vmls.ll Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, 2010-09-01 23:50:19 +00:00
vmov.ll NEON does not support truncating vector stores. Radar 8598391. 2010-11-01 18:31:39 +00:00
vmul.ll Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, 2010-09-01 23:50:19 +00:00
vneg.ll
vpadal.ll
vpadd.ll
vpminmax.ll
vqadd.ll
vqdmul.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll SelectionDAG shuffle nodes do not allow operands with different numbers of 2010-10-27 20:38:28 +00:00
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vst2.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vst3.ll Set alignment operand for NEON VST instructions. 2010-09-23 23:42:37 +00:00
vst4.ll Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
vstlane.ll Support alignment for NEON vld-lane and vst-lane instructions. 2010-10-19 00:16:32 +00:00
vsub.ll Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm 2010-08-29 05:57:34 +00:00
vtbl.ll
vtrn.ll Allow more cases of undef shuffle indices and add tests for them. 2010-08-17 05:54:34 +00:00
vuzp.ll Allow more cases of undef shuffle indices and add tests for them. 2010-08-17 05:54:34 +00:00
vzip.ll Allow more cases of undef shuffle indices and add tests for them. 2010-08-17 05:54:34 +00:00
weak2.ll
weak.ll