Apple-1-HW/Apple1_MiST
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84 Commits 1 Branch 0 Tags 2.5 MiB
587d2fd886
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Author SHA1 Message Date
nino-porcino
587d2fd886 add global clock to make it Sidi-complaint 2022-05-21 15:08:36 +02:00
nino-porcino
14464df7bc reduce block RAM size when using TMS & SID 2022-05-21 15:05:45 +02:00
nino-porcino
e365dc059d support CTRL keys; add ESC and other missing keys 2022-05-21 12:50:55 +02:00
nino-porcino
3542d776f2 attempt to use another clock source for SDRAM 2022-05-21 12:50:02 +02:00
nino-porcino
aa6042cabd rename sdram_* into bus_*; use assign instead of always block; optional SDRAM at $4000 2022-05-21 12:48:14 +02:00
nino-porcino
5dfe5a041c update TODO and format code 2022-05-07 11:41:49 +02:00
nino-porcino
0164f7da54 add PIA 6821 to project (not connected) 2022-05-07 11:41:22 +02:00
nino-porcino
18a124383f copy pin assigments from VIC20_MiST 2022-05-07 11:40:27 +02:00
nino-porcino
a41bb35646 do not use system reset for display 2022-05-07 11:39:28 +02:00
nino-porcino
6c292189f9 remove Arlet's CPU reference 2022-05-07 11:38:37 +02:00
nino-porcino
e8b3a6fdc3 replace Arlet Ottens's 6502 with T65 2022-05-04 14:16:18 +02:00
nino-porcino
abfe99721e code format 2022-05-04 14:15:09 +02:00
nino-porcino
44398c6668 fix typo in comment 2022-05-04 14:14:42 +02:00
nino-porcino
33433c5722 fix basic .prg programs in zip file 2022-04-23 10:30:19 +02:00
nino-porcino
c716be36ae new release, add sdcard prg files 2022-04-22 14:16:37 +02:00
nino-porcino
e9e60a5fb5 improve display accuracy 2022-03-19 11:03:38 +01:00
nino-porcino
b4d78e99e7 add debounce filter to cassette input 2022-03-15 17:05:48 +01:00
nino-porcino
076e8f48c6 fix SDRAM download of files 2022-03-15 17:05:23 +01:00
nino-porcino
2c21893f52 remove old code 2022-03-15 17:04:59 +01:00
nino-porcino
7d52fa05ea halt CPU when downloading 2022-03-15 17:04:39 +01:00
nino-porcino
d24a1e174b typo 2022-01-16 23:45:16 +01:00
nino-porcino
c226e0101e Update README.md 2022-01-15 13:01:39 +01:00
nino-porcino
9a99868768 Update README.md 2022-01-15 12:58:43 +01:00
nino-porcino
6a71c1a022 Update README.md 2022-01-15 12:58:23 +01:00
nino-porcino
8dccedf575 release 2022.01.15 2022-01-15 12:57:17 +01:00
nino-porcino
c2835287d5 make SID & TMS9918 optional 2022-01-15 12:56:56 +01:00
nino-porcino
18342348aa Update README.md 2022-01-15 12:44:30 +01:00
nino-porcino
c511cf1571 revert using empty power up display values 2022-01-15 10:57:00 +01:00
nino-porcino
de3902a843 update TODO list 2022-01-15 10:56:41 +01:00
nino-porcino
22f36f9187 more accurate cursor blinking 2022-01-15 10:56:21 +01:00
nino-porcino
cb7aeba5a9 add experimental SID 6581 2022-01-15 10:12:46 +01:00
nino-porcino
071afcf1b1 emulate crosstalk display artifact 2022-01-09 19:27:54 +01:00
nino-porcino
b55ca2d093 add handy batch file to copy output to FPGA 2022-01-09 17:39:09 +01:00
nino-porcino
3e96858500 emulate RAM refresh lost CPU cycles 2022-01-09 17:38:47 +01:00
nino-porcino
72ab288cc7 more accurate power up display ram values 2022-01-09 17:38:13 +01:00
nino-porcino
1ca15c1f8a do not reset keyboard registers 2022-01-09 17:37:41 +01:00
nino-porcino
c2223a3845 fix reset key bug 2022-01-08 14:39:07 +01:00
nino-porcino
6da2127cec connect interrupt pin 2022-01-08 14:23:29 +01:00
nino-porcino
5445cd8335 remove char_seen from display; update todo 2022-01-08 13:53:02 +01:00
nino-porcino
d2db7d0b53 reset keyboard key; audio monitor option 2022-01-08 13:36:51 +01:00
nino-porcino
6526b236e3 prepare for refresh rate emulation 2022-01-08 12:28:06 +01:00
nino-porcino
c3e75e4859 update todo 2022-01-08 11:43:19 +01:00
nino-porcino
c9b08a2b92 add missing signals 2022-01-08 00:15:58 +01:00
nino-porcino
1e7fba455a rename member 2022-01-08 00:15:43 +01:00
nino-porcino
41215bdd99 add tms9918, aci 2022-01-07 21:30:52 +01:00
nino-porcino
d76ecb6a34 rename vram into display_ram 2022-01-07 21:29:49 +01:00
nino-porcino
8610078267 format code 2022-01-07 21:28:11 +01:00
nino-porcino
363ce3c3f0 Update README.md 2022-01-06 10:48:31 +01:00
nino-porcino
dee2d5221b cls key, slow down display to 1 char/frame 2022-01-06 10:45:54 +01:00
nino-porcino
624652c8ce update todo 2022-01-05 21:40:31 +01:00