Florian Reitz
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02d9e608e1
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Program enable added and verified
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2019-03-03 10:21:02 +01:00 |
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Florian Reitz
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91d54ddd9c
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AddressDecoder verified in simulation
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2019-03-03 10:20:50 +01:00 |
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Florian Reitz
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70c0c118fc
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Expected results added to AddressDecoder simulation
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2019-03-03 10:20:46 +01:00 |
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Florian Reitz
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7a0480f05e
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LED removed from AddressDecoder
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2019-03-03 10:20:40 +01:00 |
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Florian Reitz
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936a0c2b5a
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NWE added to schematic and layout
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2019-03-03 10:20:36 +01:00 |
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Florian Reitz
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b50b1037fd
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NWE signal added, not tested
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2019-03-03 10:20:33 +01:00 |
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Florian Reitz
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6ed5304e10
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Timing diagrams
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2019-03-03 10:20:29 +01:00 |
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Florian Reitz
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bc75ba9eb6
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Fix in ProDOS write
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2019-03-03 10:20:14 +01:00 |
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Florian Reitz
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e21bde80bd
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Merge branch 'Smartport'
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2018-07-07 17:28:58 +02:00 |
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Florian Reitz
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0ba00e76ce
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Nasty bug in Status call fixed
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2018-07-07 17:28:30 +02:00 |
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Florian Reitz
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8348d6d2dc
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Status00 call updated
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2018-05-29 23:12:04 +02:00 |
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Florian Reitz
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06739f1d19
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Smartport seems to work
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2018-05-29 00:36:56 +02:00 |
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Florian Reitz
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e4718163a2
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Timing overview added
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2018-05-25 10:59:44 +02:00 |
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Florian Reitz
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0c64c93efb
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Status command added
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2018-05-24 10:56:46 +02:00 |
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Florian Reitz
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ad4c2939b8
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Smartport Control added
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2018-05-24 09:44:21 +02:00 |
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Florian Reitz
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b62f7cfda0
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All Smartport functions except Status and Control added
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2018-05-23 22:17:19 +02:00 |
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Florian Reitz
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0910ca3db0
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Smartport dispatcher added
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2018-05-23 20:51:44 +02:00 |
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Florian Reitz
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457e8bff9c
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Prepared for Smartport
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2018-05-22 21:53:11 +02:00 |
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Florian Reitz
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31817a481c
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Save zeropage in loop
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2018-05-17 22:41:48 +02:00 |
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Florian Reitz
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515c19684e
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ProDOS jump table moved
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2018-05-17 22:41:24 +02:00 |
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Florian Reitz
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048d1df99a
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Error codes added
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2018-05-17 22:41:02 +02:00 |
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Florian Reitz
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2daaa107a0
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Smartport.s added
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2018-05-17 22:40:38 +02:00 |
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Unknown
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214344086b
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Merge remote-tracking branch 'origin/master'
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2018-03-14 13:57:29 +01:00 |
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Florian Reitz
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f1993542e2
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ProDOS image for testing added
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2017-12-23 13:38:56 +01:00 |
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Florian Reitz
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fe9ae43e09
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Test with phantom slots
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2017-12-19 15:20:59 +01:00 |
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Florian Reitz
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06efc602c4
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Merge branch 'devel'
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2017-12-19 15:15:53 +01:00 |
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Florian Reitz
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13bfa30227
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ProDOS functions moved to separate file
Debug functions removed
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2017-12-17 20:42:37 +01:00 |
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Florian Reitz
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f656800697
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Updated to V1.1
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2017-12-17 20:23:38 +01:00 |
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Unknown
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4cd6a76790
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Fix for non-SDHC SDV2
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2017-12-16 15:19:07 +01:00 |
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Florian Reitz
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4be091a1cb
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Helper and include files added
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2017-12-12 19:19:06 +01:00 |
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Florian Reitz
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0b33b5d385
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Gerber for V1.1
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2017-12-07 18:42:10 +01:00 |
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Florian Reitz
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b28b7481e2
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Gerber for V1.1
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2017-12-05 18:38:40 +01:00 |
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Unknown
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52852a3a07
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Merge remote-tracking branch 'origin/master'
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2017-12-02 00:46:58 +01:00 |
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Unknown
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05791c4e3d
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Schematic PDF updated
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2017-12-02 00:46:29 +01:00 |
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Unknown
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db0bf9dd5b
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Schematic PDF updated
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2017-12-01 15:05:22 +01:00 |
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Florian Reitz
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85687ed649
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README.md updated
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2017-12-01 14:26:18 +01:00 |
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Florian Reitz
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c93b63a92c
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Skip boot added
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2017-11-30 16:25:11 +01:00 |
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Florian Reitz
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331b84cc17
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Change in makefile and folder structure
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2017-11-30 13:00:06 +01:00 |
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Unknown
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2df245675d
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Schematic updated
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2017-11-30 12:14:54 +01:00 |
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Florian Reitz
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ab87f81ba8
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Boot verified for IIgs, IIe 128k and IIe 64k
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2017-11-29 01:20:44 +01:00 |
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Florian Reitz
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741624f3b5
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IIgs boot working!!!
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2017-11-26 21:26:15 +01:00 |
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Florian Reitz
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4feea40b5d
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VS2015 project added
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2017-11-26 00:19:35 +01:00 |
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Florian Reitz
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0f92b7cf03
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Source updated for CC65
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2017-11-25 23:23:25 +01:00 |
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freitz85
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505fe10434
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SDHC flag added to CPLD
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2017-11-25 19:42:33 +01:00 |
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Florian Reitz
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6517f86ce3
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Load block 0 and 1 on boot
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2017-11-20 19:13:16 +01:00 |
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freitz85
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9aa65960c4
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SPI Mode 3
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2017-11-01 16:50:56 +01:00 |
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Florian Reitz
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e9bd383d2e
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Save and restore ZP locations
Shorter read write loops
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2017-11-01 16:22:35 +01:00 |
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freitz85
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cf98c54e77
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Linear addressing from Cn00
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2017-10-23 22:42:27 +02:00 |
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Florian Reitz
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b0df142692
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Linear addressing from C700, test code added to ram
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2017-10-22 20:50:14 +02:00 |
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Florian Reitz
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9e674fe0c6
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Hex file for new address mapping
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2017-10-17 00:06:33 +02:00 |
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