Commit Graph

58 Commits

Author SHA1 Message Date
freitz85
c41ff87f8f Merge remote-tracking branch 'origin/devel' into devel 2017-10-09 22:30:03 +02:00
Unknown
4f3dca7cc9 Timing diagram added 2017-10-09 08:49:22 +02:00
freitz85
84cfbdde92 test with clocked input buffers 2017-10-08 21:48:07 +02:00
Florian Reitz
ff074dc995 Merge remote-tracking branch 'origin/devel' into devel 2017-10-05 23:12:47 +02:00
Florian Reitz
763a99022c Merge branch 'master' into devel 2017-10-05 23:05:31 +02:00
Florian Reitz
75b50c96ce Check for init failure 2017-10-05 23:03:31 +02:00
Florian Reitz
d0a9254893 several fixes tried 2017-10-05 22:57:38 +02:00
Unknown
a15abda39b PLCC44 Socket Pinout 2017-10-05 19:30:21 +02:00
Florian Reitz
c438775789 Check for init failure 2017-10-03 17:46:50 +02:00
freitz85
9c3b1c33ff Reset inited on card remove 2017-09-10 14:07:23 +02:00
freitz85
04e26f32da Update to ISE 14.7 2017-09-10 13:41:13 +02:00
Florian Reitz
2a06e1ba5d Support for second partition, card detect and write protect added 2017-09-09 20:34:24 +02:00
Florian Reitz
b845ad2cc9 Merge remote-tracking branch 'origin/master' 2017-09-05 20:03:46 +02:00
freitz85
8b8e22c796 misc datasheets added 2017-09-05 18:09:19 +02:00
freitz85
7425ad32fc formatting 2017-09-03 14:51:09 +02:00
freitz85
63313fd7fa inited flag is removed when card is ejected 2017-08-31 01:07:34 +02:00
Florian Reitz
30f6b89f2b inited flag in fpga 2017-08-27 15:02:58 +02:00
freitz85
19632c05dc inited signal added to cpld 2017-08-27 12:21:26 +02:00
Florian Reitz
f3751b90fb 7MHz clock used, read/write improved
reverted to Merlin-8
2017-08-27 00:37:54 +02:00
Florian Reitz
6e37a8c482 Code updated for Merlin32 2017-08-26 13:07:42 +02:00
Florian Reitz
f9f042748d Update README.md 2017-08-26 12:50:55 +02:00
freitz85
795142ba20 Images added 2017-08-26 11:46:29 +02:00
freitz85
5f9e6809b8 Schematic as PDF and BOM 2017-08-24 17:39:23 +02:00
freitz85
0a231537c5 Update README.md 2017-08-23 19:37:40 +02:00
freitz85
c49f8279b6 Create README.md 2017-08-22 19:35:53 +02:00
freitz85
12a480b11d Add files via upload 2017-08-21 22:26:14 +02:00
Unknown
3edc480c74 Fix for crc after read command 2017-08-13 13:47:20 +02:00
Unknown
92f8061ea8 Fix for line ending 2017-08-13 13:34:15 +02:00
Unknown
ff87291902 several fixes, not completely booting 2017-08-12 17:56:49 +02:00
freitz85
fcf4e95c10 Small changes on board 2017-08-11 23:34:41 +02:00
Unknown
7d67a7b4d5 Several fixes, binary and srec files added 2017-08-11 22:59:02 +02:00
freitz85
de4edffe30 Update .gitattributes 2017-08-02 19:50:12 +02:00
freitz85
e4d48edfbd Create .gitattributes 2017-08-02 19:48:45 +02:00
freitz85
f7c7c88e65 - Gerber files 2017-07-18 10:50:51 +02:00
freitz85
7391fa7cbc Fixed bug in Write Block 2017-07-16 23:29:09 +02:00
freitz85
624bd4e9a7 Debug flags added, block and command sequences moved to subroutine 2017-07-16 15:36:47 +02:00
freitz85
240b301bad Source and Listing updated to ROM location 2017-07-15 18:32:17 +02:00
freitz85
c185b53681 R and C changed to SMD 2017-07-12 22:23:15 +02:00
freitz85
4d7a7bcec0 Datasheets added 2017-07-11 09:54:20 +02:00
freitz85
dd4ecb5a7f test 2017-07-10 12:11:24 +02:00
freitz85
475a41b5de Merlin 8 source added 2017-07-09 13:40:47 +02:00
freitz85
596e7c3f1f Pin changes 2017-07-09 13:28:18 +02:00
freitz85
d498ee4a58 Pin changes, libraries added 2017-07-09 13:25:20 +02:00
freitz85
21117e8847 !CE on GND 2017-07-05 23:55:13 +02:00
freitz85
21acf3ac24 signal rename and pinning 2017-07-05 23:28:27 +02:00
freitz85
f851a50f65 Pinning changed 2017-07-05 22:17:58 +02:00
freitz85
162ce22536 Address decoding corrected 2017-07-05 22:13:41 +02:00
freitz85
a4ee5d055a file rename 2017-07-05 20:07:55 +02:00
freitz85
933ba500c2 .gitignore 2017-07-05 19:46:39 +02:00
freitz85
94c57bb52e ignored Xilinx files 2017-07-05 19:45:53 +02:00