Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, or distribution of this software is strictly prohibited.
@N:<ahref="@N:CD720:@XP_HELP">CD720</a> : <ahref="E:\ispLEVER_Classic2_0\synpbase\lib\vhd\std.vhd:123:18:123:22:@N:CD720:@XP_MSG">std.vhd(123)</a><!@TM:1515698181> | Setting time resolution to ns
@N: : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:13:7:13:15:@N::@XP_MSG">68030-68000-bus.vhd(13)</a><!@TM:1515698181> | Top entity is set to BUS68030.
@N:<ahref="@N:CD233:@XP_HELP">CD233</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:70:10:70:12:@N:CD233:@XP_MSG">68030-68000-bus.vhd(70)</a><!@TM:1515698181> | Using sequential encoding for type sm_e
@N:<ahref="@N:CD233:@XP_HELP">CD233</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:87:14:87:16:@N:CD233:@XP_MSG">68030-68000-bus.vhd(87)</a><!@TM:1515698181> | Using sequential encoding for type sm_68000
<fontcolor=#A52A2A>@W:<ahref="@W:CD638:@XP_HELP">CD638</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:130:7:130:18:@W:CD638:@XP_MSG">68030-68000-bus.vhd(130)</a><!@TM:1515698181> | Signal clk_out_pre is undriven </font>
<fontcolor=#A52A2A>@W:<ahref="@W:CD638:@XP_HELP">CD638</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:134:7:134:16:@W:CD638:@XP_MSG">68030-68000-bus.vhd(134)</a><!@TM:1515698181> | Signal clk_030_h is undriven </font>
<fontcolor=#A52A2A>@W:<ahref="@W:CL271:@XP_HELP">CL271</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL271:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... </font>
@N:<ahref="@N:CL201:@XP_HELP">CL201</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@N:CL201:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Trying to extract state machine for register SM_AMIGA
@N:<ahref="@N:CL201:@XP_HELP">CL201</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@N:CL201:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Trying to extract state machine for register cpu_est
<fontcolor=#A52A2A>@W:<ahref="@W:CL246:@XP_HELP">CL246</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:24:1:24:9:@W:CL246:@XP_MSG">68030-68000-bus.vhd(24)</a><!@TM:1515698181> | Input port bits 15 to 2 of a_decode(23 downto 2) are unused </font>
<fontcolor=#A52A2A>@W:<ahref="@W:CL159:@XP_HELP">CL159</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:34:1:34:8:@W:CL159:@XP_MSG">68030-68000-bus.vhd(34)</a><!@TM:1515698181> | Input CLK_030 is unused</font>
<fontcolor=#A52A2A>@W:<ahref="@W:CL158:@XP_HELP">CL158</a> : <ahref="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:50:1:50:6:@W:CL158:@XP_MSG">68030-68000-bus.vhd(50)</a><!@TM:1515698181> | Inout RESET is unused</font>
<aname=mapperReport2>Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014</a>
Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited.
@N:<ahref="@N:FC100:@XP_HELP">FC100</a> : <!@TM:1515698184> | Timing Report not generated for this device, please use place and route tools for timing analysis.