Andrew Makousky
20c56b0eda
Revisited PAL logic equations, now looking really great!
2021-04-03 16:44:32 -05:00
Andrew Makousky
4b6025439a
Add useful datasheets and info when working with BBU.
2020-12-31 10:06:37 -06:00
Andrew Makousky
7669cfec2e
Add CAS PAL.
2020-12-31 09:23:08 -06:00
Andrew Makousky
cd0f4a244e
Documentation updates.
2020-12-31 08:27:53 -06:00
Andrew Makousky
198bf1fac1
ASG on mac128pal.v, documentation links.
2020-12-30 17:02:42 -06:00
Andrew Makousky
7be998a7e5
mac128k PAL equations looking pretty good now.
2020-12-27 22:25:03 -06:00
Andrew Makousky
bf64640d5a
Fix some of the mac128pal problems.
2020-12-27 18:43:37 -06:00
Andrew Makousky
92edcf0931
Transition to continuous assign, revealed equation problems.
...
But otherwise with problems fixed, simulation should be a lot faster.
2020-12-27 15:52:23 -06:00
Andrew Makousky
56dd957402
Mac 128k PAL signals mostly working, hooray!
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Also start working on BBU video timing signals, and documentation
improvements.
2020-12-27 09:19:35 -06:00
Andrew Makousky
306024838b
Finally figured out S5 is a pull-up resistor.
2020-12-24 11:23:08 -06:00
Andrew Makousky
b957f0cb84
Commit work-in-progress.
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Some improvements made on accuracy of circuit descriptions.
2020-12-22 18:05:27 -06:00
Andrew Makousky
6618602b1a
BBU: Fix standard logic sim errors, naming improvement.
2020-11-30 13:50:57 -06:00
Andrew Makousky
fe87fea02c
Fixes to mac128k PAL simulation issues, more documentation.
2020-11-28 16:36:09 -06:00
Andrew Makousky
c490406c81
BBU: More analysis and insight.
2020-11-25 17:18:41 -06:00
Andrew Makousky
602a9b564d
BBU: Add DRAM sim, almost done with mac128k.
2020-11-25 06:04:07 -06:00
Andrew Makousky
6678c4b2ab
Commit BBU work-in-progress.
...
For comparative simulation, I'm also assembling the logic of the earlier
Macintosh 128K, and possibly also Macintosh Plus, in Verilog, and
planning on doing MLB board-level simulations too.
2020-11-25 01:05:48 -06:00
Andrew Makousky
4fa9303844
BBU: Commit work-in-progress, lots of corrections to be made.
2020-11-20 20:19:52 -06:00
Andrew Makousky
62d2e920e7
Commit work-in-progress.
...
Much better BBU pinout chart, lots of notes learned from Guide to the
Macintosh family hardware.
2020-11-18 10:21:05 -06:00
Andrew Makousky
12eb917c24
Fix macro use bugs found with new iverilog.
2020-11-15 22:29:54 -06:00
Andrew Makousky
757acda304
Better BBU README documentation.
2020-11-15 22:03:08 -06:00
Andrew Makousky
58759b51b8
BBU work-in-progress, fix a few documentation issues.
2020-11-15 20:36:44 -06:00
Andrew Makousky
f9200e43ac
Commit work-in-progress of BBU FPGA in Verilog.
2020-10-25 09:00:40 -05:00
Andrew Makousky
389122f2aa
Fix some Mac SE schematic redraw errors, more detailed BBU notes.
2020-10-18 14:47:39 -05:00
Andrew Makousky
cbf688bd19
Better info on BBU functions.
2020-10-18 12:15:14 -05:00
Andrew Makousky
4b8dad3033
Note reserved status of "*EAREN" signal.
2020-08-10 14:33:54 -05:00
Andrew Makousky
6ca3b92810
Document "*EXT.DTK" signal properly.
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PDS slot pinouts have now been verified, remove TODO note.
2020-08-08 19:05:41 -05:00
Andrew Makousky
7d7a495cae
Comments on BBU functions and signal discipline.
2020-08-07 04:48:07 -05:00
Andrew Makousky
4ce5af75c2
Initial commit
2020-08-06 18:06:49 -05:00