30c6cbefbd
ppcexec: fix indentation, break long lines.
2024-03-06 23:28:40 +01:00
20b4a33c00
ppcexec: Remove EXHAUSTIVE_DEBUG.
2024-03-05 07:05:03 -07:00
f61055ebc0
ppcexec: Convert if to switch for ppc_opcode19.
2024-03-05 07:03:16 -07:00
177098c957
debugger: Fix interrupt signal.
...
Typing Control-C in Terminal app causes an interrupt signal that should enter the DPPC debugger but this only worked once since the signal handler never returned. Even if the signal handler reenabled the signal somehow, it calls enter_debugger recursively which is strange since the earlier calls to enter_debugger would never return.
Now the signal handler just sets a flag (power_on) which can be used to exit any loop (emulator loops, stepping loops, disassembly loops, dumping loops).
Main always calls enter_debugger now which calls the ppc_exec loop. The power_on flag will exit the ppc_exec loop to return to the debugger. Recursion of enter_debugger is eliminated except for calls to loguru's ABORT_F.
An enum power_off_reason is used to indicate why the power_on flag is set to false and to determine what happens next.
2024-03-02 12:57:02 -07:00
de73a36399
ppcmmu: Move defines to the top.
2024-03-02 07:58:25 -07:00
c9aed600b6
More opcode clean-up
2024-03-02 07:57:15 -07:00
318e035344
ppcmmu: Shorten tlb_flush_entries.
2024-03-02 07:56:26 -07:00
cd097232cb
ppcmmu: Shorten tlb_flush_entry.
...
Don't need a weird short loop.
2024-03-02 07:56:17 -07:00
b7b783b6be
ppcmmu: Shorten ppc_mmu_init.
...
Also, initialize all the fields.
2024-03-02 07:50:02 -07:00
968f503d80
debugger: Improve my_sprintf for short strings.
...
Don't need to repeat snprintf with memory allocation if the string is short.
2024-03-02 07:24:17 -07:00
3bea3ec3d8
ppcmmu: Fix compiler warnings.
2024-03-01 20:12:42 -07:00
0f66d454c1
ppcmmu: Cleanup the cleanup.
2024-03-01 20:05:10 -07:00
6738d7472e
ppcmmu: Add a function to get phys address.
...
Since the function is for the debugger during stepping or disassembly, don't do extra logging.
2024-03-01 19:48:52 -07:00
500f38a496
ppcmmu: Add phys address to mmu_translate_imem.
...
For debugging.
2024-03-01 19:45:09 -07:00
3a5a70b56d
ppcmmu: Allow convert virtual to physical address.
...
The TLBEntries allow converting virtual guest address to virtual host address but there's no easy way to get a guest physical address for debugging purposes.
Add a phys_tag field to fix that.
2024-03-01 19:42:25 -07:00
15e132c824
cmake: Add header files in CMakeLists.txt.
...
So they will appear in Xcode project.
mkdir -p dingusppc/build-xcode
cd dingusppc/build-xcode
cmake -G Xcode ..
xcodebuild -configuration Release
2024-03-01 19:41:43 -07:00
2b3cf58b8a
Continued clean-up
2024-03-01 19:40:46 -07:00
ebac8b92ba
Clean-up for loading instructions
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Expanding the scope of the clean-up from lscbx to other loading/storing instructions.
2024-03-01 07:57:46 -07:00
6a4326af39
poweropcodes: lscbx cleanup.
2024-03-01 07:46:04 -07:00
ff5c43e6cb
debugger: Add mregs command.
...
To dump more registers.
2024-02-29 21:46:44 -07:00
7cd3aae753
debugger: Fix repeated until.
...
The loop needs to be do while instead of while do.
2024-02-29 18:57:11 -07:00
fe05b1de12
Fix compiler warnings.
...
Xcode build has compiler warnings involving loss of precision. Remove them by adding type casts. Check results in some cases for overflow.
2024-02-29 18:49:14 -07:00
1903c8b557
debugger: Fix reg_op for floating point registers.
2024-02-29 18:48:59 -07:00
456a96042f
debugger: Shorten try catch in reg_op.
...
Because SPGR0 matches SPR but stoul causes an exception.
2024-02-29 07:55:09 -07:00
888df0ac53
debugger: Add more register names for reg_op.
...
So the debugger can output their values.
2024-02-29 07:46:16 -07:00
0c3f399de3
poweropcodes: fix compiler warning.
2024-02-24 22:51:05 +01:00
45ccabb11d
poweropcodes: improve lscbx emulation.
2024-02-24 22:46:54 +01:00
d71a213c4b
Continued clean-up, part 3
2024-02-22 19:46:34 -07:00
8e9123bdce
Slightly less clumsy check for compiler
2024-02-21 07:14:21 -07:00
9dad9ea38b
Revert Memory exceptions use mmu handler.
2024-02-20 18:22:55 -07:00
1d938c93b6
Mask fixes for sr(*)
2024-02-20 18:15:08 -07:00
35bc1bcb44
poweropcodes: Fix sriq.
2024-02-20 18:07:38 -07:00
1438ebc12a
poweropcodes: Fix compiler warnings.
2024-02-20 18:07:26 -07:00
61b29f6fab
ppcexceptions: Memory exceptions use mmu handler.
2024-02-20 18:07:04 -07:00
0e3eaf724b
ppcfpopcodes: Fix stfs*, attempt #2 .
2024-02-20 02:04:02 +01:00
2a05ccbee1
ppcfpopcodes: Fix fres.
...
Don't convert to float until the end.
2024-02-20 02:03:41 +01:00
59bee01c0a
ppcfpopcodes: Fix fmsubs inf nan check.
...
There's probably still an issue with the inf_nan check
using reg_a for the first value instead of reg_a * reg_c.
This will probably need rewriting anyway.
2024-02-20 02:02:58 +01:00
4e4c8d71be
ppcfpopcodes: Fix fadds inf nan check.
2024-02-20 02:01:55 +01:00
c7ae31dfce
ppcfpopcodes: Spaces.
2024-02-20 02:01:37 +01:00
2ea80b0aab
ppcopcodes: Cleanup.
2024-02-20 01:59:54 +01:00
5bbf5ee3af
ppcopcodes: Fix divw overflow result.
2024-02-20 01:59:40 +01:00
748e9c5d86
ppcopcodes: Write protect XER zero bits.
2024-02-20 01:59:01 +01:00
8764beba39
ppcopcodes: Fix lswx.
...
- Remove invalid form check unless you know for sure it's supposed to cause an exception.
- Add register skip for 601 CPU. This needs testing.
2024-02-20 01:57:00 +01:00
cf4ce01ddd
ppcopcodes: set DSISR for alignment exception.
2024-02-20 01:22:55 +01:00
29f3ffd474
Continued clean-up, part 2
2024-02-18 07:06:27 -07:00
b160e38f8f
Continued code clean-up
2024-02-16 06:55:13 -07:00
38d94e509f
Further code cleanup
2024-02-14 22:19:08 -07:00
ec23a532f6
Minor clean-up for branching instructions
2024-02-12 20:59:04 -07:00
d0b0b8070c
ppcopcodes: Fix l*ux? invalid form check.
...
Invalid form is (reg_a == reg_d) || reg_a == 0.
Therefore, valid form is (reg_a != reg_d) && reg_a != 0
!(a || b) == !a && !b
2024-02-11 07:41:13 -07:00
fd81d7b040
ppcfpopcodes: Fix load float.
...
Type casting an int to a float assigns the value of the int to the float which is not what is needed here.
2024-02-11 07:40:17 -07:00
267a9448ea
ppctest: Fix floating-point tests.
...
genppctests.py
- Fix incorrect bits for some floating-point instruction opcodes or fields.
- Use separate register for FP results like DolphinPPCTests does.
- Remove extra FMULS.
- Use a regular expression for parsing ppcfloattest.txt. Don't parse the values, just put them in the output ppcloattests.csv file.
ppcfloattest.txt
- Clear crf0 and crf7 because we only care about crf1.
- Use values from DolphinPPCTests (0.0, 0.5, 1.0, 3.5, DBL_MAX, FLT_MAX, 2.4679999352, 4.9359998704, etc.). Some of the values were rounded. This will un-round them. Specify snan or qnan instead of nan.
- One of the FCMPO and FCMPU tests had qnan instead of snan input values.
ppcfloattest.csv
- Regenerate this file using the updated genppctests.py which uses the updated ppcfloattest.txt.
ppctests
- Update double_from_string to be able to parse the new values (snan, qnan, FLT_MAX, DBL_MAX).
2024-02-10 14:56:21 -07:00
01e45d656e
ppcfpopcodes: Update header date.
2024-02-10 14:47:46 -07:00
9199b1e520
ppcfpopcodes: Fix multiply add opcodes.
...
Use std::fma for all of them for max accuracy.
For single precision opcodes, convert only the result, not the operands.
2024-02-10 14:19:09 -07:00
3be22dac99
ppcfpopcodes: No float cast for operand check.
2024-02-10 14:18:49 -07:00
ff895aa8a4
ppcfpopcodes: Remove some globals.
...
ppc_result64_d and ppc_dblresult64_d don't need to be globals. The rest are unused.
2024-02-10 13:56:07 -07:00
c9c4280e6e
ppcfpopcodes: No float cast for operand check.
2024-02-10 13:02:49 -07:00
dac9c1e52c
ppcfpopcodes: Fix fctiw* round to nearest.
...
0.3 should not round up to 1.
2024-02-10 12:58:58 -07:00
a7e6ab33a1
ppcfpopcodes: Make fctiw* results QNaN.
2024-02-10 12:58:29 -07:00
6c49b87a06
ppcopcodes: Fix rlwnm when shift > 31.
2024-02-10 12:54:41 -07:00
29e5bbdcc0
ppcopcodes: Fix divw.
2024-02-10 12:54:12 -07:00
4fcb357e2f
ppcfpopcodes: add 601 variant of mffs.
2024-02-10 12:51:48 -07:00
ddb5259464
ppcexec: Make illegal operations per CPU model.
2024-02-10 12:51:00 -07:00
52dfc0cf93
Slightly faster typecasting
2024-01-31 08:06:33 -07:00
bf425884fb
ppcopcodes: Add ppc_grab_dab.
...
For instructions that don't use the general purpose registers.
2024-01-19 12:09:24 +01:00
4430fd89a9
ppcopcodes: Fix subfic.
2024-01-19 12:00:55 +01:00
a0b1d6394a
Another revert
...
This affects Virtus VR - With the lmw checks, the opening sign doesn't display and the intro crashes sooner
2024-01-07 17:45:05 -07:00
c6af1e31fe
Partial revert of previous commit
2024-01-07 17:21:11 -07:00
a5ce6a806f
CPU clean-up
2024-01-07 17:04:51 -07:00
a59475af1c
Further lha(*) fixes
2024-01-05 19:10:05 -07:00
1cc1ac2e68
Fixing lha(*) opcodes
2024-01-05 17:19:03 -07:00
924b80574a
Further fix from last commit
2024-01-05 15:53:56 -07:00
f3a759c80d
CPU code clean-up
2024-01-05 15:11:37 -07:00
9b30dfb474
ppcfpopcodes: refactor fctiw/fctiwz emulation.
2024-01-03 01:27:21 +01:00
0100e67ebf
ppcfpopcodes: Fix fctiw/fctiwz.
2024-01-03 01:07:53 +01:00
bd419912b5
ppcfpopcodes: Fix stfs*.
...
It should try to convert its operand to a single precision
floating point number at least.
2024-01-02 21:53:03 +01:00
cb85d358d1
Remove unused globals.
2024-01-02 17:51:12 +01:00
5b114c2412
ppcopcodes: refactor mtcrf emulation.
2024-01-02 17:44:35 +01:00
c25b027de4
ppcfpopcodes: fix mtfsf emulation.
2024-01-02 17:21:08 +01:00
8595dd7d99
ppcfpopcodes: fix mtfsfi emulation.
2024-01-02 17:21:08 +01:00
61a90e2cfb
ppcfpopcodes: Fix mcrfs.
2024-01-02 15:52:30 +01:00
593508df22
Refactor subfze.
2024-01-02 13:44:56 +01:00
1f3505f371
ppcopcodes: Fix subfze.
2024-01-02 13:44:13 +01:00
fef5bde0c7
Refactor recent subfme fix.
2023-12-24 02:56:47 +01:00
dc00879419
ppcopcodes: Fix subfme.
2023-12-24 02:36:34 +01:00
bae488fd97
ppcfpopcodes: Fix lfs* opcodes.
2023-12-22 13:11:13 +01:00
0a8c1df968
ppcopcodes: Fix sraw.
2023-12-19 16:30:02 +01:00
4c49558120
ppcopcodes: Fix subfe.
2023-12-19 14:57:41 +01:00
750f91e339
ppcemu.h: add enum for XER bits.
2023-12-19 14:57:41 +01:00
d24b5d21b8
CRx_bit enum stores masks for now.
2023-12-19 14:27:57 +01:00
9dbfde1a4c
Cleanup previous commit.
2023-12-19 13:15:10 +01:00
7f229b0fe8
ppcfpopcodes: Fix fcmpo/fcmpu.
...
It was always changing CR1 (starting at CR bit 4) instead of the CR selected by crfD.
Also, it was clearing all but the FL,FG,FE,FU bits of FPRF of FPSCR.
2023-12-19 13:15:10 +01:00
7cf3d9cd94
Merge pull request #72 from mihaip/upstream-ub
...
Avoid some undefined behavior
2023-12-08 06:45:44 -07:00
c28e1fa0be
ppcmmu: Fix write accesses to read-only memory.
2023-12-08 11:15:04 +01:00
e9bc8926ab
Avoid some undefined behavior
...
The `SubOpcode31Grabber[1024] = { ppc_illegalop }` initializer only
populates the first entry with ppc_illegalop (at least on some compilers),
switch to explicitly initializing the entire array with std::fill_n.
Also fix a couple of sign and overflow issues flagged by the Xcode
undefined behavior sanitizer.
2023-12-07 23:59:49 -08:00
99ae0c3d31
ppcemu.h: add PVR definition for MPC604e.
2023-12-03 20:05:19 +01:00
6582536591
Inline ppc_set_cur_instruction
...
It's used in the main emulator loop (ppc_exec_inner), and the function
call overhead adds up.
By inlining it, time to boot to the Finder using a 7.1.2 install CD
and a 6100 ROM goes from ~6700ms to ~6400ms (with clang 14 on a
M2 Max)
2023-12-02 15:12:02 -08:00
819d475181
poweropcodes: fix div emulation.
...
Clean up power_doz and power_maskir as well.
2023-12-01 20:41:22 +01:00
277be165b6
Merge pull request #67 from mihaip/upstream-power
...
Fix emulation of doz, dozi, and nabs POWER instructions
2023-12-01 07:48:38 -07:00
1b4de3b64e
Fix emulation of doz, dozi, and nabs POWER instructions
...
doz and dozi were storing the result into the wrong register.
nabs was not taking into account two's complement storage of numbers
and was just setting the signed bit.
These two instructions are used in the implementation of text
measurement in native QuickDraw on 7.1.2/the PDM ROM, and the incorrect
values were resulting in nothing being rendered. With the fix text
appears when booting from the 7.1.2 CD.
2023-12-01 01:34:12 -08:00
a1d8f8aa4e
ppctests: fix test cases with SNaN/QNaN operands.
2023-11-30 17:44:46 +01:00
8c3dfe94c7
ppcfpopcodes: infinities should set FPCC_FUNAN.
2023-11-30 12:53:10 +01:00
0a9107b602
ppcfloattests.csv: remove unrelated CR7 changes.
2023-11-30 12:28:32 +01:00
680cab52f3
ppcfpopcodes: fix ppc_fadds.
2023-11-30 12:06:44 +01:00
6abb07e61b
Add rounding control for the host FPU.
2023-11-30 12:06:44 +01:00
b59c2be12d
ppcfpopcodes: fix fpresult_update().
2023-11-30 12:06:44 +01:00
d49d03846f
ppcemu: fix and beatify FPSCR enum.
2023-11-30 12:06:44 +01:00
b51670cb25
ppcfpopcodes: improve mffs, mtfsb0 and mtfsb1.
2023-11-30 12:06:44 +01:00
487c6c2c7c
ppcfpopcodes: remove dead code.
2023-11-30 12:06:44 +01:00
87b8a8e0a0
Correcting multiply tests
2023-11-28 19:02:48 -07:00
47e0c23e64
Fix CR1 updates for floating-point instructions.
2023-11-28 16:31:51 +01:00
dd454689e0
Fixes for condition reg move instructions
2023-11-28 07:06:04 -07:00
4753ba5361
Continued clean-up
2023-11-23 16:56:58 -07:00
7835aec034
Further CPU cleanup
2023-11-21 08:06:50 -07:00
f4f035682c
Fixed cfloat include
2023-11-19 20:34:40 -07:00
d1f9b5631a
Added missing include for cfloat
2023-11-19 20:07:00 -07:00
d92ae6136a
CPU code clean-up in progress
...
Happened to fix one case in the process.
2023-11-19 17:56:30 -07:00
074a760b6a
FP compare fixes
...
This is the start of several fixes for the floating point emulation.
2023-11-13 07:30:31 -07:00
35c86ad6bf
Clean up #includes
...
Result of running IWYU (https://include-what-you-use.org/ ) and
applying most of the suggestions about unncessary includes and
forward declarations.
Was motivated by observing that <thread> was being included in
ppcopcodes.cpp even though it was unused (found while researching
the use of threads), but seems generally good to help with build
times and correctness.
2023-11-03 00:33:47 -07:00
6ffc2b2f10
Optimize string word instructions
...
Partially unrolled the loop. Boots 7.1.2 Disk Tools slightly faster.
2023-10-29 17:23:31 -07:00
5b366e592c
Fix spelling.
2023-10-02 15:06:51 +02:00
170a9d78e7
Fix comment.
2023-10-02 15:06:06 +02:00
a5fb124e69
pdmonboard: switch to mmu_map_dma_mem.
2023-10-02 15:00:12 +02:00
8cf290c034
ppcmmu: add mmu_map_dma_mem method.
2023-10-02 02:20:42 +02:00
67146028bf
ppcmmu: Add 64-bit accesses to I/O.
...
Also add an exception for unaligned 64 bit. 64 bit accesses require dword alignment.
2023-09-30 00:29:01 +02:00
acdb14a10a
Recalculate execution block after RFI.
...
While booting Mac OS X 10.2 installer CD, a return from RFI didn't change the instruction address virtual memory page but did change the physical memory page so we must always recalculate the physical address after RFI.
Perhaps there are other cases where this may be required?
2023-09-26 00:13:11 +02:00
dcd4384d46
Fix eb_end calculation.
...
- Subtract one so that it can't overflow to zero.
- Use page_start as the base so mask operation is not required.
- Recalculate it only when the page changes.
2023-09-26 00:04:07 +02:00
8348370142
Add separate flags for instruction and data TLBs.
...
The same flag was being used for flushing both instruction and data TLBs so sometimes a flush for one TLB list would not occur if the flag was cleared when flushing the other TLB list.
2023-09-25 23:42:32 +02:00
6b3cdad877
ppcmmu: Fix BAT update.
...
Need to schedule flush of both BAT and PAT type TLBs because BAT takes precedence over PAT which means updating a BAT can invalidate a PAT.
2023-09-25 23:27:00 +02:00
6b40caf63a
ppcmmu: fix setting of LRU bits.
2023-09-25 23:17:57 +02:00
6cfde29f00
heathrow: implement native interrupt mode.
2023-09-25 12:22:17 +02:00
278799795c
Disable decrementer exceptions for MPC601.
2023-09-18 21:20:59 +02:00
c47cbb354d
Add is_601 flag for selecting MPC601 specific behavior.
2023-09-18 21:20:59 +02:00
8ff2125312
Revert "Minor checks for Data Cache opcodes and LMW"
...
This reverts commit fd6327ab62
2023-09-18 21:20:59 +02:00
a69763c6de
dbdma: noop incomplete LOAD_QUAD & STORE_QUAD.
2023-09-18 20:20:25 +02:00
5e32b599d6
Merge branch 'master' of https://github.com/dingusdev/dingusppc
2023-09-04 07:22:27 -07:00
fd6327ab62
Minor checks for Data Cache opcodes and LMW
2023-09-04 07:21:00 -07:00
45528bfc6d
ppcmmu: fix flushing of the secondary ITLB.
2023-08-22 23:36:48 +02:00
932f2bbceb
ppcopcodes: fix stwcx. emulation.
2023-08-21 04:50:02 +02:00
a7ef177164
Preliminary DBDMA expansion
2023-08-13 16:38:15 -07:00
300965ab10
Decrementer exception changes.
2023-08-10 00:46:04 +02:00
d2e7c9a5df
ppcexceptions: fix next address for decrementer exceptions.
2023-08-09 12:53:48 +02:00
de1f0c8a9b
ppc_mmu: rename reg_desc to rgn_desc to improve readability.
2023-08-07 13:56:49 +02:00
52a64168d7
Clean up previous merge.
2023-08-07 13:45:26 +02:00
b571ff8412
Revert "ppcmmu: Add 64-bit accesses to I/O"
...
This reverts commit 16123dea45
2023-08-07 13:06:11 +02:00
ac64f9e30d
ppcmmu: Fix mmio read/write offset calculation.
...
For TLBs referencing an mmio region, calculate an offset that will translate a guest virtual address to an offset in the mmio region.
2023-08-04 20:16:13 -07:00
16123dea45
ppcmmu: Add 64-bit accesses to I/O
...
Also add an exception for unaligned 64 bit. 64 bit accesses require dword alignment.
2023-08-04 20:16:13 -07:00
814260f0b6
ppcmmu: Reduce unmapped physical memory logging.
...
Don't log consecutive accesses to unmapped physical memory addresses. This saves a couple hundred thousand lines in the log in some cases.
This is only a partial fix. Any access that isn't logged should be queued and output if a log message is output that is not this log message or after a time period.
2023-08-04 20:16:13 -07:00
25150268cd
ppcexceptions: fix ISI exception target address.
2023-07-10 14:06:20 +02:00
4364c89fd4
Slight clean-up for execution type
2023-06-19 22:36:27 -07:00
73d0356058
ppcopcodes: fix dcbz for BlockZero in Mac OS 8.x
2023-06-17 20:57:48 +02:00
Maxim Poliakovski
joevt
dingusdev
Mihai Parparita