267a9448ea
ppctest: Fix floating-point tests.
...
genppctests.py
- Fix incorrect bits for some floating-point instruction opcodes or fields.
- Use separate register for FP results like DolphinPPCTests does.
- Remove extra FMULS.
- Use a regular expression for parsing ppcfloattest.txt. Don't parse the values, just put them in the output ppcloattests.csv file.
ppcfloattest.txt
- Clear crf0 and crf7 because we only care about crf1.
- Use values from DolphinPPCTests (0.0, 0.5, 1.0, 3.5, DBL_MAX, FLT_MAX, 2.4679999352, 4.9359998704, etc.). Some of the values were rounded. This will un-round them. Specify snan or qnan instead of nan.
- One of the FCMPO and FCMPU tests had qnan instead of snan input values.
ppcfloattest.csv
- Regenerate this file using the updated genppctests.py which uses the updated ppcfloattest.txt.
ppctests
- Update double_from_string to be able to parse the new values (snan, qnan, FLT_MAX, DBL_MAX).
2024-02-10 14:56:21 -07:00
01e45d656e
ppcfpopcodes: Update header date.
2024-02-10 14:47:46 -07:00
9199b1e520
ppcfpopcodes: Fix multiply add opcodes.
...
Use std::fma for all of them for max accuracy.
For single precision opcodes, convert only the result, not the operands.
2024-02-10 14:19:09 -07:00
3be22dac99
ppcfpopcodes: No float cast for operand check.
2024-02-10 14:18:49 -07:00
ff895aa8a4
ppcfpopcodes: Remove some globals.
...
ppc_result64_d and ppc_dblresult64_d don't need to be globals. The rest are unused.
2024-02-10 13:56:07 -07:00
c9c4280e6e
ppcfpopcodes: No float cast for operand check.
2024-02-10 13:02:49 -07:00
dac9c1e52c
ppcfpopcodes: Fix fctiw* round to nearest.
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0.3 should not round up to 1.
2024-02-10 12:58:58 -07:00
a7e6ab33a1
ppcfpopcodes: Make fctiw* results QNaN.
2024-02-10 12:58:29 -07:00
6c49b87a06
ppcopcodes: Fix rlwnm when shift > 31.
2024-02-10 12:54:41 -07:00
29e5bbdcc0
ppcopcodes: Fix divw.
2024-02-10 12:54:12 -07:00
4fcb357e2f
ppcfpopcodes: add 601 variant of mffs.
2024-02-10 12:51:48 -07:00
ddb5259464
ppcexec: Make illegal operations per CPU model.
2024-02-10 12:51:00 -07:00
52dfc0cf93
Slightly faster typecasting
2024-01-31 08:06:33 -07:00
bf425884fb
ppcopcodes: Add ppc_grab_dab.
...
For instructions that don't use the general purpose registers.
2024-01-19 12:09:24 +01:00
4430fd89a9
ppcopcodes: Fix subfic.
2024-01-19 12:00:55 +01:00
a0b1d6394a
Another revert
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This affects Virtus VR - With the lmw checks, the opening sign doesn't display and the intro crashes sooner
2024-01-07 17:45:05 -07:00
c6af1e31fe
Partial revert of previous commit
2024-01-07 17:21:11 -07:00
a5ce6a806f
CPU clean-up
2024-01-07 17:04:51 -07:00
a59475af1c
Further lha(*) fixes
2024-01-05 19:10:05 -07:00
1cc1ac2e68
Fixing lha(*) opcodes
2024-01-05 17:19:03 -07:00
924b80574a
Further fix from last commit
2024-01-05 15:53:56 -07:00
f3a759c80d
CPU code clean-up
2024-01-05 15:11:37 -07:00
9b30dfb474
ppcfpopcodes: refactor fctiw/fctiwz emulation.
2024-01-03 01:27:21 +01:00
0100e67ebf
ppcfpopcodes: Fix fctiw/fctiwz.
2024-01-03 01:07:53 +01:00
bd419912b5
ppcfpopcodes: Fix stfs*.
...
It should try to convert its operand to a single precision
floating point number at least.
2024-01-02 21:53:03 +01:00
cb85d358d1
Remove unused globals.
2024-01-02 17:51:12 +01:00
5b114c2412
ppcopcodes: refactor mtcrf emulation.
2024-01-02 17:44:35 +01:00
c25b027de4
ppcfpopcodes: fix mtfsf emulation.
2024-01-02 17:21:08 +01:00
8595dd7d99
ppcfpopcodes: fix mtfsfi emulation.
2024-01-02 17:21:08 +01:00
61a90e2cfb
ppcfpopcodes: Fix mcrfs.
2024-01-02 15:52:30 +01:00
593508df22
Refactor subfze.
2024-01-02 13:44:56 +01:00
1f3505f371
ppcopcodes: Fix subfze.
2024-01-02 13:44:13 +01:00
fef5bde0c7
Refactor recent subfme fix.
2023-12-24 02:56:47 +01:00
dc00879419
ppcopcodes: Fix subfme.
2023-12-24 02:36:34 +01:00
bae488fd97
ppcfpopcodes: Fix lfs* opcodes.
2023-12-22 13:11:13 +01:00
0a8c1df968
ppcopcodes: Fix sraw.
2023-12-19 16:30:02 +01:00
4c49558120
ppcopcodes: Fix subfe.
2023-12-19 14:57:41 +01:00
750f91e339
ppcemu.h: add enum for XER bits.
2023-12-19 14:57:41 +01:00
d24b5d21b8
CRx_bit enum stores masks for now.
2023-12-19 14:27:57 +01:00
9dbfde1a4c
Cleanup previous commit.
2023-12-19 13:15:10 +01:00
7f229b0fe8
ppcfpopcodes: Fix fcmpo/fcmpu.
...
It was always changing CR1 (starting at CR bit 4) instead of the CR selected by crfD.
Also, it was clearing all but the FL,FG,FE,FU bits of FPRF of FPSCR.
2023-12-19 13:15:10 +01:00
7cf3d9cd94
Merge pull request #72 from mihaip/upstream-ub
...
Avoid some undefined behavior
2023-12-08 06:45:44 -07:00
c28e1fa0be
ppcmmu: Fix write accesses to read-only memory.
2023-12-08 11:15:04 +01:00
e9bc8926ab
Avoid some undefined behavior
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The `SubOpcode31Grabber[1024] = { ppc_illegalop }` initializer only
populates the first entry with ppc_illegalop (at least on some compilers),
switch to explicitly initializing the entire array with std::fill_n.
Also fix a couple of sign and overflow issues flagged by the Xcode
undefined behavior sanitizer.
2023-12-07 23:59:49 -08:00
99ae0c3d31
ppcemu.h: add PVR definition for MPC604e.
2023-12-03 20:05:19 +01:00
6582536591
Inline ppc_set_cur_instruction
...
It's used in the main emulator loop (ppc_exec_inner), and the function
call overhead adds up.
By inlining it, time to boot to the Finder using a 7.1.2 install CD
and a 6100 ROM goes from ~6700ms to ~6400ms (with clang 14 on a
M2 Max)
2023-12-02 15:12:02 -08:00
819d475181
poweropcodes: fix div emulation.
...
Clean up power_doz and power_maskir as well.
2023-12-01 20:41:22 +01:00
277be165b6
Merge pull request #67 from mihaip/upstream-power
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Fix emulation of doz, dozi, and nabs POWER instructions
2023-12-01 07:48:38 -07:00
1b4de3b64e
Fix emulation of doz, dozi, and nabs POWER instructions
...
doz and dozi were storing the result into the wrong register.
nabs was not taking into account two's complement storage of numbers
and was just setting the signed bit.
These two instructions are used in the implementation of text
measurement in native QuickDraw on 7.1.2/the PDM ROM, and the incorrect
values were resulting in nothing being rendered. With the fix text
appears when booting from the 7.1.2 CD.
2023-12-01 01:34:12 -08:00
a1d8f8aa4e
ppctests: fix test cases with SNaN/QNaN operands.
2023-11-30 17:44:46 +01:00
8c3dfe94c7
ppcfpopcodes: infinities should set FPCC_FUNAN.
2023-11-30 12:53:10 +01:00
0a9107b602
ppcfloattests.csv: remove unrelated CR7 changes.
2023-11-30 12:28:32 +01:00
680cab52f3
ppcfpopcodes: fix ppc_fadds.
2023-11-30 12:06:44 +01:00
6abb07e61b
Add rounding control for the host FPU.
2023-11-30 12:06:44 +01:00
b59c2be12d
ppcfpopcodes: fix fpresult_update().
2023-11-30 12:06:44 +01:00
d49d03846f
ppcemu: fix and beatify FPSCR enum.
2023-11-30 12:06:44 +01:00
b51670cb25
ppcfpopcodes: improve mffs, mtfsb0 and mtfsb1.
2023-11-30 12:06:44 +01:00
487c6c2c7c
ppcfpopcodes: remove dead code.
2023-11-30 12:06:44 +01:00
87b8a8e0a0
Correcting multiply tests
2023-11-28 19:02:48 -07:00
47e0c23e64
Fix CR1 updates for floating-point instructions.
2023-11-28 16:31:51 +01:00
dd454689e0
Fixes for condition reg move instructions
2023-11-28 07:06:04 -07:00
4753ba5361
Continued clean-up
2023-11-23 16:56:58 -07:00
7835aec034
Further CPU cleanup
2023-11-21 08:06:50 -07:00
f4f035682c
Fixed cfloat include
2023-11-19 20:34:40 -07:00
d1f9b5631a
Added missing include for cfloat
2023-11-19 20:07:00 -07:00
d92ae6136a
CPU code clean-up in progress
...
Happened to fix one case in the process.
2023-11-19 17:56:30 -07:00
074a760b6a
FP compare fixes
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This is the start of several fixes for the floating point emulation.
2023-11-13 07:30:31 -07:00
35c86ad6bf
Clean up #includes
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Result of running IWYU (https://include-what-you-use.org/ ) and
applying most of the suggestions about unncessary includes and
forward declarations.
Was motivated by observing that <thread> was being included in
ppcopcodes.cpp even though it was unused (found while researching
the use of threads), but seems generally good to help with build
times and correctness.
2023-11-03 00:33:47 -07:00
6ffc2b2f10
Optimize string word instructions
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Partially unrolled the loop. Boots 7.1.2 Disk Tools slightly faster.
2023-10-29 17:23:31 -07:00
5b366e592c
Fix spelling.
2023-10-02 15:06:51 +02:00
170a9d78e7
Fix comment.
2023-10-02 15:06:06 +02:00
a5fb124e69
pdmonboard: switch to mmu_map_dma_mem.
2023-10-02 15:00:12 +02:00
8cf290c034
ppcmmu: add mmu_map_dma_mem method.
2023-10-02 02:20:42 +02:00
67146028bf
ppcmmu: Add 64-bit accesses to I/O.
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Also add an exception for unaligned 64 bit. 64 bit accesses require dword alignment.
2023-09-30 00:29:01 +02:00
acdb14a10a
Recalculate execution block after RFI.
...
While booting Mac OS X 10.2 installer CD, a return from RFI didn't change the instruction address virtual memory page but did change the physical memory page so we must always recalculate the physical address after RFI.
Perhaps there are other cases where this may be required?
2023-09-26 00:13:11 +02:00
dcd4384d46
Fix eb_end calculation.
...
- Subtract one so that it can't overflow to zero.
- Use page_start as the base so mask operation is not required.
- Recalculate it only when the page changes.
2023-09-26 00:04:07 +02:00
8348370142
Add separate flags for instruction and data TLBs.
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The same flag was being used for flushing both instruction and data TLBs so sometimes a flush for one TLB list would not occur if the flag was cleared when flushing the other TLB list.
2023-09-25 23:42:32 +02:00
6b3cdad877
ppcmmu: Fix BAT update.
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Need to schedule flush of both BAT and PAT type TLBs because BAT takes precedence over PAT which means updating a BAT can invalidate a PAT.
2023-09-25 23:27:00 +02:00
6b40caf63a
ppcmmu: fix setting of LRU bits.
2023-09-25 23:17:57 +02:00
6cfde29f00
heathrow: implement native interrupt mode.
2023-09-25 12:22:17 +02:00
278799795c
Disable decrementer exceptions for MPC601.
2023-09-18 21:20:59 +02:00
c47cbb354d
Add is_601 flag for selecting MPC601 specific behavior.
2023-09-18 21:20:59 +02:00
8ff2125312
Revert "Minor checks for Data Cache opcodes and LMW"
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This reverts commit fd6327ab62
2023-09-18 21:20:59 +02:00
a69763c6de
dbdma: noop incomplete LOAD_QUAD & STORE_QUAD.
2023-09-18 20:20:25 +02:00
5e32b599d6
Merge branch 'master' of https://github.com/dingusdev/dingusppc
2023-09-04 07:22:27 -07:00
fd6327ab62
Minor checks for Data Cache opcodes and LMW
2023-09-04 07:21:00 -07:00
45528bfc6d
ppcmmu: fix flushing of the secondary ITLB.
2023-08-22 23:36:48 +02:00
932f2bbceb
ppcopcodes: fix stwcx. emulation.
2023-08-21 04:50:02 +02:00
a7ef177164
Preliminary DBDMA expansion
2023-08-13 16:38:15 -07:00
300965ab10
Decrementer exception changes.
2023-08-10 00:46:04 +02:00
d2e7c9a5df
ppcexceptions: fix next address for decrementer exceptions.
2023-08-09 12:53:48 +02:00
de1f0c8a9b
ppc_mmu: rename reg_desc to rgn_desc to improve readability.
2023-08-07 13:56:49 +02:00
52a64168d7
Clean up previous merge.
2023-08-07 13:45:26 +02:00
b571ff8412
Revert "ppcmmu: Add 64-bit accesses to I/O"
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This reverts commit 16123dea45
2023-08-07 13:06:11 +02:00
ac64f9e30d
ppcmmu: Fix mmio read/write offset calculation.
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For TLBs referencing an mmio region, calculate an offset that will translate a guest virtual address to an offset in the mmio region.
2023-08-04 20:16:13 -07:00
16123dea45
ppcmmu: Add 64-bit accesses to I/O
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Also add an exception for unaligned 64 bit. 64 bit accesses require dword alignment.
2023-08-04 20:16:13 -07:00
814260f0b6
ppcmmu: Reduce unmapped physical memory logging.
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Don't log consecutive accesses to unmapped physical memory addresses. This saves a couple hundred thousand lines in the log in some cases.
This is only a partial fix. Any access that isn't logged should be queued and output if a log message is output that is not this log message or after a time period.
2023-08-04 20:16:13 -07:00
25150268cd
ppcexceptions: fix ISI exception target address.
2023-07-10 14:06:20 +02:00
4364c89fd4
Slight clean-up for execution type
2023-06-19 22:36:27 -07:00
73d0356058
ppcopcodes: fix dcbz for BlockZero in Mac OS 8.x
2023-06-17 20:57:48 +02:00
03595c3940
Merge remote-tracking branch 'origin/machine-yosemite'
2023-04-21 12:49:58 +02:00
cf0d361918
Merge 'hard-disks' branch.
2023-04-17 01:20:38 +02:00
597c077b19
Implement PPC decrementer.
2023-02-15 02:36:40 +01:00
9fcf5ba51a
ppcmmu: fix bug in mmu_change_mode().
2023-02-15 02:18:31 +01:00
19adb54cd8
Fix compiler warnings.
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These were detected by github Actions but not by Xcode.
2023-01-11 01:17:13 -08:00
5294a8b71c
Fix compiler warnings: unused variables.
2023-01-11 01:17:12 -08:00
46bc8567e9
Fix compiler warnings: uninitialized variables.
...
- mpc601_block_address_translation will now return 0 for prot and pa when bat_hit is false (when the if statement is not positive during the for loop). The calling function doesn't care what prot and pa are when bat_hit is false, but we do this to remove the compiler warining.
- For tlb_flush_entry, the compiler thinks m might not always be in the range 0 to 5 so tlb1 and tlb2 might not get initialized by the switch statement. Add default to get around this warning.
2023-01-11 01:17:12 -08:00
64fec88436
Fix compiler warnings: cast loses precision.
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Use explicit cast when converting large integer types to smaller integer types when it is known that the most significant bytes are not required.
For pcidevice, check the ROM file size before casting to int. We'll allow expansion ROM sizes up to 4MB but usually they are 64K, sometimes 128K, rarely 256K.
for machinefactory, change the type to size_t so that it can correctly get the size of files that are larger than 4GB; it already checks the file size is 4MB before we need to cast to uint32_t.
For floppyimg, check the image size before casting to int. For raw images, only allow files up to 2MB. For DiskCopy42 images, it already checks the file size, so do the cast after that.
2023-01-11 01:17:12 -08:00
7ba8921649
ppcemu: add PVR for 603ev.
2022-12-23 17:19:46 +01:00
648dfcd47b
ppcmmu: fix BAT state updates.
2022-12-20 14:58:45 +01:00
9f4c248e4c
Rework DBDMA logic for bidirectional channels.
2022-11-17 18:03:18 +01:00
a58ce8aeb3
Slight tweak to lscbx
2022-11-15 08:01:57 -07:00
8f99510af0
Fixed lscbx
2022-11-15 07:40:37 -07:00
647ae456e5
Slight typo squash for lscbx
2022-11-12 20:18:33 -07:00
1b7ff084ab
Cleaned lscbx
2022-11-12 20:17:04 -07:00
1ed6e25d1b
Removed redundant variable
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Slight clean-up for lswi and lswx
2022-11-12 20:16:29 -07:00
6f0d3b48ba
Fix TBR range
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Fixed an issue where TBR doesn't have full 64-bit range. The original calculation was 64 bit and ended with a ÷ 10^9. This means the max for the upper 32 bits is 2^32/10^9 = 4. The solution is to use a multiplication method that supports a 96 bit product. core/mathutils.h contains functions for that. TBR driving frequency is assumed to be less than 1 GHz. Some minor modification is required for future > 1 GHz support.
2022-09-15 21:22:37 -07:00
b665f2cb4e
Fix RTC units
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Fixed an issue where get-msecs-601 and get-msecs-60x were not returning the same value. RTC was being calculated using timebase frequency instead of nanosecond frequency. 601 uses RTC. 60x uses TBR. On a real Mac, a G3 CPU won't have a RTC and accessing RTC would cause an exception. This is not the case for dingusppc but I don't think that's a problem.
2022-09-15 21:05:08 -07:00
ed424ad544
Fix setting RTC
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Fixed an issue where setting RTC upper or lower doesn't adjust the other (since the current time has changed since the last timestamp).
2022-09-15 20:59:56 -07:00
50dbd5eccd
Fix RTC not always updating
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Fixed an issue where RTC was not being updated if only the upper 32 bits (seconds) was read.
Also simplified things by always updating the timestamp instead of only when the seconds changes.
2022-09-15 20:54:22 -07:00
01d7d6bac3
Make accessing RTC or TBR not affect the other
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Fixed an issue where the following would cause inconsistent results (tb in the left column would sometimes decrement instead of always incrementing):
2 0 do 2 0 do cr tb@ 8 u.r ." ." 8 u.r loop 2 0 do cr 12 spaces rtc@ 8 u.r ." ." 8 u.r loop 2 0 do cr tb@ 8 u.r ." ." 8 u.r space rtc@ 8 u.r ." ." 8 u.r loop loop
RTC and TBR could not be used simultaneously because they are both incremented by an amount based on the last time stamp but that time stamp can be changed by accessing either RTC or TBR. The solution is to have a different time stamp for each.
2022-09-15 20:21:54 -07:00
ce925f5e56
Fix RTC upper
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Fixed a typo that caused rtc@ to always return 0 for the upper 32 bits (represents seconds).
The problem could cause the following to hang on Power Mac 7500:
cr 2000 0 do get-msecs u. 1 ms loop
2022-09-15 19:34:46 -07:00
b38d00ce2d
cpu/ppc: improve support for external interrupts.
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Support generating of external interrupt exception
in MTMSR and RFI when MSR[EE] is re-enabled and
external interrupt still pending.
2022-08-24 14:15:47 +02:00
8c0f391548
ppcemu: add enums for HID0 and HID1.
2022-08-15 14:45:55 +02:00
b76bfedf4b
Remove unnecessary linefeeds from log
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To remove blank lines in the dingusppc.log file or in the console output when -d is used.
2022-08-14 05:26:56 -07:00
0c77cccb9e
ppcopcodes: fix mcrf (again).
2022-05-21 14:51:28 +02:00
b47de8b042
Implement MPC601 style RTC.
2022-05-21 14:51:27 +02:00
d83fdd8866
ppcexec: remove old code.
2022-03-02 17:02:32 +01:00
646880cbf2
Interpreter loop is now controlled by exec_flags.
2022-03-02 16:55:20 +01:00
f1ed56ae9a
debugger: a couple of cosmetic improvements.
2022-02-26 10:57:13 +01:00
123f820775
ppcopcodes: fix lswi/stswi emulation.
2022-02-19 23:23:24 +01:00
477ad7ddee
ppcopcodes: fix lswx/stswx emulation.
2022-02-19 23:23:24 +01:00
b39e884d61
ppcfpopcodes: add missing std:: prefixes.
2022-02-17 00:20:18 +01:00
de65196c4f
ppcfpopcodes: remove unused template parameters.
2022-02-17 00:11:14 +01:00
8f528184b8
Fix compilation with gcc, part 1.
2022-02-16 23:52:43 +01:00
25a4fd1107
Allow adding timers from timer callbacks.
2022-02-05 17:10:57 +01:00
3258abe190
crnand and crnor fixes
2022-01-22 22:33:13 -07:00
c8d39d5ee5
ppcopcodes: fix creqv emulation.
2022-01-21 16:32:07 +01:00
2442bd17b3
ppcopcodes: fix crand emulation.
2022-01-21 14:56:10 +01:00
c864b9b7d9
ppcopcodes: fix cror emulation.
2022-01-21 14:37:51 +01:00
d8c3cfc38e
Fix next instruction address after external exceptions.
2022-01-20 01:38:41 +01:00
e1e651966e
Revert "Further condition reg opcode patches"
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This reverts commit 756d32df07
2022-01-10 18:10:39 +01:00
c12bab9e27
Revert "Quick fix for creqv"
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This reverts commit 8efc61e1b9
2022-01-10 18:01:48 +01:00
aefc66d118
Fix external exception processing.
2022-01-10 17:56:24 +01:00
339db4a078
Add timers management.
2022-01-10 17:56:24 +01:00
8efc61e1b9
Quick fix for creqv
2022-01-08 15:22:27 -07:00
756d32df07
Further condition reg opcode patches
2022-01-07 20:40:07 -07:00
9cd7ca0077
ppcopcodes: fix crxor.
2022-01-08 04:21:09 +01:00
7bdad7703c
Predict TBR values based on elapsed virtual time.
2021-12-20 00:12:44 +01:00
087402290d
Implement virtual time based on instruction counting.
2021-12-20 00:10:02 +01:00
fd33c10712
ppcmmu.cpp: remove unused local variables.
2021-12-07 23:23:39 +01:00
c2a63bab09
FP Opcode Test Fixes
2021-10-30 16:43:13 -07:00
767735251b
FP comp tests & various fixes
2021-10-24 14:00:35 -07:00
a28ef677fd
Fixing FP mul ops & tests
2021-10-23 13:05:20 -07:00
c0cd6eb38f
Add missing licence headers, update license date.
2021-10-23 21:00:31 +02:00
9329d56d83
Move devices into dedicated subdirectories.
2021-10-23 20:17:47 +02:00
7919cd0590
Merge pull request #21 from dingusdev/floating-point
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Floating point fixes. Rehauled floating-point emulation code. Fixed a test suite for floating points.
2021-10-19 07:18:21 -07:00
fb277945c2
Floating point test fixes
2021-10-19 07:16:15 -07:00
331b93d4d6
Fix compilation with Clang 11.
2021-10-17 23:41:53 +02:00
3c7fc58ac0
Small test case fixes for floating points
2021-10-16 22:33:56 -07:00
00dd99d851
Temporarily removing comparisons
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These seem to cause the test program to crash. Will reinstate once the cause of the crash is resolved.
2021-10-15 20:02:00 -07:00
7d7a4b453f
Partial test file reading fix
2021-10-15 06:28:11 -07:00
7ce94a6ab5
Further fixing the test code
2021-10-14 21:05:58 -07:00
061b061813
Floating point overhaul, part 4
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Reworked the INF/NAN checks again - This time, only checking them when the result is calculated
2021-10-14 20:31:10 -07:00
9251745d6f
Fixed floating-point test generation
2021-10-14 07:19:04 -07:00
e53296f7a9
Implement all required context-synchronizing events.
2021-10-13 20:58:09 +02:00
2a9d364b1b
ppcmmu: implement separate TLB pointers for read/write.
2021-10-10 22:01:02 +02:00
3eb2d3cba7
ppcmmu: verbose MMU state with mmu_print_regs().
2021-10-10 22:01:02 +02:00
bde5b71167
ppcmmu: re-arrange code to avoid formward declarations.
2021-10-10 22:01:02 +02:00
bb0ca2ac40
ppcmmu: fix TLB flushing.
2021-10-10 22:01:02 +02:00
5672a154cb
Floating-point refactor, part 3
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Condensed code to shorten enum names and remove casting.
Condensed mffs and partially fixed NAN checks for FADD(S).
2021-10-10 07:48:49 -07:00
2d65ed47fc
Floating point overhaul, part 2
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Further formatting fixes. Removed obsoleted separation definitions. Fixed rounding to nearest.
2021-10-09 19:42:25 -07:00
e344b089b3
Floating point overhaul, part 1
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Cleaned up formatting and reworked the INF/NAN checks
2021-10-09 15:08:53 -07:00
d5960ca70b
Fixed warnings for frsqrte and fsqrts
2021-10-06 18:59:31 -07:00
2106c4ca47
Fixed floating-point opcode table issues
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fmuls, fmsubs, fmadds, fnmsubs, and fnmadds are all properly mapped now.
2021-10-06 18:36:23 -07:00
ad6a2a9f17
Merge pull request #20 from dingusdev/floating-point
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Merging floating point branch
2021-10-06 18:32:23 -07:00
1922a20cdd
Partial revert for exception handling
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This will be for a future update regarding 601 instructions
2021-10-05 17:42:55 -07:00
f605c484dd
ecowx and eciwx added
2021-10-05 17:40:09 -07:00
69c357b70f
ppcopcodes: fix compilation error with Clang 11.
2021-10-05 00:40:12 +02:00
983e278498
Refactoring 601 opcode emulation - part 1
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All opcodes should be emulated now. There was also a significant amount of clean-up, particularly with lscbx and the bit rotation/shifting instructions.
2021-10-01 22:37:28 -07:00
b4d399ffa2
Improve three logging messages.
2021-09-30 23:01:56 +02:00
22827642e4
ppcmmu: implement 601-style BAT.
2021-09-27 12:37:35 +02:00
f104a634ea
ppcmmu: some more cleanup.
2021-09-26 14:20:46 +02:00
81ea96a058
ppcmmu.cpp: fix includes.
2021-09-25 23:38:27 +02:00
e052eb4a87
Merge branch 'atirage-hacks'.
2021-09-25 23:16:38 +02:00
212cd58f40
ppcmmu: refactor and clean up.
2021-09-25 19:13:40 +02:00
5b54cd69ef
ppcmmu: better fatal error handling with ABORT_F.
2021-09-25 19:13:40 +02:00
501f24f0d3
ppcmmu: implement SoftTLB for instructions.
2021-09-25 19:13:40 +02:00
2a79c9a63c
ppcmmu.c: restructure and clean up.
2021-09-25 19:13:40 +02:00
84e111290f
Fix includes for loguru and SDL.
2021-09-16 00:46:38 +02:00
9ce15be106
ppcmmu.c: restructure and clean up.
2021-08-22 21:33:59 +02:00
a8f400287a
Add TLB profiling.
2021-08-22 17:34:23 +02:00
089645e830
Implement SoftTLB for writes.
2021-08-22 17:34:23 +02:00
22a15f4780
ppcfpopcodes: fix mtfsb0 & mtfsb1 emulation.
2021-07-09 01:07:42 +02:00
48a65279e1
Fixed crf_d for mtfsb0 and mtfsb1
2021-07-07 18:58:02 -07:00
6abe86589b
Update ppcfpopcodes.cpp
2021-07-07 08:00:37 -07:00
07a4166eef
Preliminary work on floating point tests
2021-06-25 21:20:53 -07:00
094d9a9c2f
Remove inline to fix compiler warnings.
2021-06-21 00:11:14 +02:00
4da95a66d7
Make emulated memory loads to use SoftTLB.
2021-06-20 22:33:10 +02:00
7d8f4d4e61
Finalize SoftTLB for reads.
2021-05-16 22:00:00 +02:00
joevt
dingusdev
Maxim Poliakovski
Mihai Parparita
dingusdev