Zane Kaminski
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b4bdc6a9da
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Release candidate?
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2021-09-14 03:57:20 -04:00 |
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Zane Kaminski
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9931df0b70
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Ignore Quartus stuff
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2021-04-21 23:09:07 -04:00 |
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Zane Kaminski
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fa08ca903a
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Register Apple address bus on PHI0 rising edge
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2021-04-21 20:06:56 -04:00 |
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Zane Kaminski
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9243c68a12
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Change IOROMEN logic back to synchronous reset
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2021-04-21 09:21:35 -04:00 |
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Zane Kaminski
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7b4a492e6c
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Output read data on falling edge to get more hold time
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2021-04-21 09:19:57 -04:00 |
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Zane Kaminski
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a3517bf054
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Revert "Updated slew rate/current strength assignments"
This reverts commit 691c076b4d .
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2021-04-20 05:50:09 -04:00 |
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Zane Kaminski
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691c076b4d
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Updated slew rate/current strength assignments
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2021-04-20 05:43:37 -04:00 |
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Zane Kaminski
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fc376ce5d8
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Latch config DIP switches at boot
Also rearranged GR8RAM.v
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2021-04-20 04:23:57 -04:00 |
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Zane Kaminski
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0ca3f17cd5
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Works better?
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2021-04-20 04:10:26 -04:00 |
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Zane Kaminski
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d88ccfb802
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Documentation update
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2021-04-20 01:49:44 -04:00 |
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Zane Kaminski
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c0e7733ba1
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Add "ZK, GF" to board
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2021-04-20 01:47:09 -04:00 |
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Zane Kaminski
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72d2609e63
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Fabbed
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2021-04-19 05:43:21 -04:00 |
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Zane Kaminski
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dc38e1f668
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Sorta works
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2021-04-19 02:57:51 -04:00 |
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Zane Kaminski
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6bcd3a0740
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Added CKE back
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2021-04-18 20:24:58 -04:00 |
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Zane Kaminski
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b899bfc4ad
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Sorta works
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2021-04-18 06:01:08 -04:00 |
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Zane Kaminski
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6eb7960003
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Remove CKE
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2021-04-18 03:59:56 -04:00 |
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Zane Kaminski
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bc9fb27129
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Make apple boot
Apple boots but SDRAM not working. Register R/W/increment works
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2021-04-18 03:54:45 -04:00 |
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Zane Kaminski
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6e2e916561
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Create FrontIsom.png
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2021-04-12 04:27:58 -04:00 |
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Zane Kaminski
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b46fe84724
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Update RAM Map
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2021-04-12 03:46:33 -04:00 |
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Zane Kaminski
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c4844b9646
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idk
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2021-04-11 15:39:19 -04:00 |
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Zane Kaminski
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b0b8b0dc6c
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Works?
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2021-04-03 03:44:42 -04:00 |
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Zane Kaminski
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9eec9bf7b9
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ugh
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2021-03-19 16:38:48 -04:00 |
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Zane Kaminski
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116abb1a6f
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before remove UFM
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2021-03-19 14:23:33 -04:00 |
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Zane Kaminski
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52b3716342
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hmm
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2021-03-19 06:59:22 -04:00 |
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Zane Kaminski
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9ac2ba97ae
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better
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2021-03-19 06:45:31 -04:00 |
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Zane Kaminski
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3816ecd0a1
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ugh
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2021-03-19 02:56:20 -04:00 |
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Zane Kaminski
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a444cc31aa
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idk
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2021-03-15 13:40:59 -04:00 |
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Zane Kaminski
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e5da11855d
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Remove old CPLD stuff
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2021-03-15 13:40:41 -04:00 |
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Zane Kaminski
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db594211fa
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Fabbed
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2021-02-17 19:29:24 -05:00 |
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Zane Kaminski
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9f0867fe56
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reset button detect
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2020-10-25 05:22:14 -04:00 |
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Zane Kaminski
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7d6776e480
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Board done?
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2020-10-07 23:32:57 -04:00 |
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Zane Kaminski
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3091ea4d32
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Sketch of verilog
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2020-10-07 23:32:29 -04:00 |
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Zane Kaminski
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4beed0e635
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Added label images
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2020-05-30 04:50:23 -04:00 |
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Zane Kaminski
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817cbd25fd
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Update .gitignore
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2020-05-15 22:51:14 -04:00 |
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Zane Kaminski
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9e108f656c
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Update .gitignore
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2020-05-15 18:49:20 -04:00 |
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Zane Kaminski
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66c0973cdf
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Many changes
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2020-03-10 18:54:44 -04:00 |
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Zane Kaminski
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7e41906335
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Put FullIOEN back
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2020-02-26 03:37:20 -05:00 |
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Zane Kaminski
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209afbc5c5
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Added transfer counters
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2020-02-26 03:34:33 -05:00 |
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Zane Kaminski
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6a33e1adb0
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Added separate configuration section
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2020-02-26 03:31:20 -05:00 |
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Zane Kaminski
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156aa66473
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Cleanup
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2020-02-26 03:15:36 -05:00 |
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Zane Kaminski
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593f5cb010
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Removed inhibit output
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2020-02-26 03:14:33 -05:00 |
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Zane Kaminski
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76bceb089d
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Moved REGEN and IOROMEN (no functional change)
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2020-02-26 03:14:13 -05:00 |
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Zane Kaminski
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4575818d63
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Removed SetWR and FullIOEN
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2020-02-26 02:13:35 -05:00 |
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Zane Kaminski
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d9e9038a4d
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Comments, no actual changes to CPLD verilog
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2020-02-16 22:03:57 -05:00 |
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Zane Kaminski
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b29662bcab
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Fixed previous problem, working again
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2020-02-16 00:11:12 -05:00 |
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Zane Kaminski
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79789a9e8b
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Doesn't work but committing for posterity
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2020-02-15 23:15:54 -05:00 |
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Zane Kaminski
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911557e38b
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Removed AVR-JTAG-10 connector footprint
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2020-02-09 03:40:57 -05:00 |
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Zane Kaminski
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90875fd58f
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Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev
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2020-01-26 15:15:07 -05:00 |
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Zane Kaminski
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c02ffbbe6a
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Separated CSDBEN
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2020-01-26 15:13:37 -05:00 |
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Zane Kaminski
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2bc381ebc5
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Removed state counter reset
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2019-12-21 01:46:05 -05:00 |
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