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1,595 Commits 3 Branches 31 Tags 152 MiB
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93 Commits

Author SHA1 Message Date
Steven Hugg d31a8c4efe tweaks to analysis, fixed verilog ball reset bug 2023-11-06 14:10:18 -06:00
Steven Hugg aa7fe61a86 verilog: disabled v4 warnings, inline asm in non-main files 2021-07-12 12:39:57 -05:00
Steven Hugg 10d04f9114 verilog: randomizeOnReset = true except for unit tests (only <=32 bit values reset) 2021-07-09 15:21:41 -05:00
Steven Hugg b9a0de6cac verilog: test updates, source locations, labels, Silice 2021-07-07 15:43:35 -05:00
Steven Hugg 9bb79c318f (WIP) new hdl package, verilator 4 (emscripten 2.0.6), hdlwasm 2021-06-30 18:07:55 -05:00
Steven Hugg 7725884eb0 arm32: platform, vasm and armips, unicorn.js 2021-06-05 23:32:43 -05:00
Steven Hugg 74ce0e80c2 verilog: added alu.v 2021-05-07 09:50:04 -05:00
Steven Hugg d97b0eb1c5 dasm: fixed macro line parsing, breakpoints 2021-04-08 10:58:02 -05:00
Steven Hugg b3b93e150d verilog: 32-bit (FFbbggrr) rgb output, testing w/ Silice 2020-12-28 10:06:50 -06:00
Steven Hugg 58b6f0f922 Merge branch 'master' of github.com:sehugg/8bitworkshop 2020-06-03 18:38:24 -05:00
Steven Hugg 63a5875283 verilog: added comments 2020-05-13 12:50:16 -05:00
Ewen McNeill 711d45bcd2 verilog/switches: Update Player 2 key documentation 
271c2ea020
changed the Player 2 keys to standard ones in all platforms, and as part
of supporting a gamepad emulation, Z and X were repurposed as the player 1
gamepad.  T and R were allocated instead as the player 2 A/B buttons; see
03af8c2714/src/common/emu.ts (L341-L362)
 2020-02-29 20:41:41 +13:00
Steven Hugg 04ae9e612b fixed verilog 6502 CPU 2019-09-04 21:06:59 -04:00
Steven Hugg 2b09a1a9f4 verilog: fixed RAM Text Display example incrementing by +2 2019-08-01 23:10:55 -04:00
Steven Hugg 8af1c5d3c5 verilog: don't destroy() when module changes 2019-04-22 11:39:30 -04:00
Steven Hugg 49c150930a more verilog updates 2018-12-15 11:25:22 -05:00
Steven Hugg a2d0f41587 verilog preset update 2018-12-13 18:25:54 -05:00
Steven Hugg 7441196b2e no more BOM on download files 2018-12-08 10:15:02 -05:00
Steven Hugg c6f2382f26 verilog: cpu16 updates; minor changes 2018-12-07 11:03:24 -05:00
Steven Hugg bf2250310b moved fpga examples to https://github.com/sehugg/fpga-examples; new framebuffer.v 2018-11-12 14:13:17 -05:00
Steven Hugg 3ff3789bf8 minor scope tweaks, need phantomjs for wavedrom 2018-10-11 11:08:19 -04:00
Steven Hugg 24d681cbb8 fixed ball_paddle.v 2018-10-09 19:37:38 -04:00
Steven Hugg 706a24c96a updated presets, changed array syntax, ice40 fpga examples 2018-10-08 20:38:39 -04:00
Steven Hugg 190ea9fbda verilog tank example 2018-10-03 18:49:14 -04:00
Steven Hugg 716205a2b1 fixed unit tests 2018-10-03 15:06:48 -04:00
Steven Hugg 5c5ee32a66 verilog pixel editor fix (array index must be unsized) 2018-10-02 11:24:29 -04:00
Steven Hugg 684a642ad0 fixed multiplex issue in racing_game 2018-10-01 22:03:44 -04:00
Steven Hugg 1a7480ea65 Merge branch 'master' of github.com:sehugg/8bitworkshop 2018-10-01 13:36:56 -04:00
Steven Hugg 7e00cc898b verilog preset comments 2018-10-01 13:36:26 -04:00
Steven Hugg 951088dd3b added comments to verilog examples 2018-10-01 12:30:47 -04:00
Steven Hugg 51bf1226d0 moved declare vars to ui module imports 2018-09-17 14:45:22 -04:00
Steven Hugg bd8c4da2d6 verilog presets; early exit from jsasm errors 2018-09-08 19:14:51 -04:00
Steven Hugg 9d70c0fb9c changes to multisprite; moved inspect to vcs for now; local book links; z80 disasm 2018-08-28 07:44:57 -04:00
Steven Hugg 5b3c415c6f debugging refactoring; fixed up embed.html; started DASM macro parse; Z80 stack view; replay wraps buffer > 120 secs; verilog edits 2018-08-25 13:50:18 -04:00
Steven Hugg 4a82d341bc make sure all presets start with a blank line, looks nicer (tools/checkpresets.py); updated nes 2018-08-14 00:05:02 -04:00
Steven Hugg b81f4d04b9 removeBOM(); new web images 2018-08-12 11:17:59 -04:00
Steven Hugg 7880602e81 nes runToVsync; debug info changes 2018-08-03 12:18:08 -04:00
Steven Hugg 318c4d8413 fixed verilog scope updating when clicked 2018-08-01 15:12:08 -04:00
Steven Hugg 2dbc60aa2e updated presets; verilog code dup detect; need to handle local/ include files somehow 2018-07-31 23:03:53 -04:00
Steven Hugg 6e5005f613 look in cache first, fetch local/ verilog includes too; apple2 reset; platform checkmark 2018-07-25 13:02:44 -04:00
Steven Hugg 4ea23e21f2 fixed verilog local paths 2018-07-22 22:26:03 -04:00
Steven Hugg d5a146bf71 update lsfr preset; filter verilog boring errors 2018-07-21 09:34:06 -05:00
Steven Hugg 9938a17093 moved to error line widgets 2018-07-20 16:40:38 -05:00
Steven Hugg 2fce80bc9d fixed asmlines in inline asm; reset h/vpaddle on vsync; fixed framebuffer.v 2018-07-17 22:17:01 -05:00
Steven Hugg d35a328246 fixed verilog inline asm 2018-07-12 06:50:40 -05:00
Steven Hugg f466afa085 updated cpu_platform.v to have inputs 2018-07-11 19:53:05 -07:00
Steven Hugg d6a702b929 fixed test, verilog; updated slip counter preset 2018-07-09 20:46:45 -05:00
Steven Hugg c101292a9c Merge branch 'master' of github.com:sehugg/8bitworkshop 2018-06-07 16:25:48 -07:00
Steven Hugg e0e3e0bf61 paddles.v 2018-06-03 19:46:33 -07:00
Steven Hugg 0ee201b9e8 update presets; redir.html expire 2018-06-01 10:33:37 -07:00