David Banks
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3e7bda697c
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Replace special command with x interrupt control commands
Change-Id: I991171d6923cdc928dd9dbb9823c43aee71661be
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2021-11-18 14:45:05 +00:00 |
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David Banks
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c0275ff059
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Make commands 6-bits, add Special and TimerMode commands
Change-Id: I8862fba0cf4c1e54ee831a547bf3337bbe7cf973
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2020-06-21 14:12:33 +01:00 |
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David Banks
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9434397d32
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6502: Implemented exec command
Change-Id: I6089c925c35ba6141fafc92c48fcb120019ea03d
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2019-11-15 10:29:22 +00:00 |
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David Banks
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e8c34bbed7
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6502: Implemented go command (#12)
Change-Id: I35f3e02c54f87f19e9479985d2783e91fc681e40
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2019-11-14 18:33:02 +00:00 |
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David Banks
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0035e124cd
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Comments only
Change-Id: Iff4be31fbb82376ee4ef64f2655c7832dafdad12
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2019-11-14 10:19:25 +00:00 |
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David Banks
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0e5258197e
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All: dropped event detection and flush command
Change-Id: I1a393adfe428e2368198b22953de4f6b3c24b957
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2019-11-12 12:57:30 +00:00 |
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David Banks
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86b8e219eb
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All: synchronise cpu reset generated by AVR
Change-Id: I05f78a48dda721b882c3dd20755763c94e60b194
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2019-11-04 11:37:22 +00:00 |
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David Banks
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197642d262
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All: fix issues at low cpu clock speeds using proper handshaking instead of fixed delays
Change-Id: I86370255634e1919ed79eeafd2b1252c625911f9
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2019-11-04 10:43:54 +00:00 |
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David Banks
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8724119101
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All: rename switches to represent their real function
Change-Id: I6dd61b8b7165e617363d61df5194e35c1a9dcc92
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2019-11-04 09:31:56 +00:00 |
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David Banks
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66d109494e
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All: refactor reset logic, add debouncing
Change-Id: Ie7b57ffcb6aa9aedd52e0b633be16775e9eca822
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2019-11-04 09:18:30 +00:00 |
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David Banks
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bcd1937d3d
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BusMonCore: fix issue with memory address incrementing too soon
Change-Id: Ie961c50b6c692ecddb181697b8c9a1c37956b9ce
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2019-11-03 13:05:19 +00:00 |
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David Banks
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029ee57f71
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BusMonCore: clean up switch/led names
Change-Id: I09e2778ba3718399c436aeb32f587a1cff4f1108
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2019-11-02 19:31:32 +00:00 |
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David Banks
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c6bc245b3d
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Z80: indicate NMI and INT cycles when single stepping
Change-Id: Iafef4059bd136dd9f3aebf2b03ab5ac186e035a6
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2019-10-29 15:48:43 +00:00 |
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David Banks
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4818f026b2
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Removed unused h44780 support (free AVR PortA)
Change-Id: Iadde3718cfd6e8be08b680796d8c9cd01016e694
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2019-10-29 14:56:16 +00:00 |
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David Banks
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efdd41a239
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6502: Added special command to inhibit IRQ/NMI
Change-Id: I6ba8a1b3b92e5852382d35eee7a59b6a9d7e63e8
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2019-06-15 17:50:29 +01:00 |
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David Banks
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de16b3af1a
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Eliminated some warnings - changes mostly cosmetic
Change-Id: I141b05c932d0736e689ff3a2cb2c90c24c850933
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2015-11-29 12:06:42 +00:00 |
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David Banks
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e63266f720
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Made AVR XPM and XDM more generic
Change-Id: I0025d56d4ba7fa3e20d73f09ac51068ffd1859c5
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2015-11-28 17:22:23 +00:00 |
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David Banks
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55c8889881
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Updated reset output to avoid the use of a tristate signal in BusMonCore
Change-Id: I3f49317689eb5808a5edb5fe5b10552d01a3db59
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2015-11-15 11:37:50 +00:00 |
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David Banks
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dc6165f826
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Cosmetic tweaks to avoid warnings to Quartus
Change-Id: I9f044a50d599dfcd3d3b7bd46f6e99e1ef3e92b6
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2015-11-14 13:36:15 +00:00 |
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David Banks
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b563a030ee
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Refactor: 1st stage
Change-Id: I8889ff76ce802099fae67c147e110356adbd23ac
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2015-10-31 13:45:09 +00:00 |
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David Banks
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20269623ea
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Initial checkin of ICE-6809; version now 0.49
Change-Id: I502840a0be0fa58adfc9ddb27c4e2a35a7c2849c
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2015-07-02 15:35:05 +01:00 |
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David Banks
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727a1c0f2a
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Implemented IO watches/breakpoints; fixed a bug with stepping through CB/DD/ED/FD prefixed opcodes which have 2 M1 cycles; version not 0.47
Change-Id: Iad5cb406bd96a8020ccb65be5cd440bebec20481
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2015-06-30 14:19:19 +01:00 |
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David Banks
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caec07483d
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Fixed a problem with breakpoints running on one instruction on the Z80, version now 0.46
Change-Id: I597087a8ed7d4da211c706e0c4972f5d037706ee
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2015-06-29 17:16:23 +01:00 |
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David Banks
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6d0ec41db0
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Added commands to read/write/dump Z80 IO space; version now 0.45
Change-Id: I85e99f8c19bd285f2dd69ea46b0e662499a5d9e2
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2015-06-29 14:43:20 +01:00 |
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David Banks
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e66ecdfc3e
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Made sure CycleCount stopped when Z80 is paused
Change-Id: Ia5d4a7d216a089e06e1aaa86bcd43d512a429aaa
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2015-06-28 22:17:32 +01:00 |
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David Banks
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0c0fde6a32
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Working Z80 memory access and disassembler in the small GODIL, incremented version to 0.44
Change-Id: I718be7476ec330743c206e737389856fc4b41fc8
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2015-06-28 19:42:25 +01:00 |
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David Banks
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9a68d96233
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Initial checking of Z80 work; slight refactor of BusMonCore; version updated to 0.41
Change-Id: I95f574abb93e84ffb5ca44c45b4c9aa8304e2e58
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2015-06-27 11:07:58 +01:00 |
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David Banks
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eec6e10440
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Added option to do repeat a read/write command n times (where n can be large), incremented version to 0.37
Change-Id: I4b1b02e8d67a581acbf4d5b044e86ffb2bc7e27e
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2015-06-22 18:11:11 +01:00 |
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David Banks
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14e4adda94
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Implemented cycle counter and data bus monitoring during read/write watches/breakpoints, incremented version to 0.32
Change-Id: I408f57e66800ea58a56896ec4af5d815d1f12c34
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2015-06-20 12:30:18 +01:00 |
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David Banks
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993f04e395
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Added mask to breakpoint/watches; improved disassembly of breakpoints; incremented version to 0.31
Change-Id: If2a68ba1597d8be5479302f15110602614cc25e1
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2015-06-19 16:10:07 +01:00 |
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David Banks
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73fc5a7eb1
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Fixed write breakpoints to stop immediately; switched back to T65 core
Change-Id: I33bc0f7b0dd6caf89572fa4f494c3cc93c673107
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2015-06-19 15:37:01 +01:00 |
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David Banks
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824c40f31e
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Added fill command, memory address reg now auto-increments, version 0.29
Change-Id: I685da6a14cea3dd343dde28c4316bb06ab924bc9
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2015-06-18 12:58:37 +01:00 |
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David Banks
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664c3194c4
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Implemented memory read/write and disassembly functionality
Change-Id: I269d42bf5e2db0ae47c739c30d6d716cccf8d556
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2015-06-16 18:41:46 +01:00 |
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