Thomas Harte
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5ccb512883
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Moves the CIAs into the Chipset class.
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
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2021-10-04 06:44:54 -07:00 |
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Thomas Harte
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0b9ebafc0f
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Flip bit deserialisation order.
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2021-09-28 22:12:13 -04:00 |
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Thomas Harte
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e15f1103a0
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Takes a shot at low resolution shifting.
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2021-09-20 19:00:52 -04:00 |
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Thomas Harte
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a4263b5a8c
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Ties bitplane collection to line position.
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
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2021-09-19 21:55:45 -04:00 |
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Thomas Harte
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245b7baa61
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Moves the Copper into its own file.
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2021-09-16 21:17:23 -04:00 |
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Thomas Harte
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0eeaaa150a
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Correct Copper start address.
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2021-09-16 21:01:37 -04:00 |
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Thomas Harte
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6572efe2a7
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Clarifies word addressing.
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2021-09-16 08:24:52 -04:00 |
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Thomas Harte
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add11db369
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Factors out DMADevice, which is now a parent of Blitter.
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2021-09-14 20:51:32 -04:00 |
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Thomas Harte
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fd70f7ad43
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Attempts to make pixel content observeable.
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2021-09-08 20:57:26 -04:00 |
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Thomas Harte
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6e034c9b7f
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At least manages to place a pixel region on screen.
Albeit that I've suddenly realised that I've failed properly to think about high-res versus low-res.
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2021-08-11 20:31:37 -04:00 |
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Thomas Harte
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52e375a985
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Move towards playfield decoding.
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2021-08-11 18:47:35 -04:00 |
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Thomas Harte
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10a5e7313f
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Makes a buggy first attempt at bitplane data collection.
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2021-08-10 21:28:48 -04:00 |
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Thomas Harte
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ec9cb21fae
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Starts towards bitplane collection.
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2021-08-10 19:01:41 -04:00 |
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Thomas Harte
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e412927415
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Logs a bit more from the Blitter, gives it access to slots.
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2021-08-10 07:17:01 -04:00 |
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Thomas Harte
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dda154c7c6
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Adds nonsense disk reads, which seems to lead to bitplane and blitter requests.
Progress, at last!
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2021-08-09 20:31:14 -04:00 |
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Thomas Harte
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9215535bee
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Adds a container for the disk controller.
Thereby appears to prove that my Amiga is getting as far as attempting to load from floppy.
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2021-08-09 17:35:09 -04:00 |
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Thomas Harte
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1502c4530e
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Takes a further step towards real timing.
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2021-08-08 21:52:28 -04:00 |
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Thomas Harte
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1bae4973bc
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Post the serial control write onwards.
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2021-07-30 18:24:27 -04:00 |
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Thomas Harte
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759007ffc1
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Attempts to route CIA interrupts.
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2021-07-28 19:36:30 -04:00 |
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Thomas Harte
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82205d71cc
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Breaks up loop for arithmetic simplicity.
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2021-07-27 21:59:27 -04:00 |
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Thomas Harte
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402eab10f8
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Breaks video output while attempting to pull it into the main loop.
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2021-07-27 21:33:07 -04:00 |
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Thomas Harte
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b6bf4d73ad
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Blitter-finished bit aside, attempts to complete the Copper.
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2021-07-27 21:10:14 -04:00 |
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Thomas Harte
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29cd8504ca
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Implements enough Copper to get a first store.
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2021-07-27 19:06:16 -04:00 |
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Thomas Harte
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3544746934
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Modifies interface, starts on scheduler.
Probably corrects the pixel clock, which I think was scaled up by a factor of 4.
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2021-07-27 16:41:18 -04:00 |
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Thomas Harte
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a43175125a
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Assuming I'm going to keep this synchronous, extends function signature.
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2021-07-26 20:13:06 -04:00 |
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Thomas Harte
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1d03bc560a
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Stores the colour palette, uses entry 0 as my new always output.
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2021-07-26 18:59:11 -04:00 |
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Thomas Harte
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3832acf6e3
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Produces a static white box, at least.
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2021-07-26 18:51:01 -04:00 |
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Thomas Harte
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7894b50321
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Starts towards an actual pixel output loop.
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2021-07-26 18:44:20 -04:00 |
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Thomas Harte
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87dcd82f69
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Makes a first attempt at some sort of interrupt functionality.
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2021-07-26 16:40:42 -04:00 |
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Thomas Harte
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d898a43dff
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Implements time-of-day counters, provisionally.
Interrupts to do.
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2021-07-23 21:24:07 -04:00 |
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Thomas Harte
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de208ead4e
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Stubs in enough to get back into a persistent loop.
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2021-07-22 22:00:53 -04:00 |
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Thomas Harte
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87d2fc1491
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Adds enough raster position to return something.
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2021-07-22 21:45:51 -04:00 |
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Thomas Harte
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2bc9af09e1
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Factors out the chipset.
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2021-07-22 21:16:23 -04:00 |
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