Thomas Harte
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87178ed725
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Port AND.
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2022-04-24 15:12:18 -04:00 |
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Thomas Harte
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94e5436f6e
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Attempt a more compact retelling.
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2022-04-24 14:47:14 -04:00 |
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Thomas Harte
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b965f2053a
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Start experimenting with a simple AND for operand validation.
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2022-04-24 10:43:06 -04:00 |
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Thomas Harte
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edee078f0a
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Eliminate last set of failures.
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2022-04-22 20:57:45 -04:00 |
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Thomas Harte
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d4b766bf3f
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Introduce directional ADD/SUB/AND/OR.
Just 512 failures to go.
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2022-04-22 20:37:09 -04:00 |
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Thomas Harte
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72772c9a83
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Remove branch from combined_mode .
On x86 it was probably only a conditional move, but this is fine.
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2022-04-22 15:11:41 -04:00 |
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Thomas Harte
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4c806d7c51
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Tidy up slightly, ahead of a final push to getting complete test success.
After which I can start undoing style errors.
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2022-04-22 14:51:25 -04:00 |
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Thomas Harte
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96afcb7a43
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Introduce remainder of tests.
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2022-04-22 14:33:43 -04:00 |
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Thomas Harte
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efeee5160e
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Add tests for RTE, RTR, TRAP, TRAPV, CHK.
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2022-04-22 10:06:39 -04:00 |
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Thomas Harte
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06fb502047
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Add MUL/DIV tests and exclusions.
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2022-04-22 09:47:16 -04:00 |
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Thomas Harte
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977192f480
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Resolve D-page decoding errors.
In particular: that I'd overlooked CMPM, and was treating NOT as two-operand.
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2022-04-22 09:24:16 -04:00 |
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Thomas Harte
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cf66d9d38d
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Add failing tests for EOR, NOT, OR; disambiguate EOR vs CMP.
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2022-04-21 20:36:04 -04:00 |
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Thomas Harte
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25eeff8fc5
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Correct CMP decoding, correct AND as far as asymmetry of Dn, Dn.
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2022-04-21 20:14:52 -04:00 |
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Thomas Harte
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bf9fc0ae96
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Correct decoding of BSR.
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2022-04-21 16:24:34 -04:00 |
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Thomas Harte
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a8a1a74b79
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Correct BSRb quick value.
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2022-04-21 16:13:06 -04:00 |
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Thomas Harte
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549e440f7c
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Add 'quick' decoding and testing.
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2022-04-21 16:05:00 -04:00 |
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Thomas Harte
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45c02c31f8
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Add MOVEM exclusions.
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2022-04-21 15:47:34 -04:00 |
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Thomas Harte
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b6b092d124
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Add tests, exclusions for rest of shift/roll group.
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2022-04-21 11:26:56 -04:00 |
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Thomas Harte
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3af93ada6f
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Test and correct Bcc, BSR, CLR, NEGX, NEG.
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2022-04-20 20:19:56 -04:00 |
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Thomas Harte
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dc16928f74
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Add appropriate exclusions for JSR, JMP, Scc.
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2022-04-20 16:56:26 -04:00 |
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Thomas Harte
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80ff146620
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Add CMP, CMPA and TST tests and exclusions.
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2022-04-20 16:29:45 -04:00 |
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Thomas Harte
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d4fe9d8166
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Complete BTST/etc exclusions.
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2022-04-20 16:16:24 -04:00 |
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Thomas Harte
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85a0af03c1
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Import more standard JSON; start validating.
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2022-04-20 09:17:00 -04:00 |
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Thomas Harte
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dc43f5605b
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Give MOVEPs precedence.
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2022-04-20 08:40:56 -04:00 |
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Thomas Harte
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fab064641f
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Add Move[to/from][SR/CCR/USP] tests, correct decodings.
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2022-04-20 07:59:13 -04:00 |
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Thomas Harte
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316e9681cc
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Weed out false PEAs.
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2022-04-19 20:34:08 -04:00 |
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Thomas Harte
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4181313cc6
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Correct decoding of SWAP.
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2022-04-19 20:28:00 -04:00 |
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Thomas Harte
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6aabc5e7b0
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Test LEA, PEA, add name for MOVEq.
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2022-04-19 19:45:51 -04:00 |
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Thomas Harte
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343a8e0192
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Resolve wrong-headed mapping of LEA to MOVEAl.
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2022-04-19 19:36:21 -04:00 |
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Thomas Harte
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ef87d09cfa
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Clear up MOVEs, fail on MOVEAs.
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2022-04-19 17:13:23 -04:00 |
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Thomas Harte
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d21c67f237
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Don't permit byte move from address register.
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2022-04-19 16:49:26 -04:00 |
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Thomas Harte
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de40fed248
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Test MOVEs and add operand validation.
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2022-04-19 16:31:03 -04:00 |
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Thomas Harte
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76d7e0e1f8
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Test and correct SUBs.
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2022-04-19 16:27:20 -04:00 |
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Thomas Harte
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1f585d67b6
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ADDA: correct decoding, add validation.
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2022-04-19 14:43:01 -04:00 |
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Thomas Harte
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5b22e94a4b
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Map invalid reg+mode combinations to AddressingMode::None; add validation of ADDs and decoding of ADDX.
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2022-04-19 14:36:36 -04:00 |
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Thomas Harte
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7749aef6b6
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Improve const correctness.
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2022-04-19 14:35:40 -04:00 |
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Thomas Harte
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5de8fb0d08
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Disallow four illegal NBCD addressing modes.
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2022-04-19 09:59:02 -04:00 |
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Thomas Harte
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19f7335926
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Add post validation step.
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2022-04-19 09:44:02 -04:00 |
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Thomas Harte
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99f4cd867d
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Decode the two EXTs.
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2022-04-19 08:42:17 -04:00 |
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Thomas Harte
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93fe3459fd
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The quick value won't always fit in reg; turf the problem elsewhere.
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2022-04-19 08:37:35 -04:00 |
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Thomas Harte
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1abd3bd7f3
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Decode SWAP.
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2022-04-19 08:37:13 -04:00 |
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Thomas Harte
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fc4fd41be4
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Reorder from most specific to least.
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2022-04-19 08:00:52 -04:00 |
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Thomas Harte
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e4c6251ef5
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Express the BSR/Bcc.l test properly.
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2022-04-18 14:42:31 -04:00 |
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Thomas Harte
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7aa250eaf7
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Advances to hitting the same absent/present mapping as the old decoder.
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2022-04-18 14:41:26 -04:00 |
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Thomas Harte
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ff380b686a
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Decode MOVEq.
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2022-04-18 09:12:45 -04:00 |
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Thomas Harte
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d2452f4b68
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Fix SUBQ ExtendedOperation mappings.
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2022-04-18 09:08:49 -04:00 |
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Thomas Harte
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deb9c32a38
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Add missing Sccs.
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2022-04-18 09:04:17 -04:00 |
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Thomas Harte
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440f45b996
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Attempt decoding and disambiguation of Scc, DBcc, Bcc and BSR.
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2022-04-18 08:55:46 -04:00 |
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Thomas Harte
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7d64c4ec66
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Add STOP.
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2022-04-18 08:29:10 -04:00 |
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Thomas Harte
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7fe0d530c1
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Add a decoder for TRAP.
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2022-04-18 08:05:33 -04:00 |
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