Thomas Harte
f2a6a12f79
Remove further vestiges of timing.
2022-05-09 20:58:51 -04:00
Thomas Harte
7445c617bc
Start removing 68000-specific timing calculations.
2022-05-09 20:32:02 -04:00
Thomas Harte
8e7340860e
Minor thematic rearrangement.
2022-05-09 16:35:17 -04:00
Thomas Harte
2ca1eb4cf8
Move set_pc
into the operation-specific group.
2022-05-09 16:20:15 -04:00
Thomas Harte
0af8660181
Remove add_pc
and decline_branch
in favour of operation-specific signals.
2022-05-09 16:19:25 -04:00
Thomas Harte
2f7cff84d9
Enable missing rotates and shifts.
2022-05-09 11:26:01 -04:00
Thomas Harte
8e5650fde9
Clean up Instruction.hpp.
2022-05-09 10:13:42 -04:00
Thomas Harte
539932dc56
Provide function codes. TODO: optionally.
2022-05-09 09:18:02 -04:00
Thomas Harte
e35de357fa
Route reads and writes through a common path.
2022-05-08 17:17:46 -04:00
Thomas Harte
0818fd7828
Ensure no status updates fall through the cracks.
2022-05-07 21:29:12 -04:00
Thomas Harte
98cb9cc1eb
Fix CHK operand size.
2022-05-07 21:16:44 -04:00
Thomas Harte
bf8c97abbb
Permit TRAP, TRAPV and CHK to push the next PC rather than the current.
2022-05-07 20:32:39 -04:00
Thomas Harte
ad6cf5e401
Pull out magic constant, simplify sp
and TAS
.
2022-05-07 20:20:24 -04:00
Thomas Harte
2b3900fd14
Fix LINK A7.
2022-05-07 08:15:26 -04:00
Thomas Harte
1defeca1ad
Implement RTS, RTR, RTE.
2022-05-06 12:30:49 -04:00
Thomas Harte
ac6a9ab631
Fix TAS Dn.
2022-05-06 12:23:04 -04:00
Thomas Harte
8176bb6f79
Expose issues with TST and TAS.
2022-05-06 12:18:56 -04:00
Thomas Harte
9c266d4316
Proceed to unimplemented TST.
2022-05-06 11:33:57 -04:00
Thomas Harte
190a351a29
Fix address writeback.
2022-05-06 09:56:01 -04:00
Thomas Harte
607ddd2f78
Preserve MOVEM order in Operation
.
2022-05-06 09:45:06 -04:00
Thomas Harte
fed79a116f
Be overt about the size being described here.
2022-05-06 09:22:38 -04:00
Thomas Harte
5db0ea0236
Add note for my tomorrow self.
2022-05-05 21:11:02 -04:00
Thomas Harte
06fe320cc0
Correct source counting, but this leaves the operands still being the wrong way around.
2022-05-05 21:06:53 -04:00
Thomas Harte
f7991e18de
Makes a failed attempt to implement MOVEM to registers.
2022-05-05 20:32:21 -04:00
Thomas Harte
d7d0a5c15e
Implement MOVEM to memory.
2022-05-05 18:51:29 -04:00
Thomas Harte
47f4bbeec6
Switch to a contiguous block of 16 registers.
2022-05-05 15:31:59 -04:00
Thomas Harte
9ab70b340c
Route MOVEM appropriately.
2022-05-05 12:42:57 -04:00
Thomas Harte
70cdc2ca9f
Fix MOVEP to register.
...
Advance to lack of MOVEM.
2022-05-05 12:37:47 -04:00
Thomas Harte
f63a872387
BTST does not write back.
2022-05-05 12:32:15 -04:00
Thomas Harte
67462c2f92
Rewire MOVEP.
2022-05-05 12:27:36 -04:00
Thomas Harte
4a4e786060
Hit a realisation: write-back isn't going to work with MOVEP as formulated.
2022-05-05 09:26:26 -04:00
Thomas Harte
665f2d4c00
Attempts MOVEP.
2022-05-05 09:00:33 -04:00
Thomas Harte
64586ca7ba
Implement BTST/etc.
2022-05-04 20:57:22 -04:00
Thomas Harte
15c90e546f
Fix rotates and shifts to memory.
2022-05-04 19:44:59 -04:00
Thomas Harte
5aabe01b6d
Mostly fix LINK and UNLK.
2022-05-04 08:41:55 -04:00
Thomas Harte
5d1d94848c
Take a bash at LINK and UNLK.
2022-05-04 08:26:11 -04:00
Thomas Harte
7d10976e08
Add LINK and UNLINK to operand_flags
.
2022-05-03 20:51:02 -04:00
Thomas Harte
d3b55a74a5
Fix LEA, proceed to non-functional LINK and UNLK.
2022-05-03 20:45:36 -04:00
Thomas Harte
de58ec71fd
Fix EXT, SWAP.
2022-05-03 20:17:36 -04:00
Thomas Harte
052ba80fd7
Add enough wiring to complete but fail EXT and JMP/JSR.
2022-05-03 15:49:55 -04:00
Thomas Harte
39f0ec7536
Get far enough through CHK to realise that MOVEM probably needs to be divided by direction.
2022-05-03 15:40:04 -04:00
Thomas Harte
af973138df
Correct decoding of Bcc.b, satisfying Bcc and BSR tests.
2022-05-03 15:32:54 -04:00
Thomas Harte
5a87506f3d
Fix Bcc, making decision that add_pc
is relative to start of instruction.
2022-05-03 15:21:42 -04:00
Thomas Harte
90f0005cf2
Proceed to failing Bcc and flagging up my lack of an implementation for BSR.
2022-05-03 14:45:49 -04:00
Thomas Harte
d8b3748d24
Fix Scc size, DBcc behaviour.
2022-05-03 14:40:51 -04:00
Thomas Harte
1b224c961e
Fix Scc, add operand flags for DBcc.
2022-05-03 14:23:57 -04:00
Thomas Harte
b6ffff5bbd
Distinguish [ADD/SUB]QA from [ADD/SUB]Q.
2022-05-03 14:17:26 -04:00
Thomas Harte
b3cf13775b
Consume operand_flags into Instruction.hpp.
2022-05-03 11:09:57 -04:00
Thomas Harte
c61809f0c4
Add CMPAl
.
2022-05-03 09:20:02 -04:00
Thomas Harte
2f2d6bc08b
Correct CMPw.
2022-05-03 09:05:34 -04:00
Thomas Harte
1bb809098c
Switch — messily — to a more compact way of indicating sequence.
2022-05-03 09:04:54 -04:00
Thomas Harte
011506f00d
Add basic exceptions.
2022-05-02 21:27:58 -04:00
Thomas Harte
25ab478461
Fix immediate byte and word fetches.
2022-05-02 20:17:44 -04:00
Thomas Harte
fc9a35dd04
Test add/sub, add an exception for invalid Sequence
s.
2022-05-02 20:09:38 -04:00
Thomas Harte
7efe30f34c
Fix (d8, _, Xn) calculation.
2022-05-02 15:09:59 -04:00
Thomas Harte
3827ecd6d3
Proceed to complete test running.
2022-05-02 12:57:45 -04:00
Thomas Harte
14532867a4
Sneaks towards testing EXT.
2022-05-02 08:00:56 -04:00
Thomas Harte
73f340586d
Proceed to building, but failing tests.
2022-05-02 07:45:07 -04:00
Thomas Harte
56fe00c5fb
Correct errors preparatory to Executor's lack of flow controller actions.
2022-05-01 20:40:57 -04:00
Thomas Harte
3c26177239
Provide both compile- and run-time operation selection options.
2022-05-01 17:39:56 -04:00
Thomas Harte
fe8f0d960d
Equivocate.
...
(Specifically: addresses cannot generally be obtained in advance, as they are often the product of registers, but things like displacements, immediate values and absolute addresses can)
2022-05-01 15:30:03 -04:00
Thomas Harte
c72caef4fd
Correct further size specifiers.
2022-05-01 15:21:58 -04:00
Thomas Harte
0720a391e8
Correct address register mutations.
2022-05-01 15:18:06 -04:00
Thomas Harte
d16ac70a50
Correct include path.
2022-05-01 15:14:12 -04:00
Thomas Harte
fc8e020436
Improve field name.
2022-05-01 15:12:13 -04:00
Thomas Harte
6b073c6067
Attempt to round out addressing modes, shift to a header, as per templating on BusHandler.
2022-05-01 15:10:54 -04:00
Thomas Harte
0b19bbff8d
Marginally refactor, to avoid repetition of read/write branch.
2022-05-01 13:09:28 -04:00
Thomas Harte
42927c1e32
Establish more of the 680x0 executor loop.
2022-05-01 13:00:20 -04:00
Thomas Harte
df999978f1
Figure out what the call to perform
should look like.
...
Albeit that this class doesn't currently offer any of the proper flow control actions.
2022-04-30 20:34:44 -04:00
Thomas Harte
43cd740a7b
Shuffle Step
to give meaning to the LSB.
2022-04-30 20:33:35 -04:00
Thomas Harte
52f355db24
Decision: operation is not a template parameter. Hence can use condition as fully typed.
2022-04-30 14:08:51 -04:00
Thomas Harte
a86c5ccdc9
Merge branch '68000Perform' of github.com:TomHarte/CLK into 68000Perform
2022-04-30 14:02:23 -04:00
Thomas Harte
e532562108
Merge branch 'master' into 68000Perform
2022-04-30 14:02:17 -04:00
Thomas Harte
8d24c00df2
Include decoded condition in Preinstruction.
2022-04-30 09:00:47 -04:00
Thomas Harte
f4074e0bba
Add basic status.
2022-04-30 08:38:28 -04:00
Thomas Harte
e4426dc952
Introduce calculate EA steps.
2022-04-29 20:30:48 -04:00
Thomas Harte
9359f6477b
Start drafting an Executor.
2022-04-29 17:12:06 -04:00
Thomas Harte
a103f30d51
Attempt to game out LEA, PEA. Add various special MOVEs.
2022-04-29 14:43:58 -04:00
Thomas Harte
78b60dbd1a
Evict MOVEM and MOVEP, enable TRAP and TRAPV, complete CHK.
2022-04-29 14:43:30 -04:00
Thomas Harte
cde75a1c00
Make steps more visible.
2022-04-29 11:26:39 -04:00
Thomas Harte
b9d243552c
MOVEs don't read from operand 2.
2022-04-29 11:22:06 -04:00
Thomas Harte
85242ba896
Add to Xcode project, template on Model as per CLR being odd. Fill in some obvious answers.
2022-04-29 11:10:14 -04:00
Thomas Harte
d16dab6f62
Starts introducing a sequencer, to resolve responsibility of perform
.
2022-04-29 10:40:19 -04:00
Thomas Harte
8066b19f93
Correct typos.
2022-04-29 07:57:02 -04:00
Thomas Harte
abd2a831a3
Added a further ambiguity.
2022-04-29 05:08:44 -04:00
Thomas Harte
824d3ae3f7
Conclusion: a union does produce better code.
...
(But needn't be so verbose)
2022-04-29 04:51:02 -04:00
Thomas Harte
727a14c6f9
Add notes for myself on decisions yet to make.
2022-04-29 03:53:17 -04:00
Thomas Harte
13d20137d3
Tackle two lingering references to exception_handler.
2022-04-29 03:38:23 -04:00
Thomas Harte
9680566595
Include in automated build, temporarily.
2022-04-28 20:42:44 -04:00
Thomas Harte
33c9ea2cf7
A flow controller feels more natural than an exception handler.
2022-04-28 20:42:04 -04:00
Thomas Harte
1d8d2b373b
Port all simple instruction bodies.
2022-04-28 16:55:47 -04:00
Thomas Harte
611b472b12
Add evaluate_condition
, to check standard 68000 condition codes.
2022-04-28 16:54:57 -04:00
Thomas Harte
bb73eb0db3
Start working on an isolation of 68000 instruction execution.
2022-04-28 15:35:40 -04:00
Thomas Harte
39261436c8
Remove unused type alias.
2022-04-27 19:53:32 -04:00
Thomas Harte
9cbbb6e508
Adjust path to match namespace; add to Qt project.
2022-04-27 08:05:36 -04:00