5155 Commits

Author SHA1 Message Date
Jim Grosbach
0780b6303b Thumb parsing and encoding support for NOP.
The irony is not lost that this is not a completely trivial patchset.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 23:24:36 +00:00
Jim Grosbach
2c3f70e5d4 Thumb assembly parsing and encoding for NEG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:51:03 +00:00
Jim Grosbach
3a244bd8b3 Fix NEG alias
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:30:58 +00:00
Jim Grosbach
7a01069420 Be more lenient on tied operand matching for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:30:46 +00:00
Jim Grosbach
7a32fa1c78 Update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:19:48 +00:00
Jim Grosbach
88ae2bc6d5 Thumb assembly parsing and encoding for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:07:46 +00:00
Jim Grosbach
4ec6e888ec Thumb assembly parsing and encoding for MOV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138076 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 20:46:54 +00:00
Jim Grosbach
73a1c2cea1 Tidy up. Tab character.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138072 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 20:30:19 +00:00
Jim Grosbach
b86e2dbf61 Tab characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 19:41:46 +00:00
Jim Grosbach
1b7b68f087 Thumb assembly parsing and encoding for LSL(immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 19:29:25 +00:00
Jim Grosbach
05b0156734 Thumb assembly parsing and encoding for LDRSB and LDRSH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138061 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 19:17:58 +00:00
Jim Grosbach
38466309d5 Thumb assembly parsing and encoding for LDRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138060 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:55:51 +00:00
Jim Grosbach
48ff5ffe9e Thumb assembly parsing and encoding for LDRB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:49:59 +00:00
Jim Grosbach
67b95f902a Thumb assembly parsing and encoding for LDR(literal).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:20:48 +00:00
Jim Grosbach
ecd8589683 Thumb assembly parsing and encoding for LDR(immediate) form T2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:13:48 +00:00
Jim Grosbach
2f7232efd5 Use helper function to check for low registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 17:57:22 +00:00
Jim Grosbach
60f91a3d95 Thumb assembly parsing and encoding for LDR(immediate) form T1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 17:55:24 +00:00
Jim Grosbach
c6d7c653c9 Add explanatory comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 16:52:32 +00:00
Benjamin Kramer
a67f14bf53 Make a bunch of symbols private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 01:42:18 +00:00
Owen Anderson
78affc9ea1 STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
Found by randomized testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:47:44 +00:00
Owen Anderson
846dd95f87 Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs have it unset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:31:17 +00:00
Owen Anderson
1dd56f05e1 Remember to fill in some operands so we can print _something_ coherent even when decoding the CPS instruction soft-fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:15:25 +00:00
Owen Anderson
14090bf263 Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions.
Fixes a large class of disassembler crashes found by randomized testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:11:02 +00:00
Jim Grosbach
93b3eff623 Thumb assembly parsing and encoding for LDM instruction.
Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 21:50:53 +00:00
Jim Grosbach
0d1511c022 Thumb assembly parsing and encoding for CMP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:08:29 +00:00
Jim Grosbach
11cca7a2ea Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137956 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:51:36 +00:00
Jim Grosbach
90b5a08e1f ARM Thumb blx instruction fixup has same data range as bl.
These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 16:57:50 +00:00
Jim Grosbach
5f687decc8 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 16:50:45 +00:00
Jim Grosbach
3ce23d3d87 Add missing 'break'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137941 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 16:08:39 +00:00
Jim Grosbach
2f815c0b50 Remove extraneous newline from operand print method. PR10569.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:23:07 +00:00
Jim Grosbach
421993f428 Clean up patterns for Thumb1 system instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137897 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:08:57 +00:00
Jim Grosbach
395b453bed Thumb assembly parsing and encoding for B.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:57:40 +00:00
Jim Grosbach
00f5d98205 Thumb assembly parsing and encoding for ASR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:49:09 +00:00
Jim Grosbach
c40578250d Tidy up. 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:58:18 +00:00
Jim Grosbach
70939ee141 ARM clean up the imm_sr operand class representation.
Represent the operand value as it will be encoded in the instruction. This
allows removing the specialized encoder and decoder methods entirely. Add
an assembler match class while we're at it to lay groundwork for parsing the
thumb shift instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137879 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:51:27 +00:00
Jim Grosbach
ef3bf64bf8 Fix predicate for imm1_32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137865 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:01:11 +00:00
Jim Grosbach
5a1cd045cd Thumb assembly parsing and encoding for ADR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 20:37:40 +00:00
Jim Grosbach
4372ca6fe4 80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137857 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 19:55:51 +00:00
Jim Grosbach
8884148b8e Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 19:53:53 +00:00
Owen Anderson
0aa38ab1fb Be more careful in the Thumb decoder hooks to avoid walking off the end of the OpInfo array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137838 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:14:48 +00:00
Owen Anderson
83e3f67fb6 Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
Patch by James Molloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:44:15 +00:00
Jim Grosbach
89e2aa6afd Thumb ADD(immediate) parsing support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 23:57:34 +00:00
Owen Anderson
16280308ac Separate out Thumb1 instructions that need an S bit operand from those that do not, for the purposes of decoding them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137787 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 23:45:44 +00:00
Jim Grosbach
194bd89829 Thumb parsing diagnostics for low-reg requirements on ADD and MOV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 22:20:01 +00:00
Jim Grosbach
00c9a51888 Add missing exit for 'case'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137774 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:42:31 +00:00
Jim Grosbach
3912b73c74 Thumb assembly parsing and encoding for ADD(register) instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137759 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:34:08 +00:00
Jim Grosbach
d54b4e612a Move some logic into a helper function and expand the commentary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137756 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:12:37 +00:00
Jim Grosbach
47a0d52b69 ARM thumb assembly parsing for arithmetic flag setting instructions.
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:45:50 +00:00
Jim Grosbach
d0d3f7e01f ARM .align NOP padding uses different encoding pre-ARMv6.
Patch by Kristof Beyls and James Malloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137723 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 17:06:20 +00:00
Owen Anderson
ef2865a8ea Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the Thumb2 NEON decoding hooks to bring us closer to correctness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:38:54 +00:00