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1692 Commits

Author SHA1 Message Date
Evan Cheng
586ccac4ec Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48515 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-18 23:36:35 +00:00
Bill Wendling
dbfd894561 It might be nice to have this run as x86 on non-x86 platforms... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48511 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-18 22:38:22 +00:00
Bill Wendling
2974e49019 Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-18 22:29:51 +00:00
Dale Johannesen
cf49819877 Make conversions of i8/i16 to ppcf128 work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48493 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-18 17:28:38 +00:00
Christopher Lamb
981576c818 Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-18 16:46:39 +00:00
Evan Cheng
3c88d742d4 Rewrite code that propagate isDead information after a dead copy is coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48490 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-18 08:26:47 +00:00
Chris Lattner
9493268124 ensure we continue matching x86-64 rotates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48437 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-17 01:35:03 +00:00
Evan Cheng
c17ba8a28d Fix PR2138. Apparently any modification to a std::multimap (including remove entries for a different key) can invalidate multimap iterators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48371 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-14 20:44:01 +00:00
Dan Gohman
002e5d0a17 More APInt-ification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-13 22:13:53 +00:00
Evan Cheng
a56516ee08 New test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48338 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-13 08:05:02 +00:00
Evan Cheng
d99464d647 A test case I forgot to check in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48335 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-13 06:42:46 +00:00
Evan Cheng
875357d213 TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48333 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-13 06:37:55 +00:00
Evan Cheng
9e23336d0c Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: 
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 22:19:41 +00:00
Dan Gohman
89964b4ca1 Fix this test on hosts that don't have sse2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48296 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 20:40:51 +00:00
Dan Gohman
38459f01c0 Make this test x86-specific for now; targets that don't use 
the automated CallingConv code to handle return values typically
don't support multiple return values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48265 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-12 00:25:14 +00:00
Dan Gohman
cb5b317890 Basic feature test for multiple return values in codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48260 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 23:53:16 +00:00
Anton Korobeynikov
f1765e8298 Testcase for PR2137 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48258 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 22:43:42 +00:00
Anton Korobeynikov
0fb2033f91 Update testcase for recent aliases change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48250 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 21:42:20 +00:00
Dan Gohman
6a6d27ac0b Add a test to ensure that all-ones vectors are materialized with pcmpeqd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48247 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 21:37:00 +00:00
Dan Gohman
9736028d84 Use the correct value for InSignBit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 21:29:43 +00:00
Chris Lattner
e12ecf272d Implement basic support for the 'f' register class constraint. This basically 
works, but probably won't if you mix it with 't' or 'u' yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48243 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 19:50:13 +00:00
Dale Johannesen
01c18a7275 The feature this is testing did not work in the general case, 
and has been removed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48232 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 17:48:26 +00:00
Evan Cheng
9a8094159d Learn how to xfail a test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48219 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 07:51:31 +00:00
Evan Cheng
676dd7c80b When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 07:19:34 +00:00
Evan Cheng
de13acf862 XFAIL due to Dale's change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48216 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 07:15:44 +00:00
Dan Gohman
034f60ed24 Generalize ExpandIntToFP to handle the case where the operand is legal 
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-11 01:59:03 +00:00
Scott Michel
405fba12ce - Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency. 
- Add test pattern matching in CellSPU's icmp32.ll test harness
- Fix CellSPU fcmp.ll-generated assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48197 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 23:49:09 +00:00
Chris Lattner
03fdec04d1 Don't emit FP_REG_KILL into a block that just returns. Nothing 
can be live out of the block anyway, so it isn't needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48192 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 23:34:12 +00:00
Dan Gohman
a2e9485e34 Implement more support for fp-to-i128 and i128-to-fp conversions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 23:03:31 +00:00
Bill Wendling
2b65c4e7cc Update llc flags for PPC register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48187 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 22:59:08 +00:00
Dan Gohman
76c605b18e Fix mul expansion to check the correct number of bits for 
zero extension when checking if an unsigned multiply is
safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 20:42:19 +00:00
Dale Johannesen
45bcbf491c These tests don't work unless SSE2 is active. 
Judging from the checking comments this is intentional,
so add the flag (makes them pass on non-x86 host).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48157 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 17:33:57 +00:00
Dale Johannesen
ca765303fb There is no "-mattr=+sse1" flag; fix test for non-x86 hosts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48156 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 17:13:37 +00:00
Scott Michel
78c47fa50b Integer comparison tests for CellSPU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48152 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 16:58:52 +00:00
Evan Cheng
4ff3f1cc57 - Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy. 
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.                                                                                                 
 A = or A, B                                                                                                                                                            
 ...                                                                                                                                                                    
 B = A                                                                                                                                                                  
 ...                                                                                                                                                                    
 C = A<kill>                                                                                                                                                            
 ...                                                                                                                                                                    
   = B                                                                                                                                                                  
                                                                                                                                                                        
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48141 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 08:11:32 +00:00
Evan Cheng
f79e60649a Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 07:19:13 +00:00
Chris Lattner
8d88dbcbae remove an execution test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48135 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-10 06:53:14 +00:00
Evan Cheng
7a0690d1b6 Fix RUN line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48116 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 19:55:22 +00:00
Chris Lattner
f30e1cf9b7 teach X86InstrInfo::copyRegToReg how to copy into ST(0) from 
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 09:15:31 +00:00
Chris Lattner
02b6d25a27 Add ScheduleDAG support for copytoreg where the src/dst register are 
in different register classes, e.g. copy of ST(0) to RFP*.  This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 08:49:15 +00:00
Tanya Lattner
76806b6a43 Remove llvm-upgrade and update tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48103 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 08:16:40 +00:00
Chris Lattner
ce6e492997 reduce this testcase more 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48092 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 06:57:21 +00:00
Chris Lattner
67f453aae7 Finish implementing a readme entry: when inserting an i64 variable 
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 05:42:06 +00:00
Chris Lattner
62098040a1 Implement a readme entry, compiling 
#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 01:05:04 +00:00
Chris Lattner
8aca4b13a8 upgrade this test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48062 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 00:32:10 +00:00
Chris Lattner
da8de316a8 make this test harder 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48061 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-09 00:30:06 +00:00
Chris Lattner
f3ba434781 Teach SD some vector identities, allowing us to compile vec_set-9 into: 
_test3:
	movd	%rdi, %xmm1
	#IMPLICIT_DEF %xmm0
	punpcklqdq	%xmm1, %xmm0
	ret

instead of:

_test3:
	#IMPLICIT_DEF %rax
	movd	%rax, %xmm0
	movd	%rdi, %xmm1
	punpcklqdq	%xmm1, %xmm0
	ret

This is still not ideal.  There is no reason to two xmm regs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 23:43:36 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 00:58:38 +00:00
Dan Gohman
a2fcff4d97 Add support for calls with i128 return values on ppc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48041 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 00:19:12 +00:00
Dan Gohman
9ed06db5c8 Add support for lowering 128-bit shifts on ppc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48029 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:36:53 +00:00
Evan Cheng
d68f47c6fd Fixed a register scavenger bug. If a def is re-defining part of a super register, there must be an implicit def of the super-register on the MI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48024 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:12:54 +00:00
Chris Lattner
d1108222fd mark frem as expand for all legal fp types on x86, regardless of whether 
we're using SSE or not.  This fixes PR2122.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48006 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 06:36:32 +00:00
Bill Wendling
65bc122045 Add testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48005 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-06 23:34:22 +00:00
Gabor Greif
2cf36e0772 some more spelling changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47996 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-06 10:51:21 +00:00
Evan Cheng
433f6f62ca Constant fold SIGN_EXTEND_INREG with ashr not lshr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47992 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-06 08:20:51 +00:00
Scott Michel
4cb8bd8eff Refine Cell's i64 constant generation code to cover more constants where the 
upper and lower 32-bits are the same (in addition to 0 and -1 previously.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47985 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-06 04:02:54 +00:00
Scott Michel
53dec47f3b - Expand tabs to spaces. 
- select_bits.ll now fully functional now that PR1993 is closed. It was
  previously broken by refactoring in SPUInstrInfo.td and using multiclasses.
- Same for eqv.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47972 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 23:00:19 +00:00
Evan Cheng
ecb2a8b9bc Fix a coalescer bug wrt how dead copy interval is shortened. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47966 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 22:09:42 +00:00
Chris Lattner
ec4a5672f8 Generalize FP constant shrinking optimization to apply to any vt 
except ppc long double.  This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47938 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 06:48:13 +00:00
Evan Cheng
6fd599fa69 Add a target lowering hook to control whether it's worthwhile to compress fp constant. 
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 01:30:59 +00:00
Bill Wendling
3fab77eb25 Use -enable-ppc-regscavenger flag for these checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47916 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 23:16:26 +00:00
Evan Cheng
a26e0fe1b4 Really fix the test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47882 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 08:01:56 +00:00
Evan Cheng
6a2286a045 Fix broken test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47881 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 07:59:13 +00:00
Evan Cheng
f92dd28ab7 Add PR1501 test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47874 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 00:47:45 +00:00
Bill Wendling
7194aaf738 This is the initial check-in for adding register scavenging to PPC. (Currently, 
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47863 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-03 22:19:16 +00:00
Chris Lattner
767486b1d5 Evan implemented these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 18:05:14 +00:00
Chris Lattner
3be4893dce Evan implemented this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47827 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 17:56:29 +00:00
Chris Lattner
a4239e7367 add a testcase for misc vector stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47826 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 08:57:59 +00:00
Bill Wendling
65201f5a43 DCE'ed this testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47760 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-29 19:28:11 +00:00
Bill Wendling
97e3c01eb4 If we reload a virtual register that's already been assigned, we want to mark 
that instruction as its "last use". This fixes PR1925.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47758 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-29 18:52:01 +00:00
Lauro Ramos Venancio
9b80bd8ea2 Update testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47735 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 23:13:15 +00:00
Evan Cheng
e526d8a955 Set to default: x86 no longer fold and into test if it has more than one use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47711 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 07:46:38 +00:00
Dale Johannesen
0154e47ed0 New test for misaligned Altivec laod/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47698 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 23:14:50 +00:00
Dan Gohman
ec59b95a19 Don't hard-code the mask size to be 32, which is incorrect on ppc64 
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47692 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 21:12:32 +00:00
Evan Cheng
21b3f31f8f Fix a bug in dead spill slot elimination. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47687 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 19:57:11 +00:00
Chris Lattner
e416b7d407 actually run llc, thanks Dan :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47677 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 17:46:54 +00:00
Evan Cheng
be680dcea6 Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47668 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 10:04:56 +00:00
Chris Lattner
b09916bdfb Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead 
stack slot and store if the  SINT_TO_FP is actually legal.  This allows
us to compile:

double a(double b) {return (unsigned)b;}

to:

_a:
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	ret

instead of:

_a:
	subq	$8, %rsp
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	addq	$8, %rsp
	ret

crazy.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47660 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 05:57:41 +00:00
Chris Lattner
d0ba2a9c14 Compile x86-64-and-mask.ll into: 
_test:
	movl	%edi, %eax
	ret

instead of:

_test:
        movl    $4294967295, %ecx
        movq    %rdi, %rax
        andq    %rcx, %rax
        ret

It would be great to write this as a Pat pattern that used subregs 
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47658 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 05:47:54 +00:00
Evan Cheng
d36531249a Spiller now remove unused spill slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47657 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 03:04:06 +00:00
Bill Wendling
cc4831849e Upgrade testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47644 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 23:22:40 +00:00
Evan Cheng
4d535cadf1 Enable -coalescer-commute-instrs by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47623 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 20:40:22 +00:00
Dan Gohman
d4cf992230 Avoid aborting on invalid shift counts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47612 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 18:50:50 +00:00
Eli Friedman
9ec8095485 Fix for pr2093: direct operands aren't necessarily addresses, so don't 
try to simplify them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47610 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 18:37:49 +00:00
Chris Lattner
aeecb6c73a Fix PR2096, a regression introduced with my patch last night. This 
also fixes cfrac, flops, and 175.vpr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47605 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 17:09:59 +00:00
Gabor Greif
72c8f0d156 Really feed llvm-as with the testcase, do not let it read from stdin. This fixes the hangs seen on solaris10. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47604 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 13:37:13 +00:00
Evan Cheng
c886c460e4 This is possible: 
vr1 = extract_subreg vr2, 3
...
vr3 = extract_subreg vr1, 2
The end result is vr3 is equal to vr2 with subidx 2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47592 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 08:03:41 +00:00
Chris Lattner
0254e7033a Fix isNegatibleForFree to not return true for ConstantFP nodes 
after legalize.  Just because a constant is legal (e.g. 0.0 in SSE) 
doesn't mean that its negated value is legal (-0.0).  We could make
this stronger by checking to see if the negated constant is actually
legal post negation, but it doesn't seem like a big deal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47591 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 07:04:54 +00:00
Evan Cheng
9bf12b5583 Fix PR2076. CodeGenPrepare now sinks address computation for inline asm memory 
operands into inline asm block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47589 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 02:42:37 +00:00
Scott Michel
a59d469e9b Merge current work back to tree to minimize diffs and drift. Major highlights 
for CellSPU modifications:

- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
  esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
  rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
  is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
  compiles and generates the right code. More work still needs to be done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47532 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 18:41:37 +00:00
Evan Cheng
249ded3fa8 Rematerialization logic was overly conservative when it comes to loads from fixed stack slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47529 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 03:38:34 +00:00
Evan Cheng
aaa1d4265e Update test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47527 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 02:57:25 +00:00
Evan Cheng
18924f11c1 Remat of pic loads are now on by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47525 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 02:08:30 +00:00
Evan Cheng
28c9fc630c Really. Why doesn't every arch support MMX? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47513 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 00:56:14 +00:00
Evan Cheng
530d47f4f2 Test case for PR2082. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47501 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 20:38:49 +00:00
Evan Cheng
d8850a512e Allow re-materialization of pic load (controlled by -remat-pic-load for now). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47476 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 09:25:47 +00:00
Chris Lattner
d2b1fb27df copy mmx values from/to memory with GPRs on x86-32 
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47474 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 05:18:04 +00:00
Chris Lattner
149a4e56fc Start using GPR's to copy around mmx value instead of mmx regs. 
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47470 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 02:09:43 +00:00
Chris Lattner
0fe71e9bb1 Treat clobber operands like early clobbers: if we have 
any, we force sdisel to do all regalloc for an asm.  This
leads to gross but correct codegen.

This fixes the rest of PR2078.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47454 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 19:43:13 +00:00
Tanya Lattner
33eefffb2b Remove llvm-upgrade and update tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47432 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 07:42:26 +00:00
Chris Lattner
2bedd7359c testcase for PR1133 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47427 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 05:27:08 +00:00
Chris Lattner
7cbeb2431c Fix a (harmless) but where vregs were added to the used reg lists for 
inline asms.

Fix PR2078 by marking aliases of registers used when a register is 
marked used.  This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47426 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 04:55:52 +00:00
Evan Cheng
359026e39a XFAIL this for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47355 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 02:38:58 +00:00
Chris Lattner
b476f98ca9 this test requires sse2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47331 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 18:07:46 +00:00
Chris Lattner
ce2bcc8839 Don't fold and's into test instructions if they have multiple uses. 
This compiles test-nofold.ll into:

_test:
	movl	$15, %ecx
	andl	4(%esp), %ecx
	testl	%ecx, %ecx
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

instead of:
_test:
	movl	4(%esp), %eax
	movl	%eax, %ecx
	andl	$15, %ecx
	testl	$15, %eax
	movl	$42, %eax
	cmove	%ecx, %eax
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47330 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 17:37:35 +00:00
Chris Lattner
22c31769fb rename tests to avoid a test- prefix when they aren't related to the test instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47329 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 17:33:52 +00:00
Tanya Lattner
cfab3da46e Remove llvm-upgrade and update tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47325 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 08:07:33 +00:00
Nick Lewycky
7ad3920e31 Don't spew stats to stderr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47308 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 03:11:47 +00:00
Nick Lewycky
9103ba1003 Fix up the run line for this new test. 
llc: for the -info-output-file option:  requires a value!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47306 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 02:58:36 +00:00
Evan Cheng
acfab64631 New test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47302 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 02:09:58 +00:00
Tanya Lattner
53a66d10f0 Remove llvm-upgrade and update tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47296 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 01:41:04 +00:00
Evan Cheng
efec751a1b - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type. 
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 23:04:32 +00:00
Dan Gohman
339ffedca9 Don't mark scalar integer multiplication as Expand on x86, since x86 
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.

This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47277 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 17:55:26 +00:00
Tanya Lattner
6263f94674 Remove llvm-upgrade. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47238 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-17 20:02:20 +00:00
Andrew Lenharth
22c5c1b2df llvm.memory.barrier, and impl for x86 and alpha 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-16 01:24:58 +00:00
Evan Cheng
de7f560744 This test is not interesting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47189 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 23:06:21 +00:00
Chris Lattner
423be627e6 Fix a miscompilation from Dan's recent apintification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47128 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 18:48:56 +00:00
Chris Lattner
8b0cb7bcc6 This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47106 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 05:39:46 +00:00
Evan Cheng
5598b70a78 Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47102 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 01:32:53 +00:00
Duncan Sands
d462ba8539 Teach LegalizeTypes how to expand and promote CTLZ, 
CTTZ and CTPOP.  The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it.  I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it.  The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select.  This also means the value doesn't
need to be zero extended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47075 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 18:01:53 +00:00
Chris Lattner
86ca3cacc5 In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this 
node as soon as we create it in SDISel.  Previously we would lower it in
legalize.  The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them.  This causes us to miss some optimizations because 
datatype expansion also happens here.

Exposing the loads early allows us to do optimizations on them.  For example
we now compile arg-cast.ll to:

_foo:
	movl	$2147483647, %eax
	andl	8(%esp), %eax
	ret

where we previously produced:

_foo:
	subl	$12, %esp
	movsd	16(%esp), %xmm0
	movsd	%xmm0, (%esp)
	movl	$2147483647, %eax
	andl	4(%esp), %eax
	addl	$12, %esp
	ret

It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47054 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 07:39:09 +00:00
Nate Begeman
5e1dd5597e Add testcase for recent legalizer change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47049 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 06:48:40 +00:00
Evan Cheng
b2e72b0feb New tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47047 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 03:23:53 +00:00
Evan Cheng
073c5b721d Don't mask the isel bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47018 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 19:11:29 +00:00
Evan Cheng
aeb231cb59 This test assumes no SSE4.1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47017 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 19:11:08 +00:00
Evan Cheng
65b2e3df0d Fix some test cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46998 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 07:22:46 +00:00
Evan Cheng
431bfcbe37 Determine whether a spill kills the register it's spilling before insertion rather than trying to undo the kill marker afterwards. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46953 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-11 08:30:52 +00:00
Dale Johannesen
b3c4eb46d6 Alignment of struct containing vectors depends on 
whether SSE is present, on Darwin anyway.  Make it
explicit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46909 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-09 19:04:25 +00:00
Evan Cheng
5fd79d0560 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 21:20:40 +00:00
Evan Cheng
33663fc104 Added missing entries in X86 load / store folding tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46866 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 00:12:56 +00:00
Evan Cheng
be3bf42331 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. 
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 08:53:49 +00:00
Evan Cheng
b745e88bf0 It's PR1925, not PR1609. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46825 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-06 22:07:17 +00:00
Evan Cheng
2fc628d662 Fix a number of local register allocator issues: PR1609. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46821 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-06 19:16:53 +00:00
Evan Cheng
a58891ff1e Fix PR1975: dag isel emitter produces patterns that isel wrong flag result. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46776 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-05 22:50:29 +00:00
Evan Cheng
bb4151bd1f If a vr is already marked alive in a bb, then it has PHI uses that are visited earlier, then it is not killed in the def block (i.e. not dead). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46763 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-05 20:04:18 +00:00
Duncan Sands
6cc24947b6 Crashes LegalizeTypes with "Do not know how to 
expand the result of this operator!" (node: ctlz).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46713 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 18:07:02 +00:00
Duncan Sands
06418c5610 Crashes LegalizeTypes with "Do not know how to split 
this operator's operand" (node: extract_subvector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46712 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 18:05:42 +00:00
Chris Lattner
003de9a81e remove target triple to make this test more "generic" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46711 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 18:02:37 +00:00
Duncan Sands
df3fb5ef97 Crashed the new type legalizer. Not likely to catch 
any bugs in the future since to get the crash you also
need hacked in fake libcall support (which creates odd
but legal trees), but since adding it doesn't hurt...
Thanks to Chris for this ultimately reduced version.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46706 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 09:40:27 +00:00
Lauro Ramos Venancio
859efca7f9 CBackend: Implement unaligned load/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46646 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-01 21:25:59 +00:00
Chris Lattner
7cf9abff23 Add target triples to these so they don't fail on linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46496 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-29 06:26:07 +00:00
Scott Michel
053c1da8d9 Overhaul Cell SPU's addressing mode internals so that there are now 
only two addressing mode nodes, SPUaform and SPUindirect (vice the
three previous ones, SPUaform, SPUdform and SPUxform). This improves
code somewhat because we now avoid using reg+reg addressing when
it can be avoided. It also simplifies the address selection logic,
which was the main point for doing this.

Also, for various global variables that would be loaded using SPU's
A-form addressing, prefer D-form offs[reg] addressing, keeping the
base in a register if the variable is used more than once.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-29 02:16:57 +00:00
Chris Lattner
15c2351a93 Update this test. Due to dag combiner improvements, we now compile 
f7/f11 to:

_f7:
	eor r0, r0, #2, 2 @ -2147483648
	bx lr
_f11:
	bic r0, r0, #2, 2 @ -2147483648
	bx lr

instead of:

_f7:
	fmsr s0, r0
	fnegs s0, s0
	fmrs r0, s0
	bx lr

_f11:
	fmsr s0, r0
	fabss s0, s0
	fmrs r0, s0
	bx lr



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46423 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-27 23:26:37 +00:00
Chris Lattner
3bd39d4ca8 Implement some dag combines that allow doing fneg/fabs/fcopysign in integer 
registers if used by a bitconvert or using a bitconvert.  This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway.  For example, we now 
compile CodeGen/X86/fp-in-intregs.ll to:

_test1:
	movl	$2147483648, %eax
	xorl	4(%esp), %eax
	ret
_test2:
	movl	$1065353216, %eax
	orl	4(%esp), %eax
	andl	$3212836864, %eax
	ret

Instead of:
_test1:
	movss	4(%esp), %xmm0
	xorps	LCPI2_0, %xmm0
	movd	%xmm0, %eax
	ret
_test2:
	movss	4(%esp), %xmm0
	andps	LCPI3_0, %xmm0
	movss	LCPI3_1, %xmm1
	andps	LCPI3_2, %xmm1
	orps	%xmm0, %xmm1
	movd	%xmm1, %eax
	ret

bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46414 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-27 17:42:27 +00:00
Chris Lattner
b8f43875c3 New test to verify that "merging 4 loads into a vec load" continues to work and 
continues to infer alignment info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46403 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-26 20:06:45 +00:00
Chris Lattner
1329cb8d89 Infer alignment of loads and increase their alignment when we can tell they are 
from the stack.  This allows us to compile stack-align.ll to:

_test:
	movsd	LCPI1_0, %xmm0
	movapd	%xmm0, %xmm1
***	andpd	4(%esp), %xmm1
	andpd	_G, %xmm0
	addsd	%xmm1, %xmm0
	movl	20(%esp), %eax
	movsd	%xmm0, (%eax)
	ret

instead of:

_test:
	movsd	LCPI1_0, %xmm0
**	movsd	4(%esp), %xmm1
**	andpd	%xmm0, %xmm1
	andpd	_G, %xmm0
	addsd	%xmm1, %xmm0
	movl	20(%esp), %eax
	movsd	%xmm0, (%eax)
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46401 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-26 19:45:50 +00:00
Chris Lattner
216f3f6522 remove a useless xfailed test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46400 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-26 19:35:46 +00:00
Bill Wendling
824a721560 If there's no instructions being emitted on X86 for a function, emit a 
nop. Emit the nop directly for PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46398 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-26 09:03:52 +00:00
Bill Wendling
c79348d8dc Need to convert to LLVM code and not C. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46397 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-26 06:56:08 +00:00
Bill Wendling
cd76af4a62 Rename the .c to .ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46396 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-26 06:53:40 +00:00